69be60b019f467fe98b41ebbe8f7af7117545994
[openwrt/staging/zorun.git] / target / linux / ipq806x / files / arch / arm / boot / dts / qcom-ipq8064-wpq864.dts
1 // SPDX-License-Identifier: BSD-3-Clause
2 /*
3 * Copyright (C) 2017 Christian Mehlis <christian@m3hlis.de>
4 * Copyright (C) 2018 Mathias Kresin <dev@kresin.me>
5 * All rights reserved.
6 */
7
8 #include "qcom-ipq8064-v1.0.dtsi"
9
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/soc/qcom,tcsr.h>
12
13 / {
14 compatible = "compex,wpq864", "qcom,ipq8064";
15 model = "Compex WPQ864";
16
17 aliases {
18 mdio-gpio0 = &mdio0;
19 ethernet0 = &gmac1;
20 ethernet1 = &gmac0;
21
22 led-boot = &led_pass;
23 led-failsafe = &led_fail;
24 led-running = &led_pass;
25 led-upgrade = &led_pass;
26 };
27
28 leds {
29 compatible = "gpio-leds";
30
31 pinctrl-0 = <&led_pins>;
32 pinctrl-names = "default";
33
34 rss4 {
35 label = "green:rss4";
36 gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
37 };
38
39 rss3 {
40 label = "green:rss3";
41 gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
42 default-state = "keep";
43 };
44
45 rss2 {
46 label = "orange:rss2";
47 gpios = <&qcom_pinmux 25 GPIO_ACTIVE_HIGH>;
48 };
49
50 rss1 {
51 label = "red:rss1";
52 gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
53 };
54
55 led_pass: pass {
56 label = "green:pass";
57 gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
58 };
59
60 led_fail: fail {
61 label = "green:fail";
62 gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
63 };
64
65 usb {
66 label = "green:usb";
67 gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
68 };
69
70 usb-pcie {
71 label = "green:usb-pcie";
72 gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
73 };
74 };
75
76 keys {
77 compatible = "gpio-keys";
78
79 pinctrl-0 = <&button_pins>;
80 pinctrl-names = "default";
81
82 reset {
83 label = "reset";
84 gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
85 linux,code = <KEY_RESTART>;
86 };
87 };
88
89 beeper {
90 compatible = "gpio-beeper";
91
92 pinctrl-0 = <&beeper_pins>;
93 pinctrl-names = "default";
94
95 gpios = <&qcom_pinmux 55 GPIO_ACTIVE_HIGH>;
96 };
97 };
98
99 &rpm {
100 pinctrl-0 = <&rpm_pins>;
101 pinctrl-names = "default";
102 };
103
104 &nand_controller {
105 status = "okay";
106
107 pinctrl-0 = <&nand_pins>;
108 pinctrl-names = "default";
109
110 mt29f2g08abbeah4@0 {
111 compatible = "qcom,nandcs";
112
113 reg = <0>;
114
115 nand-ecc-strength = <4>;
116 nand-bus-width = <8>;
117 nand-ecc-step-size = <512>;
118
119 nand-is-boot-medium;
120 qcom,boot_pages_size = <0x1180000>;
121
122 partitions {
123 compatible = "fixed-partitions";
124 #address-cells = <1>;
125 #size-cells = <1>;
126
127 SBL1@0 {
128 label = "SBL1";
129 reg = <0x0000000 0x0040000>;
130 read-only;
131 };
132
133 MIBIB@40000 {
134 label = "MIBIB";
135 reg = <0x0040000 0x0140000>;
136 read-only;
137 };
138
139 SBL2@180000 {
140 label = "SBL2";
141 reg = <0x0180000 0x0140000>;
142 read-only;
143 };
144
145 SBL3@2c0000 {
146 label = "SBL3";
147 reg = <0x02c0000 0x0280000>;
148 read-only;
149 };
150
151 DDRCONFIG@540000 {
152 label = "DDRCONFIG";
153 reg = <0x0540000 0x0120000>;
154 read-only;
155 };
156
157 SSD@660000 {
158 label = "SSD";
159 reg = <0x0660000 0x0120000>;
160 read-only;
161 };
162
163 TZ@780000 {
164 label = "TZ";
165 reg = <0x0780000 0x0280000>;
166 read-only;
167 };
168
169 RPM@a00000 {
170 label = "RPM";
171 reg = <0x0a00000 0x0280000>;
172 read-only;
173 };
174
175 APPSBL@c80000 {
176 label = "APPSBL";
177 reg = <0x0c80000 0x0500000>;
178 read-only;
179 };
180
181 APPSBLENV@1180000 {
182 label = "APPSBLENV";
183 reg = <0x1180000 0x0080000>;
184 };
185
186 ART@1200000 {
187 label = "ART";
188 reg = <0x1200000 0x0140000>;
189 };
190
191 ubi@1340000 {
192 label = "ubi";
193 reg = <0x1340000 0x4000000>;
194 };
195
196 BOOTCONFIG@5340000 {
197 label = "BOOTCONFIG";
198 reg = <0x5340000 0x0060000>;
199 };
200
201 SBL2-1@53a0000- {
202 label = "SBL2_1";
203 reg = <0x53a0000 0x0140000>;
204 read-only;
205 };
206
207 SBL3-1@54e0000 {
208 label = "SBL3_1";
209 reg = <0x54e0000 0x0280000>;
210 read-only;
211 };
212
213 DDRCONFIG-1@5760000 {
214 label = "DDRCONFIG_1";
215 reg = <0x5760000 0x0120000>;
216 read-only;
217 };
218
219 SSD-1@5880000 {
220 label = "SSD_1";
221 reg = <0x5880000 0x0120000>;
222 read-only;
223 };
224
225 TZ-1@59a0000 {
226 label = "TZ_1";
227 reg = <0x59a0000 0x0280000>;
228 read-only;
229 };
230
231 RPM-1@5c20000 {
232 label = "RPM_1";
233 reg = <0x5c20000 0x0280000>;
234 read-only;
235 };
236
237 BOOTCONFIG1@5ea0000 {
238 label = "BOOTCONFIG1";
239 reg = <0x5ea0000 0x0060000>;
240 };
241
242 APPSBL-1@5f00000 {
243 label = "APPSBL_1";
244 reg = <0x5f00000 0x0500000>;
245 read-only;
246 };
247
248 ubi-1@6400000 {
249 label = "ubi_1";
250 reg = <0x6400000 0x4000000>;
251 };
252
253 unused@a400000 {
254 label = "unused";
255 reg = <0xa400000 0x5c00000>;
256 };
257 };
258 };
259 };
260
261 &adm_dma {
262 status = "okay";
263 };
264
265 &mdio0 {
266 status = "okay";
267
268 pinctrl-0 = <&mdio0_pins>;
269 pinctrl-names = "default";
270
271 ethernet-phy@0 {
272 reg = <0>;
273 qca,ar8327-initvals = <
274 0x00004 0x7600000 /* PAD0_MODE */
275 0x00008 0x1000000 /* PAD5_MODE */
276 0x0000c 0x80 /* PAD6_MODE */
277 0x000e4 0x6a545 /* MAC_POWER_SEL */
278 0x000e0 0xc74164de /* SGMII_CTRL */
279 0x0007c 0x4e /* PORT0_STATUS */
280 0x00094 0x4e /* PORT6_STATUS */
281 >;
282 };
283
284 ethernet-phy@4 {
285 reg = <4>;
286 };
287 };
288
289 &gmac1 {
290 status = "okay";
291
292 pinctrl-0 = <&rgmii2_pins>;
293 pinctrl-names = "default";
294
295 phy-mode = "rgmii";
296 qcom,id = <1>;
297
298 fixed-link {
299 speed = <1000>;
300 full-duplex;
301 };
302 };
303
304 &gmac2 {
305 status = "okay";
306
307 phy-mode = "sgmii";
308 qcom,id = <2>;
309
310 fixed-link {
311 speed = <1000>;
312 full-duplex;
313 };
314 };
315
316 &gsbi4_serial {
317 pinctrl-0 = <&uart0_pins>;
318 pinctrl-names = "default";
319 };
320
321 &flash {
322 compatible = "jedec,spi-nor";
323 };
324
325 &sata_phy {
326 status = "disabled";
327 };
328
329 &sata {
330 status = "disabled";
331 };
332
333 &ss_phy_0 { /* USB3 port 0 SS phy */
334 status = "okay";
335
336 rx_eq = <2>;
337 tx_deamp_3_5db = <32>;
338 mpll = <160>;
339 };
340
341 &ss_phy_1 { /* USB3 port 1 SS phy */
342 status = "okay";
343
344 rx_eq = <2>;
345 tx_deamp_3_5db = <32>;
346 mpll = <160>;
347 };
348
349 &pcie0 {
350 status = "okay";
351
352 /delete-property/ pinctrl-0;
353 /delete-property/ pinctrl-names;
354 /delete-property/ perst-gpios;
355 };
356
357 &pcie1 {
358 status = "okay";
359 };
360
361 &pcie2 {
362 status = "okay";
363
364 /delete-property/ pinctrl-0;
365 /delete-property/ pinctrl-names;
366 /delete-property/ perst-gpios;
367 };
368
369 &qcom_pinmux {
370 pinctrl-names = "default";
371 pinctrl-0 = <&state_default>;
372
373 state_default: pinctrl0 {
374 pcie0_pcie2_perst {
375 pins = "gpio3";
376 function = "gpio";
377 drive-strength = <2>;
378 bias-disable;
379 output-high;
380 };
381 };
382
383 led_pins: led_pins {
384 mux {
385 pins = "gpio7", "gpio8", "gpio9", "gpio22",
386 "gpio23", "gpio24", "gpio25", "gpio53";
387 function = "gpio";
388 drive-strength = <2>;
389 bias-pull-up;
390 };
391 };
392
393 button_pins: button_pins {
394 mux {
395 pins = "gpio54";
396 function = "gpio";
397 drive-strength = <2>;
398 bias-pull-up;
399 };
400 };
401
402 beeper_pins: beeper_pins {
403 mux {
404 pins = "gpio55";
405 function = "gpio";
406 drive-strength = <2>;
407 bias-pull-up;
408 };
409 };
410
411 rpm_pins: rpm_pins {
412 mux {
413 pins = "gpio12", "gpio13";
414 function = "gsbi4";
415 drive-strength = <10>;
416 bias-disable;
417 };
418 };
419
420 uart0_pins: uart0_pins {
421 mux {
422 pins = "gpio10", "gpio11";
423 function = "gsbi4";
424 drive-strength = <10>;
425 bias-disable;
426 };
427 };
428
429 spi_pins: spi_pins {
430 mux {
431 pins = "gpio18", "gpio19";
432 function = "gsbi5";
433 drive-strength = <10>;
434 bias-pull-down;
435 };
436
437 clk {
438 pins = "gpio21";
439 function = "gsbi5";
440 drive-strength = <12>;
441 bias-pull-down;
442 };
443
444 cs {
445 pins = "gpio20";
446 function = "gpio";
447 drive-strength = <10>;
448 bias-pull-up;
449 };
450 };
451 };
452
453 &usb3_0 {
454 status = "okay";
455 };
456
457 &usb3_1 {
458 status = "okay";
459 };
460
461 &tcsr {
462 qcom,usb-ctrl-select = <TCSR_USB_SELECT_USB3_DUAL>;
463 };