d965f2724d3f7e22bf97905dc7bd6db49305c465
[openwrt/staging/robimarko.git] / target / linux / ipq40xx / files / arch / arm / boot / dts / qcom-ipq4019-mf18a.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 // Copyright (c) 2022, Pawel Dembicki <paweldembicki@gmail.com>.
3 // Copyright (c) 2022, Marcin Gajda <mgajda@o2.pl>.
4
5
6 #include "qcom-ipq4019.dtsi"
7 #include <dt-bindings/soc/qcom,tcsr.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/leds/common.h>
11
12 / {
13 model = "ZTE MF18A";
14 compatible = "zte,mf18a";
15
16 aliases {
17 led-boot = &led_power;
18 led-failsafe = &led_power;
19 led-running = &led_power;
20 led-upgrade = &led_power;
21 };
22
23 chosen {
24 /*
25 * bootargs forced by u-boot bootipq command:
26 * 'ubi.mtd=rootfs root=mtd:ubi_rootfs rootfstype=squashfs rootwait'
27 */
28 bootargs-append = " root=/dev/ubiblock0_1";
29 };
30
31 gpio-restart {
32 compatible = "gpio-restart";
33 gpios = <&tlmm 8 GPIO_ACTIVE_HIGH>;
34 };
35
36 leds {
37 compatible = "gpio-leds";
38
39 led_internal: led-0 {
40 label = "blue:internal";
41 gpios = <&tlmm 10 GPIO_ACTIVE_LOW>;
42 default-state = "keep";
43 };
44
45 led_power: led-1 {
46 function = LED_FUNCTION_POWER;
47 color = <LED_COLOR_ID_BLUE>;
48 gpios = <&tlmm 48 GPIO_ACTIVE_HIGH>;
49 default-state = "keep";
50 };
51
52 led-2 {
53 function = LED_FUNCTION_WLAN;
54 function = LED_FUNCTION_WLAN;
55 color = <LED_COLOR_ID_BLUE>;
56 gpios = <&tlmm 23 GPIO_ACTIVE_HIGH>;
57 linux,default-trigger = "phy0tpt";
58 };
59
60 led-3 {
61 function = LED_FUNCTION_WLAN;
62 color = <LED_COLOR_ID_RED>;
63 gpios = <&tlmm 26 GPIO_ACTIVE_HIGH>;
64 };
65
66 led-4 {
67 function = LED_FUNCTION_WLAN;
68 label = "blue:smart";
69 gpios = <&tlmm 22 GPIO_ACTIVE_HIGH>;
70 linux,default-trigger = "phy1tpt";
71 };
72
73 led-5 {
74 label = "red:smart";
75 gpios = <&tlmm 25 GPIO_ACTIVE_HIGH>;
76 };
77
78 resetzwave {
79 label = "resetzwave";
80 gpios = <&tlmm 11 GPIO_ACTIVE_HIGH>;
81 };
82 };
83
84 keys {
85 compatible = "gpio-keys";
86
87 reset {
88 label = "reset";
89 linux,code = <KEY_RESTART>;
90 gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
91 };
92
93 wps {
94 label = "wps";
95 linux,code = <KEY_WPS_BUTTON>;
96 gpios = <&tlmm 68 GPIO_ACTIVE_LOW>;
97 };
98 };
99
100 soc {
101 rng@22000 {
102 status = "okay";
103 };
104
105 mdio@90000 {
106 status = "okay";
107 pinctrl-0 = <&mdio_pins>;
108 pinctrl-names = "default";
109 reset-gpios = <&tlmm 47 GPIO_ACTIVE_LOW>;
110 reset-delay-us = <2000>;
111 };
112
113 tcsr@1949000 {
114 compatible = "qcom,tcsr";
115 reg = <0x1949000 0x100>;
116 qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
117 };
118
119 tcsr@194b000 {
120 /* select hostmode */
121 compatible = "qcom,tcsr";
122 reg = <0x194b000 0x100>;
123 qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
124 status = "okay";
125 };
126
127 ess_tcsr@1953000 {
128 compatible = "qcom,tcsr";
129 reg = <0x1953000 0x1000>;
130 qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
131 };
132
133 tcsr@1957000 {
134 compatible = "qcom,tcsr";
135 reg = <0x1957000 0x100>;
136 qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
137 };
138
139 usb2@60f8800 {
140 status = "okay";
141 };
142
143 usb3@8af8800 {
144 status = "okay";
145 };
146
147 crypto@8e3a000 {
148 status = "okay";
149 };
150
151 watchdog@b017000 {
152 status = "okay";
153 };
154 };
155 };
156
157 &blsp_dma {
158 status = "okay";
159 };
160
161 &blsp1_spi1 {
162 pinctrl-0 = <&spi_0_pins>;
163 pinctrl-names = "default";
164 status = "okay";
165 cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
166
167 flash@0 {
168 /* u-boot is looking for "n25q128a11" property */
169 compatible = "jedec,spi-nor", "n25q128a11";
170 #address-cells = <1>;
171 #size-cells = <1>;
172 reg = <0>;
173 spi-max-frequency = <24000000>;
174
175 partitions {
176 compatible = "fixed-partitions";
177 #address-cells = <1>;
178 #size-cells = <1>;
179
180 partition@0 {
181 label = "0:SBL1";
182 reg = <0x0 0x40000>;
183 read-only;
184 };
185
186 partition@40000 {
187 label = "0:MIBIB";
188 reg = <0x40000 0x20000>;
189 read-only;
190 };
191
192 partition@60000 {
193 label = "0:QSEE";
194 reg = <0x60000 0x60000>;
195 read-only;
196 };
197
198 partition@c0000 {
199 label = "0:CDT";
200 reg = <0xc0000 0x10000>;
201 read-only;
202 };
203
204 partition@d0000 {
205 label = "0:DDRPARAMS";
206 reg = <0xd0000 0x10000>;
207 read-only;
208 };
209
210 partition@e0000 {
211 label = "0:APPSBLENV";
212 reg = <0xe0000 0x10000>;
213 read-only;
214 };
215
216 partition@f0000 {
217 label = "0:APPSBL";
218 reg = <0xf0000 0xc0000>;
219 read-only;
220 };
221
222 partition@1b0000 {
223 label = "0:reserved1";
224 reg = <0x1b0000 0x50000>;
225 read-only;
226 };
227 };
228 };
229 };
230
231 &blsp1_uart1 {
232 pinctrl-0 = <&serial_pins>;
233 pinctrl-names = "default";
234 status = "okay";
235 };
236
237 &cryptobam {
238 status = "okay";
239 };
240
241 &gmac {
242 status = "okay";
243 nvmem-cell-names = "mac-address";
244 nvmem-cells = <&macaddr_config_0 0>;
245 };
246
247 &switch {
248 status = "okay";
249 };
250
251 &swport2 {
252 status = "okay";
253
254 label = "wan";
255
256 nvmem-cell-names = "mac-address";
257 nvmem-cells = <&macaddr_config_0 1>;
258 };
259
260 &swport3 {
261 status = "okay";
262
263 label = "lan";
264 };
265
266 &nand {
267 pinctrl-0 = <&nand_pins>;
268 pinctrl-names = "default";
269 status = "okay";
270
271 nand@0 {
272 partitions {
273 compatible = "fixed-partitions";
274 #address-cells = <1>;
275 #size-cells = <1>;
276
277 partition@0 {
278 label = "fota-flag";
279 reg = <0x0 0xa0000>;
280 read-only;
281 };
282
283 partition@a0000 {
284 label = "ART";
285 reg = <0xa0000 0x80000>;
286 read-only;
287
288 nvmem-layout {
289 compatible = "fixed-layout";
290 #address-cells = <1>;
291 #size-cells = <1>;
292
293 precal_art_1000: precal@1000 {
294 reg = <0x1000 0x2f20>;
295 };
296
297 precal_art_9000: precal@9000 {
298 reg = <0x9000 0x2f20>;
299 };
300 };
301 };
302
303 partition@120000 {
304 label = "mac";
305 reg = <0x120000 0x80000>;
306 read-only;
307
308 nvmem-layout {
309 compatible = "fixed-layout";
310 #address-cells = <1>;
311 #size-cells = <1>;
312
313 macaddr_config_0: macaddr@0 {
314 compatible = "mac-base";
315 reg = <0x0 0x6>;
316 #nvmem-cell-cells = <1>;
317 };
318 };
319 };
320
321 partition@1a0000 {
322 label = "reserved2";
323 reg = <0x1a0000 0xc0000>;
324 read-only;
325 };
326
327 partition@260000 {
328 label = "cfg-param";
329 reg = <0x260000 0x400000>;
330 read-only;
331 };
332
333 partition@660000 {
334 label = "log";
335 reg = <0x660000 0x400000>;
336 };
337
338 partition@a60000 {
339 label = "oops";
340 reg = <0xa60000 0xa0000>;
341 };
342
343 partition@b00000 {
344 label = "reserved3";
345 reg = <0xb00000 0x500000>;
346 read-only;
347 };
348
349 partition@1000000 {
350 label = "web";
351 reg = <0x1000000 0x800000>;
352 };
353
354 partition@1800000 {
355 label = "rootfs";
356 reg = <0x1800000 0x1d00000>;
357 };
358
359 partition@3500000 {
360 label = "data";
361 reg = <0x3500000 0x1900000>;
362 };
363
364 partition@4e00000 {
365 label = "fota";
366 reg = <0x4e00000 0x2800000>;
367
368 };
369 partition@7600000 {
370 label = "iot-db";
371 reg = <0x7600000 0xa00000>;
372 };
373 };
374 };
375 };
376
377 &qpic_bam {
378 status = "okay";
379 };
380
381 &tlmm {
382 i2c_0_pins: i2c_0_pinmux {
383 mux {
384 pins = "gpio20", "gpio21";
385 function = "blsp_i2c0";
386 bias-disable;
387 };
388 };
389
390 mdio_pins: mdio_pinmux {
391 mux_1 {
392 pins = "gpio6";
393 function = "mdio";
394 bias-pull-up;
395 };
396
397 mux_2 {
398 pins = "gpio7";
399 function = "mdc";
400 bias-pull-up;
401 };
402 };
403
404 nand_pins: nand_pins {
405 pullups {
406 pins = "gpio52", "gpio53", "gpio58",
407 "gpio59";
408 function = "qpic";
409 bias-pull-up;
410 };
411
412 pulldowns {
413 pins = "gpio54", "gpio55", "gpio56",
414 "gpio57", "gpio60",
415 "gpio62", "gpio63", "gpio64",
416 "gpio65", "gpio66", "gpio67",
417 "gpio69";
418 function = "qpic";
419 bias-pull-down;
420 };
421 };
422
423 serial_pins: serial_pinmux {
424 mux {
425 pins = "gpio16", "gpio17";
426 function = "blsp_uart0";
427 bias-disable;
428 };
429 };
430
431 spi_0_pins: spi_0_pinmux {
432 pinmux {
433 function = "blsp_spi0";
434 pins = "gpio13", "gpio14", "gpio15";
435 drive-strength = <12>;
436 bias-disable;
437 };
438
439 pinmux_cs {
440 function = "gpio";
441 pins = "gpio12";
442 drive-strength = <2>;
443 bias-disable;
444 output-high;
445 };
446 };
447 };
448
449 &usb2_hs_phy {
450 status = "okay";
451 };
452
453 &usb3_ss_phy {
454 status = "okay";
455 };
456
457 &usb3_hs_phy {
458 status = "okay";
459 };
460
461 &wifi0 {
462 status = "okay";
463 nvmem-cell-names = "pre-calibration", "mac-address";
464 nvmem-cells = <&precal_art_1000>, <&macaddr_config_0 2>;
465 qcom,ath10k-calibration-variant = "ZTE-MF18A";
466 };
467
468 //* This node is used for 5Ghz on QCA9982 */
469 &pcie0 {
470 status = "okay";
471 perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
472 wake-gpio = <&tlmm 40 GPIO_ACTIVE_LOW>;
473 clkreq-gpio = <&tlmm 39 GPIO_ACTIVE_LOW>;
474
475 bridge@0,0 {
476 reg = <0x00000000 0 0 0 0>;
477 #address-cells = <3>;
478 #size-cells = <2>;
479 ranges;
480
481 wifi2: wifi@1,0 {
482 compatible = "pci168c,0040";
483 nvmem-cell-names = "pre-calibration", "mac-address";
484 nvmem-cells = <&precal_art_9000>, <&macaddr_config_0 3>;
485 qcom,ath10k-calibration-variant = "ZTE-MF18A";
486 reg = <0x00010000 0 0 0 0>;
487 };
488 };
489 };
490
491