target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-habanero-dvk.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2 /* Copyright (c) 2019, Robert Marko <robimarko@gmail.com> */
   3
   4 #include "qcom-ipq4019.dtsi"
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/input/input.h>
   7 #include <dt-bindings/soc/qcom,tcsr.h>
   8
   9 / {
  10         model = "8devices Habanero DVK";
  11         compatible = "8dev,habanero-dvk";
  12
  13         aliases {
  14                 led-boot = &led_status;
  15                 led-failsafe = &led_status;
  16                 led-running = &led_status;
  17                 led-upgrade = &led_upgrade;
  18                 ethernet1 = &swport5;
  19         };
  20
  21         soc {
  22                 rng@22000 {
  23                         status = "okay";
  24                 };
  25
  26                 mdio@90000 {
  27                         status = "okay";
  28
  29                         pinctrl-0 = <&mdio_pins>;
  30                         pinctrl-names = "default";
  31                 };
  32
  33                 counter@4a1000 {
  34                         compatible = "qcom,qca-gcnt";
  35                         reg = <0x4a1000 0x4>;
  36                 };
  37
  38                 tcsr@1949000 {
  39                         compatible = "qcom,tcsr";
  40                         reg = <0x1949000 0x100>;
  41                         qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  42                 };
  43
  44                 tcsr@194b000 {
  45                         status = "okay";
  46
  47                         compatible = "qcom,tcsr";
  48                         reg = <0x194b000 0x100>;
  49                         qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
  50                 };
  51
  52                 ess_tcsr@1953000 {
  53                         compatible = "qcom,tcsr";
  54                         reg = <0x1953000 0x1000>;
  55                         qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
  56                 };
  57
  58                 tcsr@1957000 {
  59                         compatible = "qcom,tcsr";
  60                         reg = <0x1957000 0x100>;
  61                         qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  62                 };
  63
  64                 usb2: usb2@60f8800 {
  65                         status = "okay";
  66                 };
  67
  68                 usb3: usb3@8af8800 {
  69                         status = "okay";
  70                 };
  71
  72                 crypto@8e3a000 {
  73                         status = "okay";
  74                 };
  75
  76                 watchdog@b017000 {
  77                         status = "okay";
  78                 };
  79         };
  80
  81         keys {
  82                 compatible = "gpio-keys";
  83
  84                 reset {
  85                         label = "reset";
  86                         gpios = <&tlmm 8 GPIO_ACTIVE_LOW>;
  87                         linux,code = <KEY_RESTART>;
  88                 };
  89         };
  90
  91         leds {
  92                 compatible = "gpio-leds";
  93
  94                 led_status: status {
  95                         label = "green:status";
  96                         gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>;
  97                         panic-indicator;
  98                 };
  99
 100                 led_upgrade: upgrade {
 101                         label = "green:upgrade";
 102                         gpios = <&tlmm 40 GPIO_ACTIVE_HIGH>;
 103                 };
 104
 105                 wlan2g {
 106                         label = "green:wlan2g";
 107                         gpios = <&tlmm 46 GPIO_ACTIVE_HIGH>;
 108                         linux,default-trigger = "phy0tpt";
 109                 };
 110
 111                 wlan5g {
 112                         label = "green:wlan5g";
 113                         gpios = <&tlmm 48 GPIO_ACTIVE_HIGH>;
 114                         linux,default-trigger = "phy1tpt";
 115                 };
 116         };
 117 };
 118
 119 &vqmmc {
 120         status = "okay";
 121 };
 122
 123 &sdhci {
 124         status = "okay";
 125
 126         pinctrl-0 = <&sd_pins>;
 127         pinctrl-names = "default";
 128         cd-gpios = <&tlmm 22 GPIO_ACTIVE_LOW>;
 129         vqmmc-supply = <&vqmmc>;
 130 };
 131
 132 &qpic_bam {
 133         status = "okay";
 134 };
 135
 136 &tlmm {
 137         mdio_pins: mdio_pinmux {
 138                 mux_1 {
 139                         pins = "gpio6";
 140                         function = "mdio";
 141                         bias-pull-up;
 142                 };
 143
 144                 mux_2 {
 145                         pins = "gpio7";
 146                         function = "mdc";
 147                         bias-pull-up;
 148                 };
 149         };
 150
 151         serial_pins: serial_pinmux {
 152                 mux {
 153                         pins = "gpio16", "gpio17";
 154                         function = "blsp_uart0";
 155                         bias-disable;
 156                 };
 157         };
 158
 159         spi_0_pins: spi_0_pinmux {
 160                 pinmux {
 161                         function = "blsp_spi0";
 162                         pins = "gpio13", "gpio14", "gpio15";
 163                         drive-strength = <12>;
 164                         bias-disable;
 165                 };
 166
 167                 pinmux_cs {
 168                         function = "gpio";
 169                         pins = "gpio12";
 170                         drive-strength = <2>;
 171                         bias-disable;
 172                         output-high;
 173                 };
 174         };
 175
 176         nand_pins: nand_pins {
 177                 pullups {
 178                         pins =  "gpio52", "gpio53", "gpio58", "gpio59";
 179                         function = "qpic";
 180                         bias-pull-up;
 181                 };
 182
 183                 pulldowns {
 184                         pins = "gpio54", "gpio55", "gpio56", "gpio57",
 185                                 "gpio60", "gpio62", "gpio63", "gpio64",
 186                                 "gpio65", "gpio66", "gpio67", "gpio68",
 187                                 "gpio69";
 188                         function = "qpic";
 189                         bias-pull-down;
 190                 };
 191         };
 192
 193         sd_pins: sd_pins {
 194                 pinmux {
 195                         function = "sdio";
 196                         pins = "gpio23", "gpio24", "gpio25", "gpio26",
 197                                 "gpio28", "gpio29", "gpio30", "gpio31";
 198                         drive-strength = <10>;
 199                 };
 200
 201                 pinmux_sd_clk {
 202                         function = "sdio";
 203                         pins = "gpio27";
 204                         drive-strength = <16>;
 205                 };
 206
 207                 pinmux_sd7 {
 208                         function = "sdio";
 209                         pins = "gpio32";
 210                         drive-strength = <10>;
 211                         bias-disable;
 212                 };
 213         };
 214 };
 215
 216 &blsp_dma {
 217         status = "okay";
 218 };
 219
 220 &blsp1_spi1 {
 221         status = "okay";
 222
 223         pinctrl-0 = <&spi_0_pins>;
 224         pinctrl-names = "default";
 225         cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
 226
 227         flash@0 {
 228                 compatible = "jedec,spi-nor";
 229                 spi-max-frequency = <24000000>;
 230                 reg = <0>;
 231
 232                 partitions {
 233                         compatible = "fixed-partitions";
 234                         #address-cells = <1>;
 235                         #size-cells = <1>;
 236
 237                         partition@0 {
 238                                 label = "SBL1";
 239                                 reg = <0x00000000 0x00040000>;
 240                                 read-only;
 241                         };
 242                         partition@40000 {
 243                                 label = "MIBIB";
 244                                 reg = <0x00040000 0x00020000>;
 245                                 read-only;
 246                         };
 247                         partition@60000 {
 248                                 label = "QSEE";
 249                                 reg = <0x00060000 0x00060000>;
 250                                 read-only;
 251                         };
 252                         partition@c0000 {
 253                                 label = "CDT";
 254                                 reg = <0x000c0000 0x00010000>;
 255                                 read-only;
 256                         };
 257                         partition@d0000 {
 258                                 label = "DDRPARAMS";
 259                                 reg = <0x000d0000 0x00010000>;
 260                                 read-only;
 261                         };
 262                         partition@e0000 {
 263                                 label = "APPSBLENV"; /* uboot env */
 264                                 reg = <0x000e0000 0x00010000>;
 265                                 read-only;
 266                         };
 267                         partition@f0000 {
 268                                 label = "APPSBL"; /* uboot */
 269                                 reg = <0x000f0000 0x00080000>;
 270                                 read-only;
 271                         };
 272                         partition@170000 {
 273                                 label = "ART";
 274                                 reg = <0x00170000 0x00010000>;
 275                                 read-only;
 276
 277                                 nvmem-layout {
 278                                         compatible = "fixed-layout";
 279                                         #address-cells = <1>;
 280                                         #size-cells = <1>;
 281
 282                                         precal_art_1000: precal@1000 {
 283                                                 reg = <0x1000 0x2f20>;
 284                                         };
 285
 286                                         precal_art_5000: precal@5000 {
 287                                                 reg = <0x5000 0x2f20>;
 288                                         };
 289                                 };
 290                         };
 291                         partition@180000 {
 292                                 label = "cfg";
 293                                 reg = <0x00180000 0x00040000>;
 294                         };
 295                         partition@1c0000 {
 296                                 label = "firmware";
 297                                 compatible = "denx,fit";
 298                                 reg = <0x001c0000 0x01e40000>;
 299                         };
 300                 };
 301         };
 302 };
 303
 304 /* Some DVK boards ship without NAND */
 305 &nand {
 306         status = "okay";
 307
 308         pinctrl-0 = <&nand_pins>;
 309         pinctrl-names = "default";
 310 };
 311
 312 &blsp1_uart1 {
 313         status = "okay";
 314
 315         pinctrl-0 = <&serial_pins>;
 316         pinctrl-names = "default";
 317 };
 318
 319 &cryptobam {
 320         status = "okay";
 321 };
 322
 323 &pcie0 {
 324         status = "okay";
 325
 326         perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
 327         wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>;
 328
 329         /* Free slot for use */
 330         bridge@0,0 {
 331                 reg = <0x00000000 0 0 0 0>;
 332                 #address-cells = <3>;
 333                 #size-cells = <2>;
 334                 ranges;
 335         };
 336 };
 337
 338 &gmac {
 339         status = "okay";
 340 };
 341
 342 &switch {
 343         status = "okay";
 344 };
 345
 346 &swport1 {
 347         status = "okay";
 348 };
 349
 350 &swport2 {
 351         status = "okay";
 352 };
 353
 354 &swport3 {
 355         status = "okay";
 356 };
 357
 358 &swport4 {
 359         status = "okay";
 360 };
 361
 362 &swport5 {
 363         status = "okay";
 364 };
 365
 366 &wifi0 {
 367         status = "okay";
 368         nvmem-cell-names = "pre-calibration";
 369         nvmem-cells = <&precal_art_1000>;
 370         qcom,ath10k-calibration-variant = "8devices-Habanero";
 371 };
 372
 373 &wifi1 {
 374         status = "okay";
 375         nvmem-cell-names = "pre-calibration";
 376         nvmem-cells = <&precal_art_5000>;
 377         qcom,ath10k-calibration-variant = "8devices-Habanero";
 378 };
 379
 380 &usb3_ss_phy {
 381         status = "okay";
 382 };
 383
 384 &usb3_hs_phy {
 385         status = "okay";
 386 };
 387
 388 &usb2_hs_phy {
 389         status = "okay";
 390 };