mediatek: add support for TP-Link TL-XDR3230 v1 xdr3230
authorChuanhong Guo <gch981213@gmail.com>
Sat, 30 Apr 2022 12:24:52 +0000 (20:24 +0800)
committerChuanhong Guo <gch981213@gmail.com>
Mon, 26 Feb 2024 03:44:38 +0000 (11:44 +0800)
Specifications:
- SoC: Mediatek MT7622B
- RAM: 256M
- Flash: EN25QH128 16M
- Ethernet: RTL8367S 4xGE
- WiFi: MT7622 2.4G 4x4 + MT7905 5G 4x4

Flash instruction:
TP-Link locks down their firmware and serial console, so the firmware
in this patch must be flashed with an SPI flash programmer.

1. Desolder the flash and backup the original flash content with a flash
   programmer.
2. Save the following script as gen_image.sh:
===========Script begins here==========

FULLFLASH=$1
IMG_DIR=$2
OUTPUT=$3
BL2=${IMG_DIR}/openwrt-mediatek-mt7622-tplink_tl-xdr3230-v1-preloader.bin
FIP=${IMG_DIR}/openwrt-mediatek-mt7622-tplink_tl-xdr3230-v1-bl31-uboot.fip
FW=${IMG_DIR}/openwrt-mediatek-mt7622-tplink_tl-xdr3230-v1-squashfs-sysupgrade.bin

macaddr_add() {
        local mac=$1
        local val=$2
        local oui=${mac%:*:*:*}
        local nic=${mac#*:*:*:}

        nic=$(printf "%06x" $((0x${nic//:/} + val & 0xffffff)) | sed 's/^\(.\{2\}\)\(.\{2\}\)\(.\{2\}\)/\1:\2:\3/')
        echo $oui:$nic
}

macaddr_2bin() {
        local mac=$1

        echo -ne \\x${mac//:/\\x}
}

dd if=/dev/zero bs=4k count=236 | tr "\000" "\377" > ${OUTPUT}
dd conv=notrunc if=${BL2} of=${OUTPUT} bs=4k
dd conv=notrunc if=${FIP} of=${OUTPUT} bs=4k seek=32
dd conv=notrunc if=${FULLFLASH} of=${OUTPUT} bs=4k seek=112 skip=110 count=2

MAC=$(hexdump -v -n 6 -s 0x6d81c -e '5/1 "%02x:" 1/1 "%02x"' ${FULLFLASH})
macaddr_2bin ${MAC} | dd conv=notrunc of=${OUTPUT} bs=1 seek=458756 count=6
MAC_5G=$(macaddr_add ${MAC} 2)
macaddr_2bin ${MAC_5G} | dd conv=notrunc of=${OUTPUT} bs=1 seek=462852 count=6
dd conv=notrunc if=${FW} of=${OUTPUT} bs=64k seek=8

===========Script ends here==========
3. generate a image for flash programmer:
   ./gen_image.sh original_flash_backup.bin openwrt/bin/targets/mediatek/mt7622 output_image.bin
4. flash the generated output_image.bin with a flash programmer and
   solder the chip back onto the device.

target/linux/mediatek/dts/mt7622-tplink_tl-xdr3230-v1.dts [new file with mode: 0644]
target/linux/mediatek/image/mt7622.mk
target/linux/mediatek/mt7622/base-files/lib/upgrade/platform.sh

diff --git a/target/linux/mediatek/dts/mt7622-tplink_tl-xdr3230-v1.dts b/target/linux/mediatek/dts/mt7622-tplink_tl-xdr3230-v1.dts
new file mode 100644 (file)
index 0000000..13b8e6e
--- /dev/null
@@ -0,0 +1,281 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+/dts-v1/;
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/gpio/gpio.h>
+
+#include "mt7622.dtsi"
+#include "mt6380.dtsi"
+
+/ {
+       model = "TP-Link TL-XDR3230 v1";
+       compatible = "tplink,tl-xdr3230-v1", "mediatek,mt7622";
+
+       aliases {
+               ethernet0 = &gmac0;
+               label-mac-device = &gmac0;
+               led-boot = &led_status;
+               led-failsafe = &led_status;
+               led-running = &led_status;
+               led-upgrade = &led_status;
+               serial0 = &uart0;
+       };
+
+       chosen {
+               stdout-path = "serial0:115200n8";
+               bootargs = "earlycon=uart8250,mmio32,0x11002000 swiotlb=512 root=/dev/fit0";
+               rootdisk = <&rootdisk>;
+       };
+
+       cpus {
+               cpu@0 {
+                       proc-supply = <&mt6380_vcpu_reg>;
+                       sram-supply = <&mt6380_vm_reg>;
+               };
+
+               cpu@1 {
+                       proc-supply = <&mt6380_vcpu_reg>;
+                       sram-supply = <&mt6380_vm_reg>;
+               };
+       };
+
+       gpio-leds {
+               compatible = "gpio-leds";
+               led_status: green_status {
+                       function = LED_FUNCTION_STATUS;
+                       color = <LED_COLOR_ID_GREEN>;
+                       gpios = <&pio 89 GPIO_ACTIVE_HIGH>;
+                       default-state = "on";
+               };
+
+               red_status {
+                       function = LED_FUNCTION_STATUS;
+                       color = <LED_COLOR_ID_RED>;
+                       gpios = <&pio 90 GPIO_ACTIVE_HIGH>;
+               };
+       };
+
+       gpio-keys {
+               compatible = "gpio-keys";
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               /* It seems that reset isn't connected to any MT7622 GPIO. Here's the WPS button. */
+               reset {
+                       label = "reset";
+                       gpios = <&pio 102 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RESTART>;
+               };
+       };
+
+       rtkgsw: rtkgsw@0 {
+               compatible = "mediatek,rtk-gsw";
+               mediatek,ethsys = <&ethsys>;
+               mediatek,mdio = <&mdio>;
+               mediatek,reset-pin = <&pio 54 0>;
+               status = "okay";
+       };
+};
+
+&eth {
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&eth_pins>;
+
+       gmac0: mac@0 {
+               compatible = "mediatek,eth-mac";
+               reg = <0>;
+               nvmem-cells = <&macaddr_factory_4>;
+               nvmem-cell-names = "mac-address";
+               phy-connection-type = "2500base-x";
+               fixed-link {
+                       speed = <2500>;
+                       full-duplex;
+                       pause;
+               };
+       };
+
+       gmac1: mac@1 {
+               compatible = "mediatek,eth-mac";
+               reg = <1>;
+               phy-mode = "rgmii";
+               nvmem-cells = <&macaddr_factory_4>;
+               nvmem-cell-names = "mac-address";
+               mac-address-increment = <1>;
+               fixed-link {
+                       speed = <1000>;
+                       full-duplex;
+                       pause;
+               };
+       };
+
+       mdio: mdio-bus {
+               #address-cells = <1>;
+               #size-cells = <0>;
+       };
+};
+
+&pcie0 {
+       status = "okay";
+
+       pinctrl-names = "default";
+       pinctrl-0 = <&pcie0_pins>;
+};
+
+&slot0 {
+       mt7915@0,0 {
+               reg = <0x0000 0 0 0 0>;
+               mediatek,mtd-eeprom = <&factory 0x1000>;
+               ieee80211-freq-limit = <5000000 6000000>;
+       };
+};
+
+&pio {
+       epa_elna_pins: epa-elna-pins {
+               mux {
+                       function = "antsel";
+                       groups = "antsel0", "antsel1", "antsel2", "antsel3",
+                               "antsel4", "antsel5", "antsel6", "antsel7",
+                               "antsel8", "antsel9", "antsel12", "antsel13",
+                               "antsel14", "antsel15", "antsel16", "antsel17";
+               };
+       };
+
+       eth_pins: eth-pins {
+               mux {
+                       function = "eth";
+                       groups = "mdc_mdio", "rgmii_via_gmac2";
+               };
+       };
+
+       pcie0_pins: pcie0-pins {
+               mux {
+                       function = "pcie";
+                       groups = "pcie0_pad_perst",
+                                "pcie0_0_waken",
+                                "pcie0_0_clkreq";
+               };
+       };
+
+       pmic_bus_pins: pmic-bus-pins {
+               mux {
+                       function = "pmic";
+                       groups = "pmic_bus";
+               };
+       };
+
+       spi_nor_pins: spi-nor-pins {
+               mux {
+                       function = "flash";
+                       groups = "spi_nor";
+               };
+       };
+
+       uart0_pins: uart0-pins {
+               mux {
+                       function = "uart";
+                       groups = "uart0_0_tx_rx";
+               };
+       };
+
+       watchdog_pins: watchdog-pins {
+               mux {
+                       function = "watchdog";
+                       groups = "watchdog";
+               };
+       };
+};
+
+&pwrap {
+       status = "okay";
+
+       pinctrl-names = "default";
+       pinctrl-0 = <&pmic_bus_pins>;
+};
+
+&nor_flash {
+       status = "okay";
+
+       pinctrl-names = "default";
+       pinctrl-0 = <&spi_nor_pins>;
+
+       flash@0 {
+               compatible = "jedec,spi-nor";
+               reg = <0>;
+               spi-tx-bus-width = <4>;
+               spi-rx-bus-width = <4>;
+               spi-max-frequency = <50000000>;
+
+               mtdparts: partitions {
+                       compatible = "fixed-partitions";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       partition@0 {
+                               label = "bl2";
+                               reg = <0x0 0x20000>;
+                               read-only;
+                       };
+
+                       partition@20000 {
+                               label = "fip";
+                               reg = <0x20000 0x40000>;
+                               read-only;
+                       };
+
+                       partition@60000 {
+                               label = "u-boot-env";
+                               reg = <0x60000 0x10000>;
+                       };
+
+                       factory: partition@70000 {
+                               label = "factory";
+                               reg = <0x70000 0x10000>;
+                               read-only;
+                       };
+
+                       rootdisk: partition@80000 {
+                               compatible = "denx,fit";
+                               label = "firmware";
+                               reg = <0x80000 0>;
+                       };
+               };
+       };
+};
+
+&rtc {
+       status = "disabled";
+};
+
+&uart0 {
+       status = "okay";
+
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart0_pins>;
+};
+
+&watchdog {
+       status = "okay";
+
+       pinctrl-names = "default";
+       pinctrl-0 = <&watchdog_pins>;
+};
+
+&wmac {
+       status = "okay";
+
+       pinctrl-names = "default";
+       pinctrl-0 = <&epa_elna_pins>;
+       mediatek,mtd-eeprom = <&factory 0x0>;
+};
+
+&factory {
+       compatible = "nvmem-cells";
+       #address-cells = <1>;
+       #size-cells = <1>;
+
+       macaddr_factory_4: macaddr@4 {
+               reg = <0x4 0x6>;
+       };
+};
index 2b39d1849cff7395a0ecec8856071d77eccdb251..f2fc605fb1545ad029d1e3976bc8ee370b3d4c68 100644 (file)
@@ -359,6 +359,22 @@ define Device/totolink_a8000ru
 endef
 TARGET_DEVICES += totolink_a8000ru
 
+define Device/tplink_tl-xdr3230-v1
+  DEVICE_VENDOR := TP-Link
+  DEVICE_MODEL := TL-XDR3230
+  DEVICE_VARIANT := v1
+  DEVICE_DTS := mt7622-tplink_tl-xdr3230-v1
+  DEVICE_DTS_DIR := ../dts
+  DEVICE_PACKAGES := kmod-mt7915-firmware swconfig
+  KERNEL := kernel-bin | lzma
+  KERNEL_INITRAMFS := kernel-bin | lzma | fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb with-initrd | pad-to 64k
+  IMAGE/sysupgrade.bin := append-kernel | fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb external-static-with-rootfs | pad-rootfs | append-metadata
+  ARTIFACTS := preloader.bin bl31-uboot.fip
+  ARTIFACT/preloader.bin := bl2 nor-1ddr
+  ARTIFACT/bl31-uboot.fip := bl31-uboot tplink_tl-xdr3230-v1
+endef
+TARGET_DEVICES += tplink_tl-xdr3230-v1
+
 define Device/ubnt_unifi-6-lr-v1
   DEVICE_VENDOR := Ubiquiti
   DEVICE_MODEL := UniFi 6 LR
index 236e8fdfb05a808dd817c93ad05fc8921ad456ac..d10698d8d628f0f6c3c1695974519e35ce0b48b8 100755 (executable)
@@ -8,6 +8,7 @@ platform_do_upgrade() {
        case "$board" in
        bananapi,bpi-r64|\
        linksys,e8450-ubi|\
+       tplink,tl-xdr3230-v1|\
        ubnt,unifi-6-lr-v1-ubootmod|\
        ubnt,unifi-6-lr-v2-ubootmod|\
        ubnt,unifi-6-lr-v3-ubootmod)