target/linux/starfive/patches-6.1/0095-spi-cadence-quadspi-Add-support-for-StarFive-JH7110-.patch

   1 From a3749d68d81488ae07878393485278eab24a5818 Mon Sep 17 00:00:00 2001
   2 From: William Qiu <william.qiu@starfivetech.com>
   3 Date: Thu, 2 Mar 2023 18:52:21 +0800
   4 Subject: [PATCH 095/122] spi: cadence-quadspi: Add support for StarFive JH7110
   5  QSPI
   6
   7 Add QSPI reset operation in device probe and add RISCV support to
   8 QUAD SPI Kconfig.
   9
  10 Co-developed-by: Ziv Xu <ziv.xu@starfivetech.com>
  11 Signed-off-by: Ziv Xu <ziv.xu@starfivetech.com>
  12 Signed-off-by: William Qiu <william.qiu@starfivetech.com>
  13 ---
  14  drivers/spi/Kconfig               |  2 +-
  15  drivers/spi/spi-cadence-quadspi.c | 21 ++++++++++++++++++++-
  16  2 files changed, 21 insertions(+), 2 deletions(-)
  17
  18 --- a/drivers/spi/Kconfig
  19 +++ b/drivers/spi/Kconfig
  20 @@ -230,7 +230,7 @@ config SPI_CADENCE
  21
  22  config SPI_CADENCE_QUADSPI
  23         tristate "Cadence Quad SPI controller"
  24 -       depends on OF && (ARM || ARM64 || X86 || COMPILE_TEST)
  25 +       depends on OF && (ARM || ARM64 || X86 || RISCV || COMPILE_TEST)
  26         help
  27           Enable support for the Cadence Quad SPI Flash controller.
  28
  29 --- a/drivers/spi/spi-cadence-quadspi.c
  30 +++ b/drivers/spi/spi-cadence-quadspi.c
  31 @@ -1575,7 +1575,7 @@ static int cqspi_setup_flash(struct cqsp
  32  static int cqspi_probe(struct platform_device *pdev)
  33  {
  34         const struct cqspi_driver_platdata *ddata;
  35 -       struct reset_control *rstc, *rstc_ocp;
  36 +       struct reset_control *rstc, *rstc_ocp, *rstc_ref;
  37         struct device *dev = &pdev->dev;
  38         struct spi_master *master;
  39         struct resource *res_ahb;
  40 @@ -1668,6 +1668,17 @@ static int cqspi_probe(struct platform_d
  41                 goto probe_reset_failed;
  42         }
  43
  44 +       if (of_device_is_compatible(pdev->dev.of_node, "starfive,jh7110-qspi")) {
  45 +               rstc_ref = devm_reset_control_get_optional_exclusive(dev, "rstc_ref");
  46 +               if (IS_ERR(rstc_ref)) {
  47 +                       ret = PTR_ERR(rstc_ref);
  48 +                       dev_err(dev, "Cannot get QSPI REF reset.\n");
  49 +                       goto probe_reset_failed;
  50 +               }
  51 +               reset_control_assert(rstc_ref);
  52 +               reset_control_deassert(rstc_ref);
  53 +       }
  54 +
  55         reset_control_assert(rstc);
  56         reset_control_deassert(rstc);
  57
  58 @@ -1827,6 +1838,10 @@ static const struct cqspi_driver_platdat
  59         .get_dma_status = cqspi_get_versal_dma_status,
  60  };
  61
  62 +static const struct cqspi_driver_platdata jh7110_qspi = {
  63 +       .quirks = CQSPI_DISABLE_DAC_MODE,
  64 +};
  65 +
  66  static const struct of_device_id cqspi_dt_ids[] = {
  67         {
  68                 .compatible = "cdns,qspi-nor",
  69 @@ -1852,6 +1867,10 @@ static const struct of_device_id cqspi_d
  70                 .compatible = "intel,socfpga-qspi",
  71                 .data = &socfpga_qspi,
  72         },
  73 +       {
  74 +               .compatible = "starfive,jh7110-qspi",
  75 +               .data = &jh7110_qspi,
  76 +       },
  77         { /* end of table */ }
  78  };
  79