1 From 35bc6491a7b24872155a616f7770d3a5d6e40344 Mon Sep 17 00:00:00 2001
2 From: Walker Chen <walker.chen@starfivetech.com>
3 Date: Thu, 19 Jan 2023 17:44:46 +0800
4 Subject: [PATCH 035/122] dt-bindings: power: Add starfive,jh7110-pmu
6 Add bindings for the Power Management Unit on the StarFive JH7110 SoC.
8 Signed-off-by: Walker Chen <walker.chen@starfivetech.com>
9 Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
10 Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
11 Reviewed-by: Heiko Stuebner <heiko@sntech.de>
13 .../bindings/power/starfive,jh7110-pmu.yaml | 45 +++++++++++++++++++
14 .../dt-bindings/power/starfive,jh7110-pmu.h | 17 +++++++
15 2 files changed, 62 insertions(+)
16 create mode 100644 Documentation/devicetree/bindings/power/starfive,jh7110-pmu.yaml
17 create mode 100644 include/dt-bindings/power/starfive,jh7110-pmu.h
20 +++ b/Documentation/devicetree/bindings/power/starfive,jh7110-pmu.yaml
22 +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
25 +$id: http://devicetree.org/schemas/power/starfive,jh7110-pmu.yaml#
26 +$schema: http://devicetree.org/meta-schemas/core.yaml#
28 +title: StarFive JH7110 Power Management Unit
31 + - Walker Chen <walker.chen@starfivetech.com>
34 + StarFive JH7110 SoC includes support for multiple power domains which can be
35 + powered on/off by software based on different application scenes to save power.
40 + - starfive,jh7110-pmu
48 + "#power-domain-cells":
55 + - "#power-domain-cells"
57 +additionalProperties: false
61 + pwrc: power-controller@17030000 {
62 + compatible = "starfive,jh7110-pmu";
63 + reg = <0x17030000 0x10000>;
65 + #power-domain-cells = <1>;
68 +++ b/include/dt-bindings/power/starfive,jh7110-pmu.h
70 +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
72 + * Copyright (C) 2022 StarFive Technology Co., Ltd.
73 + * Author: Walker Chen <walker.chen@starfivetech.com>
75 +#ifndef __DT_BINDINGS_POWER_JH7110_POWER_H__
76 +#define __DT_BINDINGS_POWER_JH7110_POWER_H__
78 +#define JH7110_PD_SYSTOP 0
79 +#define JH7110_PD_CPU 1
80 +#define JH7110_PD_GPUA 2
81 +#define JH7110_PD_VDEC 3
82 +#define JH7110_PD_VOUT 4
83 +#define JH7110_PD_ISP 5
84 +#define JH7110_PD_VENC 6