starfive: add new target for StarFive JH7100/7110 SoC
[openwrt/staging/981213.git] / target / linux / starfive / patches-6.1 / 0015-reset-starfive-Add-StarFive-JH7110-reset-driver.patch
1 From ea2f40c943f4a6d39a2f3ea4660266250d37c95a Mon Sep 17 00:00:00 2001
2 From: Hal Feng <hal.feng@starfivetech.com>
3 Date: Sat, 1 Apr 2023 19:19:27 +0800
4 Subject: [PATCH 015/122] reset: starfive: Add StarFive JH7110 reset driver
5
6 Add auxiliary driver to support StarFive JH7110 system
7 and always-on resets.
8
9 Tested-by: Tommaso Merciai <tomm.merciai@gmail.com>
10 Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
11 Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
12 Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
13 ---
14 drivers/reset/starfive/Kconfig | 8 +++
15 drivers/reset/starfive/Makefile | 1 +
16 .../reset/starfive/reset-starfive-jh7110.c | 70 +++++++++++++++++++
17 3 files changed, 79 insertions(+)
18 create mode 100644 drivers/reset/starfive/reset-starfive-jh7110.c
19
20 --- a/drivers/reset/starfive/Kconfig
21 +++ b/drivers/reset/starfive/Kconfig
22 @@ -10,3 +10,11 @@ config RESET_STARFIVE_JH7100
23 default ARCH_STARFIVE
24 help
25 This enables the reset controller driver for the StarFive JH7100 SoC.
26 +
27 +config RESET_STARFIVE_JH7110
28 + bool "StarFive JH7110 Reset Driver"
29 + depends on AUXILIARY_BUS && CLK_STARFIVE_JH7110_SYS
30 + select RESET_STARFIVE_JH71X0
31 + default ARCH_STARFIVE
32 + help
33 + This enables the reset controller driver for the StarFive JH7110 SoC.
34 --- a/drivers/reset/starfive/Makefile
35 +++ b/drivers/reset/starfive/Makefile
36 @@ -2,3 +2,4 @@
37 obj-$(CONFIG_RESET_STARFIVE_JH71X0) += reset-starfive-jh71x0.o
38
39 obj-$(CONFIG_RESET_STARFIVE_JH7100) += reset-starfive-jh7100.o
40 +obj-$(CONFIG_RESET_STARFIVE_JH7110) += reset-starfive-jh7110.o
41 --- /dev/null
42 +++ b/drivers/reset/starfive/reset-starfive-jh7110.c
43 @@ -0,0 +1,70 @@
44 +// SPDX-License-Identifier: GPL-2.0-or-later
45 +/*
46 + * Reset driver for the StarFive JH7110 SoC
47 + *
48 + * Copyright (C) 2022 StarFive Technology Co., Ltd.
49 + */
50 +
51 +#include <linux/auxiliary_bus.h>
52 +
53 +#include "reset-starfive-jh71x0.h"
54 +
55 +#include <dt-bindings/reset/starfive,jh7110-crg.h>
56 +
57 +struct jh7110_reset_info {
58 + unsigned int nr_resets;
59 + unsigned int assert_offset;
60 + unsigned int status_offset;
61 +};
62 +
63 +static const struct jh7110_reset_info jh7110_sys_info = {
64 + .nr_resets = JH7110_SYSRST_END,
65 + .assert_offset = 0x2F8,
66 + .status_offset = 0x308,
67 +};
68 +
69 +static const struct jh7110_reset_info jh7110_aon_info = {
70 + .nr_resets = JH7110_AONRST_END,
71 + .assert_offset = 0x38,
72 + .status_offset = 0x3C,
73 +};
74 +
75 +static int jh7110_reset_probe(struct auxiliary_device *adev,
76 + const struct auxiliary_device_id *id)
77 +{
78 + struct jh7110_reset_info *info = (struct jh7110_reset_info *)(id->driver_data);
79 + void __iomem **base = (void __iomem **)dev_get_drvdata(adev->dev.parent);
80 +
81 + if (!info || !base)
82 + return -ENODEV;
83 +
84 + return reset_starfive_jh71x0_register(&adev->dev, adev->dev.parent->of_node,
85 + *base + info->assert_offset,
86 + *base + info->status_offset,
87 + NULL,
88 + info->nr_resets,
89 + NULL);
90 +}
91 +
92 +static const struct auxiliary_device_id jh7110_reset_ids[] = {
93 + {
94 + .name = "clk_starfive_jh7110_sys.rst-sys",
95 + .driver_data = (kernel_ulong_t)&jh7110_sys_info,
96 + },
97 + {
98 + .name = "clk_starfive_jh7110_sys.rst-aon",
99 + .driver_data = (kernel_ulong_t)&jh7110_aon_info,
100 + },
101 + { /* sentinel */ }
102 +};
103 +MODULE_DEVICE_TABLE(auxiliary, jh7110_reset_ids);
104 +
105 +static struct auxiliary_driver jh7110_reset_driver = {
106 + .probe = jh7110_reset_probe,
107 + .id_table = jh7110_reset_ids,
108 +};
109 +module_auxiliary_driver(jh7110_reset_driver);
110 +
111 +MODULE_AUTHOR("Hal Feng <hal.feng@starfivetech.com>");
112 +MODULE_DESCRIPTION("StarFive JH7110 reset driver");
113 +MODULE_LICENSE("GPL");