realtek: add support for chassis fan on ZyXEL XGS1250-12
[openwrt/staging/robimarko.git] / target / linux / realtek / dts-5.15 / rtl9302_zyxel_xgs1250-12.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /dts-v1/;
3
4 #include "rtl930x.dtsi"
5
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/leds/common.h>
9 #include <dt-bindings/thermal/thermal.h>
10
11 / {
12 compatible = "zyxel,xgs1250-12", "realtek,rtl838x-soc";
13 model = "Zyxel XGS1250-12 Switch";
14
15 aliases {
16 led-boot = &led_pwr_sys;
17 led-failsafe = &led_pwr_sys;
18 led-running = &led_pwr_sys;
19 led-upgrade = &led_pwr_sys;
20 };
21
22 keys {
23 compatible = "gpio-keys";
24
25 mode {
26 label = "reset";
27 gpios = <&gpio0 22 GPIO_ACTIVE_LOW>;
28 linux,code = <KEY_RESTART>;
29 };
30 };
31
32 /* i2c of the SFP cage: port 12 */
33 i2c0: i2c-rtl9300@1b00036c {
34 compatible = "realtek,rtl9300-i2c";
35 reg = <0x1b00036c 0x3c>;
36 #address-cells = <1>;
37 #size-cells = <0>;
38 sda-pin = <10>;
39 scl-pin = <8>;
40 clock-frequency = <100000>;
41 };
42
43 leds {
44 compatible = "gpio-leds";
45
46 pinctrl-names = "default";
47 pinctrl-0 = <&pinmux_disable_sys_led>;
48
49 led_pwr_sys: led-0 {
50 color = <LED_COLOR_ID_GREEN>;
51 function = LED_FUNCTION_POWER;
52 gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
53 };
54 };
55
56 sfp0: sfp-p12 {
57 compatible = "sff,sfp";
58 i2c-bus = <&i2c0>;
59 los-gpio = <&gpio0 17 GPIO_ACTIVE_HIGH>;
60 tx-fault-gpio = <&gpio0 20 GPIO_ACTIVE_HIGH>;
61 mod-def0-gpio = <&gpio0 16 GPIO_ACTIVE_LOW>;
62 tx-disable-gpio = <&gpio0 15 GPIO_ACTIVE_HIGH>;
63 };
64
65 led_set: led_set {
66 compatible = "realtek,rtl9300-leds";
67 active-low;
68
69 led_set0 = <0x0a20 0x0b80>; // LED set 0: 1000Mbps, 10/100Mbps
70 led_set1 = <0x0a0b 0x0a28 0x0a82 0x0a0b>; // LED set 1: (10G, 5G, 2.5G) (2.5G, 1G)
71 // (5G, 10/100) (10G, 5G, 2.5G)
72 led_set2 = <0x0a20 0x0a01>; // LED set 2: 1000MBit, 10GBit
73 };
74
75 thermal-zones {
76 phy24-thermal {
77 /* Poll every 10 seconds */
78 polling-delay-passive = <10000>;
79 polling-delay = <10000>;
80 thermal-sensors = <&phy24>;
81
82 trips {
83 phy24_trip0: phy24-trip0 {
84 /* At 80 degrees turn on fan */
85 temperature = <80000>;
86 hysteresis = <1000>;
87 type = "active";
88 };
89
90 phy24_trip1: phy24-trip1 {
91 /* At 108 degrees phys exceed spec */
92 temperature = <108000>;
93 hysteresis = <5000>;
94 type = "critical";
95 };
96 };
97
98 cooling-maps {
99 map {
100 trip = <&phy24_trip0>;
101 cooling-device = <&chassis_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
102 };
103 };
104 };
105
106 phy25-thermal {
107 /* Poll every 10 seconds */
108 polling-delay-passive = <10000>;
109 polling-delay = <10000>;
110 thermal-sensors = <&phy25>;
111
112 trips {
113 phy25_trip0: phy25-trip0 {
114 /* At 80 degrees turn on fan */
115 temperature = <80000>;
116 hysteresis = <1000>;
117 type = "active";
118 };
119
120 phy25_trip1: phy25-trip1 {
121 /* At 108 degrees phys exceed spec */
122 temperature = <108000>;
123 hysteresis = <5000>;
124 type = "critical";
125 };
126 };
127
128 cooling-maps {
129 map {
130 trip = <&phy25_trip0>;
131 cooling-device = <&chassis_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
132 };
133 };
134 };
135
136 phy26-thermal {
137 /* Poll every 10 seconds */
138 polling-delay-passive = <10000>;
139 polling-delay = <10000>;
140 thermal-sensors = <&phy26>;
141
142 trips {
143 phy26_trip0: phy26-trip0 {
144 /* At 80 degrees turn on fan */
145 temperature = <80000>;
146 hysteresis = <1000>;
147 type = "active";
148 };
149
150 phy26_trip1: phy26-trip1 {
151 /* At 108 degrees phys exceed spec */
152 temperature = <108000>;
153 hysteresis = <5000>;
154 type = "critical";
155 };
156 };
157
158 cooling-maps {
159 map {
160 trip = <&phy26_trip0>;
161 cooling-device = <&chassis_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
162 };
163 };
164 };
165 };
166
167 /* YEN SUN TECHNOLOGY FD122510LL-N fan */
168 chassis_fan: gpio-fan {
169 compatible = "gpio-fan";
170 gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
171 gpio-fan,speed-map = <0 0
172 7000 1>;
173 #cooling-cells = <2>;
174 };
175 };
176
177 &spi0 {
178 status = "okay";
179 flash@0 {
180 compatible = "jedec,spi-nor";
181 reg = <0>;
182 spi-max-frequency = <10000000>;
183
184 partitions {
185 compatible = "fixed-partitions";
186 #address-cells = <1>;
187 #size-cells = <1>;
188
189 partition@0 {
190 label = "u-boot";
191 reg = <0x0 0xe0000>;
192 read-only;
193 };
194 partition@e0000 {
195 label = "u-boot-env";
196 reg = <0xe0000 0x10000>;
197 };
198 partition@f0000 {
199 label = "u-boot-env2";
200 reg = <0xf0000 0x10000>;
201 read-only;
202 };
203 partition@100000 {
204 label = "jffs";
205 reg = <0x100000 0x100000>;
206 };
207 partition@200000 {
208 label = "jffs2";
209 reg = <0x200000 0x100000>;
210 };
211 partition@b300000 {
212 label = "firmware";
213 reg = <0x300000 0xce0000>;
214 compatible = "openwrt,uimage", "denx,uimage";
215 openwrt,ih-magic = <0x93001250>;
216 };
217 partition@fe0000 {
218 label = "log";
219 reg = <0xfe0000 0x20000>;
220 };
221 };
222 };
223 };
224
225 &ethernet0 {
226 mdio: mdio-bus {
227 compatible = "realtek,rtl838x-mdio";
228 regmap = <&ethernet0>;
229 #address-cells = <1>;
230 #size-cells = <0>;
231
232 /* External RTL8218D PHY */
233 phy0: ethernet-phy@0 {
234 reg = <0>;
235 compatible = "ethernet-phy-ieee802.3-c22";
236 rtl9300,smi-address = <0 0>;
237 sds = < 2 >;
238 // Disabled because we do not know how to bring up again
239 // reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
240 };
241 phy1: ethernet-phy@1 {
242 reg = <1>;
243 compatible = "ethernet-phy-ieee802.3-c22";
244 rtl9300,smi-address = <0 1>;
245 };
246 phy2: ethernet-phy@2 {
247 reg = <2>;
248 compatible = "ethernet-phy-ieee802.3-c22";
249 rtl9300,smi-address = <0 2>;
250 };
251 phy3: ethernet-phy@3 {
252 reg = <3>;
253 compatible = "ethernet-phy-ieee802.3-c22";
254 rtl9300,smi-address = <0 3>;
255 };
256 phy4: ethernet-phy@4 {
257 reg = <4>;
258 compatible = "ethernet-phy-ieee802.3-c22";
259 rtl9300,smi-address = <0 4>;
260 };
261 phy5: ethernet-phy@5 {
262 reg = <5>;
263 compatible = "ethernet-phy-ieee802.3-c22";
264 rtl9300,smi-address = <0 5>;
265 };
266 phy6: ethernet-phy@6 {
267 reg = <6>;
268 compatible = "ethernet-phy-ieee802.3-c22";
269 rtl9300,smi-address = <0 6>;
270 };
271 phy7: ethernet-phy@7 {
272 reg = <7>;
273 compatible = "ethernet-phy-ieee802.3-c22";
274 rtl9300,smi-address = <0 7>;
275 };
276
277 /* External Aquantia 113C PHYs */
278 phy24: ethernet-phy@24 {
279 reg = <24>;
280 compatible = "ethernet-phy-ieee802.3-c45";
281 rtl9300,smi-address = <1 8>;
282 sds = < 6 >;
283 // Disabled because we do not know how to bring up again
284 // reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
285 #thermal-sensor-cells = <0>;
286 };
287
288 phy25: ethernet-phy@25 {
289 reg = <25>;
290 compatible = "ethernet-phy-ieee802.3-c45";
291 rtl9300,smi-address = <2 8>;
292 sds = < 7 >;
293 // Disabled because we do not know how to bring up again
294 // reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
295 #thermal-sensor-cells = <0>;
296 };
297
298 phy26: ethernet-phy@26 {
299 reg = <26>;
300 compatible = "ethernet-phy-ieee802.3-c45";
301 rtl9300,smi-address = <3 8>;
302 sds = < 8 >;
303 // Disabled because we do not know how to bring up again
304 // reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
305 #thermal-sensor-cells = <0>;
306 };
307
308 /* SFP Ports */
309 phy27: ethernet-phy@27 {
310 compatible = "ethernet-phy-ieee802.3-c22";
311 phy-is-integrated;
312 reg = <27>;
313 rtl9300,smi-address = <4 0>;
314 sds = < 9 >;
315 };
316
317 };
318 };
319
320 &switch0 {
321 ports {
322 #address-cells = <1>;
323 #size-cells = <0>;
324
325 port@0 {
326 reg = <0>;
327 label = "lan1";
328 phy-handle = <&phy0>;
329 phy-mode = "xgmii";
330 led-set = <0>;
331 };
332 port@1 {
333 reg = <1>;
334 label = "lan2";
335 phy-handle = <&phy1>;
336 phy-mode = "xgmii";
337 led-set = <0>;
338 };
339 port@2 {
340 reg = <2>;
341 label = "lan3";
342 phy-handle = <&phy2>;
343 phy-mode = "xgmii";
344 led-set = <0>;
345 };
346 port@3 {
347 reg = <3>;
348 label = "lan4";
349 phy-handle = <&phy3>;
350 phy-mode = "xgmii";
351 led-set = <0>;
352 };
353 port@4 {
354 reg = <4>;
355 label = "lan5";
356 phy-handle = <&phy4>;
357 phy-mode = "xgmii";
358 led-set = <0>;
359 };
360 port@5 {
361 reg = <5>;
362 label = "lan6";
363 phy-handle = <&phy5>;
364 phy-mode = "xgmii";
365 led-set = <0>;
366 };
367 port@6 {
368 reg = <6>;
369 label = "lan7";
370 phy-handle = <&phy6>;
371 phy-mode = "xgmii";
372 led-set = <0>;
373 };
374 port@7 {
375 reg = <7>;
376 label = "lan8";
377 phy-handle = <&phy7>;
378 phy-mode = "xgmii";
379 led-set = <0>;
380 };
381
382 port@24 {
383 reg = <24>;
384 label = "lan9";
385 phy-mode = "usxgmii";
386 phy-handle = <&phy24>;
387 led-set = <1>;
388 };
389 port@25 {
390 reg = <25>;
391 label = "lan10";
392 phy-mode = "usxgmii";
393 phy-handle = <&phy25>;
394 led-set = <1>;
395 };
396 port@26 {
397 reg = <26>;
398 label = "lan11";
399 phy-mode = "usxgmii";
400 phy-handle = <&phy26>;
401 led-set = <1>;
402 };
403
404 port@27 {
405 reg = <27>;
406 label = "lan12";
407 phy-mode = "1000base-x";
408 phy-handle = <&phy27>;
409 sfp = <&sfp0>;
410 led-set = <2>;
411 managed = "in-band-status";
412 };
413
414 port@28 {
415 ethernet = <&ethernet0>;
416 reg = <28>;
417 phy-mode = "internal";
418 fixed-link {
419 speed = <10000>;
420 full-duplex;
421 };
422 };
423 };
424 };