target/linux/ramips/dts/rt3052_sitecom_wl-351.dts

   1 #include "rt3050.dtsi"
   2
   3 #include <dt-bindings/gpio/gpio.h>
   4 #include <dt-bindings/input/input.h>
   5
   6 / {
   7         compatible = "sitecom,wl-351", "ralink,rt3052-soc";
   8         model = "Sitecom WL-351 v1 002";
   9
  10         aliases {
  11                 led-boot = &led_power;
  12                 led-failsafe = &led_power;
  13                 led-running = &led_power;
  14                 led-upgrade = &led_power;
  15         };
  16
  17         flash@1f000000 {
  18                 compatible = "cfi-flash";
  19                 reg = <0x1f000000 0x800000>;
  20                 bank-width = <2>;
  21                 device-width = <2>;
  22
  23                 partitions {
  24                         compatible = "fixed-partitions";
  25                         #address-cells = <1>;
  26                         #size-cells = <1>;
  27
  28                         partition@0 {
  29                                 label = "u-boot";
  30                                 reg = <0x0 0x30000>;
  31                                 read-only;
  32                         };
  33
  34                         partition@30000 {
  35                                 label = "u-boot-env";
  36                                 reg = <0x30000 0x10000>;
  37                                 read-only;
  38                         };
  39
  40                         factory: partition@40000 {
  41                                 label = "factory";
  42                                 reg = <0x40000 0x10000>;
  43                                 read-only;
  44
  45                                 nvmem-layout {
  46                                         compatible = "fixed-layout";
  47                                         #address-cells = <1>;
  48                                         #size-cells = <1>;
  49
  50                                         eeprom_factory_0: eeprom@0 {
  51                                                 reg = <0x0 0x200>;
  52                                         };
  53
  54                                         macaddr_factory_4: macaddr@4 {
  55                                                 reg = <0x4 0x6>;
  56                                         };
  57                                 };
  58                         };
  59
  60                         partition@50000 {
  61                                 compatible = "denx,uimage";
  62                                 label = "firmware";
  63                                 reg = <0x50000 0x3b0000>;
  64                         };
  65                 };
  66         };
  67
  68         leds {
  69                 compatible = "gpio-leds";
  70
  71                 led_power: power {
  72                         label = "amber:power";
  73                         gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
  74                 };
  75
  76                 unpopulated {
  77                         label = "amber:unpopulated";
  78                         gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
  79                 };
  80
  81                 unpopulated2 {
  82                         label = "blue:unpopulated";
  83                         gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
  84                 };
  85         };
  86
  87         keys {
  88                 compatible = "gpio-keys-polled";
  89                 poll-interval = <20>;
  90
  91                 reset {
  92                         label = "reset";
  93                         gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
  94                         linux,code = <KEY_RESTART>;
  95                 };
  96
  97                 wps {
  98                         label = "wps";
  99                         gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
 100                         linux,code = <KEY_WPS_BUTTON>;
 101                 };
 102         };
 103
 104         rtl8366rb {
 105                 compatible = "realtek,rtl8366rb";
 106                 gpio-sda = <&gpio0 1 GPIO_ACTIVE_HIGH>;
 107                 gpio-sck = <&gpio0 2 GPIO_ACTIVE_HIGH>;
 108         };
 109 };
 110
 111 &state_default {
 112         gpio {
 113                 groups = "spi", "i2c", "jtag", "mdio", "uartf";
 114                 function = "gpio";
 115         };
 116 };
 117
 118 &ethernet {
 119         nvmem-cells = <&macaddr_factory_4>;
 120         nvmem-cell-names = "mac-address";
 121         pinctrl-names = "default";
 122         pinctrl-0 = <&rgmii_pins>;
 123 };
 124
 125 &esw {
 126         ralink,rgmii = <1>;
 127         mediatek,portmap = <0x3f>;
 128         ralink,fct2 = <0x0002500c>;
 129         /*
 130          * ext phy base addr 31, rx/tx clock skew 0,
 131          * turbo mii off, rgmi 3.3v off, port 5 polling off
 132          * port5: enabled, gige, full-duplex, rx/tx-flow-control
 133          * port6: enabled, gige, full-duplex, rx/tx-flow-control
 134         */
 135         ralink,fpa2 = <0x1f003fff>;
 136 };
 137
 138 &wmac {
 139         nvmem-cells = <&eeprom_factory_0>;
 140         nvmem-cell-names = "eeprom";
 141 };
 142
 143 &otg {
 144         status = "okay";
 145 };