target/linux/mediatek/patches-6.6/830-v6.4-07-dt-bindings-thermal-mediatek-Add-LVTS-thermal-contro.patch

   1 From 498e2f7a6e69dcbca24715de2b4b97569fdfeff4 Mon Sep 17 00:00:00 2001
   2 From: Balsam CHIHI <bchihi@baylibre.com>
   3 Date: Thu, 9 Feb 2023 11:56:24 +0100
   4 Subject: [PATCH] dt-bindings: thermal: mediatek: Add LVTS thermal controllers
   5
   6 Add LVTS thermal controllers dt-binding definition for mt8192 and mt8195.
   7
   8 Signed-off-by: Balsam CHIHI <bchihi@baylibre.com>
   9 Reviewed-by: Rob Herring <robh@kernel.org>
  10 Link: https://lore.kernel.org/r/20230209105628.50294-3-bchihi@baylibre.com
  11 Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
  12 Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
  13 ---
  14  .../thermal/mediatek,lvts-thermal.yaml        | 142 ++++++++++++++++++
  15  .../thermal/mediatek,lvts-thermal.h           |  19 +++
  16  2 files changed, 161 insertions(+)
  17  create mode 100644 Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml
  18  create mode 100644 include/dt-bindings/thermal/mediatek,lvts-thermal.h
  19
  20 --- /dev/null
  21 +++ b/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml
  22 @@ -0,0 +1,142 @@
  23 +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  24 +%YAML 1.2
  25 +---
  26 +$id: http://devicetree.org/schemas/thermal/mediatek,lvts-thermal.yaml#
  27 +$schema: http://devicetree.org/meta-schemas/core.yaml#
  28 +
  29 +title: MediaTek SoC Low Voltage Thermal Sensor (LVTS)
  30 +
  31 +maintainers:
  32 +  - Balsam CHIHI <bchihi@baylibre.com>
  33 +
  34 +description: |
  35 +  LVTS is a thermal management architecture composed of three subsystems,
  36 +  a Sensing device - Thermal Sensing Micro Circuit Unit (TSMCU),
  37 +  a Converter - Low Voltage Thermal Sensor converter (LVTS), and
  38 +  a Digital controller (LVTS_CTRL).
  39 +
  40 +properties:
  41 +  compatible:
  42 +    enum:
  43 +      - mediatek,mt8192-lvts-ap
  44 +      - mediatek,mt8192-lvts-mcu
  45 +      - mediatek,mt8195-lvts-ap
  46 +      - mediatek,mt8195-lvts-mcu
  47 +
  48 +  reg:
  49 +    maxItems: 1
  50 +
  51 +  interrupts:
  52 +    maxItems: 1
  53 +
  54 +  clocks:
  55 +    maxItems: 1
  56 +
  57 +  resets:
  58 +    maxItems: 1
  59 +    description: LVTS reset for clearing temporary data on AP/MCU.
  60 +
  61 +  nvmem-cells:
  62 +    minItems: 1
  63 +    items:
  64 +      - description: Calibration eFuse data 1 for LVTS
  65 +      - description: Calibration eFuse data 2 for LVTS
  66 +
  67 +  nvmem-cell-names:
  68 +    minItems: 1
  69 +    items:
  70 +      - const: lvts-calib-data-1
  71 +      - const: lvts-calib-data-2
  72 +
  73 +  "#thermal-sensor-cells":
  74 +    const: 1
  75 +
  76 +allOf:
  77 +  - $ref: thermal-sensor.yaml#
  78 +
  79 +  - if:
  80 +      properties:
  81 +        compatible:
  82 +          contains:
  83 +            enum:
  84 +              - mediatek,mt8192-lvts-ap
  85 +              - mediatek,mt8192-lvts-mcu
  86 +    then:
  87 +      properties:
  88 +        nvmem-cells:
  89 +          maxItems: 1
  90 +
  91 +        nvmem-cell-names:
  92 +          maxItems: 1
  93 +
  94 +  - if:
  95 +      properties:
  96 +        compatible:
  97 +          contains:
  98 +            enum:
  99 +              - mediatek,mt8195-lvts-ap
 100 +              - mediatek,mt8195-lvts-mcu
 101 +    then:
 102 +      properties:
 103 +        nvmem-cells:
 104 +          minItems: 2
 105 +
 106 +        nvmem-cell-names:
 107 +          minItems: 2
 108 +
 109 +required:
 110 +  - compatible
 111 +  - reg
 112 +  - interrupts
 113 +  - clocks
 114 +  - resets
 115 +  - nvmem-cells
 116 +  - nvmem-cell-names
 117 +  - "#thermal-sensor-cells"
 118 +
 119 +additionalProperties: false
 120 +
 121 +examples:
 122 +  - |
 123 +    #include <dt-bindings/interrupt-controller/arm-gic.h>
 124 +    #include <dt-bindings/clock/mt8195-clk.h>
 125 +    #include <dt-bindings/reset/mt8195-resets.h>
 126 +    #include <dt-bindings/thermal/mediatek,lvts-thermal.h>
 127 +
 128 +    soc {
 129 +      #address-cells = <2>;
 130 +      #size-cells = <2>;
 131 +
 132 +      lvts_mcu: thermal-sensor@11278000 {
 133 +        compatible = "mediatek,mt8195-lvts-mcu";
 134 +        reg = <0 0x11278000 0 0x1000>;
 135 +        interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH 0>;
 136 +        clocks = <&infracfg_ao CLK_INFRA_AO_THERM>;
 137 +        resets = <&infracfg_ao MT8195_INFRA_RST4_THERM_CTRL_MCU_SWRST>;
 138 +        nvmem-cells = <&lvts_efuse_data1 &lvts_efuse_data2>;
 139 +        nvmem-cell-names = "lvts-calib-data-1", "lvts-calib-data-2";
 140 +        #thermal-sensor-cells = <1>;
 141 +      };
 142 +    };
 143 +
 144 +    thermal_zones: thermal-zones {
 145 +      cpu0-thermal {
 146 +        polling-delay = <1000>;
 147 +        polling-delay-passive = <250>;
 148 +        thermal-sensors = <&lvts_mcu MT8195_MCU_LITTLE_CPU0>;
 149 +
 150 +        trips {
 151 +          cpu0_alert: trip-alert {
 152 +            temperature = <85000>;
 153 +            hysteresis = <2000>;
 154 +            type = "passive";
 155 +          };
 156 +
 157 +          cpu0_crit: trip-crit {
 158 +            temperature = <100000>;
 159 +            hysteresis = <2000>;
 160 +            type = "critical";
 161 +          };
 162 +        };
 163 +      };
 164 +    };
 165 --- /dev/null
 166 +++ b/include/dt-bindings/thermal/mediatek,lvts-thermal.h
 167 @@ -0,0 +1,19 @@
 168 +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
 169 +/*
 170 + * Copyright (c) 2023 MediaTek Inc.
 171 + * Author: Balsam CHIHI <bchihi@baylibre.com>
 172 + */
 173 +
 174 +#ifndef __MEDIATEK_LVTS_DT_H
 175 +#define __MEDIATEK_LVTS_DT_H
 176 +
 177 +#define MT8195_MCU_BIG_CPU0     0
 178 +#define MT8195_MCU_BIG_CPU1     1
 179 +#define MT8195_MCU_BIG_CPU2     2
 180 +#define MT8195_MCU_BIG_CPU3     3
 181 +#define MT8195_MCU_LITTLE_CPU0  4
 182 +#define MT8195_MCU_LITTLE_CPU1  5
 183 +#define MT8195_MCU_LITTLE_CPU2  6
 184 +#define MT8195_MCU_LITTLE_CPU3  7
 185 +
 186 +#endif /* __MEDIATEK_LVTS_DT_H */