target/linux/mediatek/dts/mt7622-linksys-e8450.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0-only OR MIT)
   2
   3 /dts-v1/;
   4 #include <dt-bindings/gpio/gpio.h>
   5 #include <dt-bindings/input/input.h>
   6 #include <dt-bindings/pinctrl/mt65xx.h>
   7
   8 #include "mt7622.dtsi"
   9 #include "mt6380.dtsi"
  10
  11 / {
  12         compatible = "linksys,e8450", "mediatek,mt7622";
  13
  14         aliases {
  15                 serial0 = &uart0;
  16                 led-boot = &led_power;
  17                 led-failsafe = &led_power;
  18                 led-running = &led_power;
  19                 led-upgrade = &led_power;
  20         };
  21
  22         chosen {
  23                 stdout-path = "serial0:115200n8";
  24                 bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n1 swiotlb=512";
  25         };
  26
  27         cpus {
  28                 cpu@0 {
  29                         proc-supply = <&mt6380_vcpu_reg>;
  30                         sram-supply = <&mt6380_vm_reg>;
  31                 };
  32
  33                 cpu@1 {
  34                         proc-supply = <&mt6380_vcpu_reg>;
  35                         sram-supply = <&mt6380_vm_reg>;
  36                 };
  37         };
  38
  39         gpio-keys {
  40                 compatible = "gpio-keys";
  41
  42                 factory {
  43                         label = "reset";
  44                         linux,code = <KEY_RESTART>;
  45                         gpios = <&pio 0 GPIO_ACTIVE_LOW>;
  46                 };
  47
  48                 wps {
  49                         label = "wps";
  50                         linux,code = <KEY_WPS_BUTTON>;
  51                         gpios = <&pio 102 GPIO_ACTIVE_LOW>;
  52                 };
  53         };
  54
  55         gpio-leds {
  56                 compatible = "gpio-leds";
  57
  58                 led_power: power_blue {
  59                         label = "power:blue";
  60                         gpios = <&pio 95 GPIO_ACTIVE_LOW>;
  61                         default-state = "on";
  62                 };
  63
  64                 power_orange {
  65                         label = "power:orange";
  66                         gpios = <&pio 96 GPIO_ACTIVE_LOW>;
  67                         default-state = "off";
  68                 };
  69
  70                 inet_blue {
  71                         label = "inet:blue";
  72                         gpios = <&pio 97 GPIO_ACTIVE_LOW>;
  73                         default-state = "off";
  74                 };
  75
  76                 inet_orange {
  77                         label = "inet:orange";
  78                         gpios = <&pio 98 GPIO_ACTIVE_LOW>;
  79                         default-state = "off";
  80                 };
  81         };
  82
  83         memory {
  84                 reg = <0 0x40000000 0 0x40000000>;
  85         };
  86
  87         reg_1p8v: regulator-1p8v {
  88                 compatible = "regulator-fixed";
  89                 regulator-name = "fixed-1.8V";
  90                 regulator-min-microvolt = <1800000>;
  91                 regulator-max-microvolt = <1800000>;
  92                 regulator-always-on;
  93         };
  94
  95         reg_3p3v: regulator-3p3v {
  96                 compatible = "regulator-fixed";
  97                 regulator-name = "fixed-3.3V";
  98                 regulator-min-microvolt = <3300000>;
  99                 regulator-max-microvolt = <3300000>;
 100                 regulator-boot-on;
 101                 regulator-always-on;
 102         };
 103
 104         reg_5v: regulator-5v {
 105                 compatible = "regulator-fixed";
 106                 regulator-name = "fixed-5V";
 107                 regulator-min-microvolt = <5000000>;
 108                 regulator-max-microvolt = <5000000>;
 109                 regulator-boot-on;
 110                 regulator-always-on;
 111         };
 112 };
 113
 114 &cir {
 115         pinctrl-names = "default";
 116         pinctrl-0 = <&irrx_pins>;
 117         status = "okay";
 118 };
 119
 120 &eth {
 121         pinctrl-names = "default";
 122         pinctrl-0 = <&eth_pins>;
 123         status = "okay";
 124
 125         gmac0: mac@0 {
 126                 compatible = "mediatek,eth-mac";
 127                 reg = <0>;
 128                 phy-mode = "2500base-x";
 129
 130                 fixed-link {
 131                         speed = <2500>;
 132                         full-duplex;
 133                         pause;
 134                 };
 135         };
 136
 137         mdio-bus {
 138                 #address-cells = <1>;
 139                 #size-cells = <0>;
 140
 141                 switch@1f {
 142                         compatible = "mediatek,mt7531";
 143                         reg = <31>;
 144                         interrupt-controller;
 145                         #interrupt-cells = <1>;
 146                         interrupt-parent = <&pio>;
 147                         interrupts = <53 IRQ_TYPE_LEVEL_HIGH>;
 148                         reset-gpios = <&pio 54 0>;
 149
 150                         ports {
 151                                 #address-cells = <1>;
 152                                 #size-cells = <0>;
 153
 154                                 port@0 {
 155                                         reg = <0>;
 156                                         label = "lan1";
 157                                 };
 158
 159                                 port@1 {
 160                                         reg = <1>;
 161                                         label = "lan2";
 162                                 };
 163
 164                                 port@2 {
 165                                         reg = <2>;
 166                                         label = "lan3";
 167                                 };
 168
 169                                 port@3 {
 170                                         reg = <3>;
 171                                         label = "lan4";
 172                                 };
 173
 174                                 wan: port@4 {
 175                                         reg = <4>;
 176                                         label = "wan";
 177                                 };
 178
 179                                 port@6 {
 180                                         reg = <6>;
 181                                         ethernet = <&gmac0>;
 182                                         phy-mode = "2500base-x";
 183
 184                                         fixed-link {
 185                                                 speed = <2500>;
 186                                                 full-duplex;
 187                                                 pause;
 188                                         };
 189                                 };
 190                         };
 191                 };
 192
 193         };
 194 };
 195
 196 &pcie0 {
 197         pinctrl-names = "default";
 198         pinctrl-0 = <&pcie0_pins>;
 199         status = "okay";
 200 };
 201
 202 &pcie1 {
 203         pinctrl-names = "default";
 204         pinctrl-0 = <&pcie1_pins>;
 205         status = "okay";
 206 };
 207
 208 &pio {
 209         eth_pins: eth-pins {
 210                 mux {
 211                         function = "eth";
 212                         groups = "mdc_mdio", "rgmii_via_gmac2";
 213                 };
 214         };
 215
 216         irrx_pins: irrx-pins {
 217                 mux {
 218                         function = "ir";
 219                         groups =  "ir_1_rx";
 220                 };
 221         };
 222
 223         irtx_pins: irtx-pins {
 224                 mux {
 225                         function = "ir";
 226                         groups =  "ir_1_tx";
 227                 };
 228         };
 229
 230         pcie0_pins: pcie0-pins {
 231                 mux {
 232                         function = "pcie";
 233                         groups = "pcie0_pad_perst",
 234                                  "pcie0_1_waken",
 235                                  "pcie0_1_clkreq";
 236                 };
 237         };
 238
 239         pcie1_pins: pcie1-pins {
 240                 mux {
 241                         function = "pcie";
 242                         groups = "pcie1_pad_perst",
 243                                  "pcie1_0_waken",
 244                                  "pcie1_0_clkreq";
 245                 };
 246         };
 247
 248         pmic_bus_pins: pmic-bus-pins {
 249                 mux {
 250                         function = "pmic";
 251                         groups = "pmic_bus";
 252                 };
 253         };
 254
 255         pwm7_pins: pwm1-2-pins {
 256                 mux {
 257                         function = "pwm";
 258                         groups = "pwm_ch7_2";
 259                 };
 260         };
 261
 262         wled_pins: wled-pins {
 263                 mux {
 264                         function = "led";
 265                         groups = "wled";
 266                 };
 267         };
 268
 269         /* Serial NAND is shared pin with SPI-NOR */
 270         serial_nand_pins: serial-nand-pins {
 271                 mux {
 272                         function = "flash";
 273                         groups = "snfi";
 274                 };
 275
 276                 conf {
 277                         groups = "snfi";
 278                         drive-strength = <MTK_DRIVE_12mA>;
 279                 };
 280         };
 281
 282         spic0_pins: spic0-pins {
 283                 mux {
 284                         function = "spi";
 285                         groups = "spic0_0";
 286                 };
 287         };
 288
 289         spic1_pins: spic1-pins {
 290                 mux {
 291                         function = "spi";
 292                         groups = "spic1_0";
 293                 };
 294         };
 295
 296         uart0_pins: uart0-pins {
 297                 mux {
 298                         function = "uart";
 299                         groups = "uart0_0_tx_rx" ;
 300                 };
 301         };
 302
 303         uart2_pins: uart2-pins {
 304                 mux {
 305                         function = "uart";
 306                         groups = "uart2_1_tx_rx" ;
 307                 };
 308         };
 309
 310         watchdog_pins: watchdog-pins {
 311                 mux {
 312                         function = "watchdog";
 313                         groups = "watchdog";
 314                 };
 315         };
 316 };
 317
 318 &pwm {
 319         pinctrl-names = "default";
 320         pinctrl-0 = <&pwm7_pins>;
 321         status = "okay";
 322 };
 323
 324 &pwrap {
 325         pinctrl-names = "default";
 326         pinctrl-0 = <&pmic_bus_pins>;
 327
 328         status = "okay";
 329 };
 330
 331 &sata {
 332         status = "disabled";
 333 };
 334
 335 &sata_phy {
 336         status = "disabled";
 337 };
 338
 339 &slot0 {
 340         wmac1: wifi@0,0 {
 341                 compatible = "mediatek,mt76";
 342                 reg = <0x0000 0 0 0 0>;
 343                 ieee80211-freq-limit = <5000000 6000000>;
 344                 mediatek,disable-radar-background;
 345         };
 346 };
 347
 348 &bch {
 349         status = "okay";
 350 };
 351
 352 &snfi {
 353         pinctrl-names = "default";
 354         pinctrl-0 = <&serial_nand_pins>;
 355         status = "okay";
 356
 357         snand: flash@0 {
 358                 compatible = "spi-nand";
 359                 reg = <0>;
 360                 spi-tx-bus-width = <4>;
 361                 spi-rx-bus-width = <4>;
 362                 nand-ecc-engine = <&snfi>;
 363         };
 364 };
 365
 366 &spi0 {
 367         pinctrl-names = "default";
 368         pinctrl-0 = <&spic0_pins>;
 369         status = "okay";
 370 };
 371
 372 &spi1 {
 373         pinctrl-names = "default";
 374         pinctrl-0 = <&spic1_pins>;
 375         status = "okay";
 376 };
 377
 378 &ssusb {
 379         vusb33-supply = <&reg_3p3v>;
 380         vbus-supply = <&reg_5v>;
 381         status = "okay";
 382 };
 383
 384 &u3phy {
 385         status = "okay";
 386 };
 387
 388 &uart0 {
 389         pinctrl-names = "default";
 390         pinctrl-0 = <&uart0_pins>;
 391         status = "okay";
 392 };
 393
 394 &uart2 {
 395         pinctrl-names = "default";
 396         pinctrl-0 = <&uart2_pins>;
 397         status = "okay";
 398 };
 399
 400 &rtc {
 401         status = "disabled";
 402 };
 403
 404 &watchdog {
 405         pinctrl-names = "default";
 406         pinctrl-0 = <&watchdog_pins>;
 407         status = "okay";
 408 };