lantiq: dts: add missing size and address cells
[openwrt/staging/blogic.git] / target / linux / lantiq / files / arch / mips / boot / dts / ar9.dtsi
1 #include <dt-bindings/gpio/gpio.h>
2
3 / {
4 #address-cells = <1>;
5 #size-cells = <1>;
6 compatible = "lantiq,xway", "lantiq,ar9";
7
8 aliases {
9 serial0 = &asc1;
10 };
11
12 chosen {
13 stdout-path = "serial0:115200n8";
14 };
15
16 cpus {
17 #address-cells = <1>;
18 #size-cells = <0>;
19
20 cpu@0 {
21 compatible = "mips,mips34K";
22 reg = <0>;
23 };
24 };
25
26 reboot {
27 compatible = "syscon-reboot";
28
29 regmap = <&rcu0>;
30 offset = <0x10>;
31 mask = <0x40000000>;
32 };
33
34 biu@1f800000 {
35 #address-cells = <1>;
36 #size-cells = <1>;
37 compatible = "lantiq,biu", "simple-bus";
38 reg = <0x1f800000 0x800000>;
39 ranges = <0x0 0x1f800000 0x7fffff>;
40
41 icu0: icu@80200 {
42 #interrupt-cells = <1>;
43 interrupt-controller;
44 compatible = "lantiq,icu";
45 reg = <0x80200 0x28
46 0x80228 0x28
47 0x80250 0x28
48 0x80278 0x28
49 0x802a0 0x28>;
50 };
51
52 watchdog@803f0 {
53 compatible = "lantiq,xrx100-wdt", "lantiq,xrx100-wdt";
54 reg = <0x803f0 0x10>;
55
56 regmap = <&rcu0>;
57 };
58 };
59
60 sram@1f000000 {
61 #address-cells = <1>;
62 #size-cells = <1>;
63 compatible = "lantiq,sram", "simple-bus";
64 reg = <0x1f000000 0x800000>;
65 ranges = <0x0 0x1f000000 0x7fffff>;
66
67 eiu0: eiu@101000 {
68 #interrupt-cells = <1>;
69 interrupt-controller;
70 compatible = "lantiq,eiu-xway";
71 reg = <0x101000 0x1000>;
72 interrupt-parent = <&icu0>;
73 lantiq,eiu-irqs = <166 135 66 40 41 42>;
74 };
75
76 pmu0: pmu@102000 {
77 compatible = "lantiq,pmu-xway";
78 reg = <0x102000 0x1000>;
79 };
80
81 cgu0: cgu@103000 {
82 compatible = "lantiq,cgu-xway";
83 reg = <0x103000 0x1000>;
84 #clock-cells = <1>;
85 };
86
87 rcu0: rcu@203000 {
88 #address-cells = <1>;
89 #size-cells = <1>;
90 compatible = "lantiq,xrx100-rcu", "simple-mfd", "syscon";
91 reg = <0x203000 0x1000>;
92 ranges = <0x0 0x203000 0x100>;
93 big-endian;
94
95 reset: reset-controller@10 {
96 compatible = "lantiq,xrx100-reset", "lantiq,danube-reset";
97 reg = <0x10 4>, <0x14 4>;
98
99 #reset-cells = <2>;
100 };
101
102 usb_phy0: usb2-phy@18 {
103 compatible = "lantiq,xrx100-usb2-phy";
104 reg = <0x18 4>;
105 status = "disabled";
106
107 resets = <&reset 4 4>;
108 reset-names = "ctrl";
109 #phy-cells = <0>;
110 };
111
112 usb_phy1: usb2-phy@34 {
113 compatible = "lantiq,xrx100-usb2-phy";
114 reg = <0x34 4>;
115 status = "disabled";
116
117 resets = <&reset 28 28>;
118 reset-names = "ctrl";
119 #phy-cells = <0>;
120 };
121 };
122 };
123
124 fpi@10000000 {
125 #address-cells = <1>;
126 #size-cells = <1>;
127 compatible = "lantiq,fpi", "simple-bus";
128 ranges = <0x0 0x10000000 0xeefffff>;
129 reg = <0x10000000 0xef00000>;
130
131 localbus: localbus@0 {
132 #address-cells = <2>;
133 #size-cells = <1>;
134 ranges = <0 0 0x0 0x3ffffff /* addrsel0 */
135 1 0 0x4000000 0x4000010>; /* addsel1 */
136 compatible = "lantiq,localbus", "simple-bus";
137 };
138
139 gptu@e100a00 {
140 compatible = "lantiq,gptu-xway";
141 reg = <0xe100a00 0x100>;
142 interrupt-parent = <&icu0>;
143 interrupts = <126 127 128 129 130 131>;
144 };
145
146 asc0: serial@e100400 {
147 compatible = "lantiq,asc";
148 reg = <0xe100400 0x400>;
149 interrupt-parent = <&icu0>;
150 interrupts = <104 105 106>;
151 status = "disabled";
152 };
153
154 spi: spi@e100800 {
155 compatible = "lantiq,xrx100-spi";
156 reg = <0xe100800 0x100>;
157 interrupt-parent = <&icu0>;
158 interrupts = <22 23 24>;
159 interrupt-names = "spi_rx", "spi_tx", "spi_err",
160 "spi_frm";
161 #address-cells = <1>;
162 #size-cells = <0>;
163 status = "disabled";
164 };
165
166 gpio: pinmux@e100b10 {
167 compatible = "lantiq,xrx100-pinctrl";
168 #gpio-cells = <2>;
169 gpio-controller;
170 reg = <0xe100b10 0xa0>;
171 };
172
173 stp: stp@e100bb0 {
174 #gpio-cells = <2>;
175 compatible = "lantiq,gpio-stp-xway";
176 gpio-controller;
177 reg = <0xe100bb0 0x40>;
178 status = "disabled";
179 };
180
181 asc1: serial@e100c00 {
182 compatible = "lantiq,asc";
183 reg = <0xe100c00 0x400>;
184 interrupt-parent = <&icu0>;
185 interrupts = <112 113 114>;
186 };
187
188 usb0: usb@e101000 {
189 compatible = "lantiq,arx100-usb";
190 reg = <0xe101000 0x1000
191 0xe120000 0x3f000>;
192 interrupt-parent = <&icu0>;
193 interrupts = <62 91>;
194 dr_mode = "host";
195 phys = <&usb_phy0>;
196 phy-names = "usb2-phy";
197 status = "disabled";
198 };
199
200 usb1: usb@e106000 {
201 compatible = "lantiq,arx100-usb";
202 reg = <0xe106000 0x1000
203 0xe1e0000 0x3f000>;
204 interrupt-parent = <&icu0>;
205 interrupts = <91>;
206 dr_mode = "host";
207 phys = <&usb_phy1>;
208 phy-names = "usb2-phy";
209 status = "disabled";
210 };
211
212 deu@e103100 {
213 compatible = "lantiq,deu-arx100";
214 reg = <0xe103100 0xf00>;
215 };
216
217 dma0: dma@e104100 {
218 compatible = "lantiq,dma-xway";
219 reg = <0xe104100 0x800>;
220 };
221
222 ebu0: ebu@e105300 {
223 compatible = "lantiq,ebu-xway";
224 reg = <0xe105300 0x100>;
225 };
226
227 mei@e116000 {
228 compatible = "lantiq,mei-xway";
229 reg = <0xe116000 0x9c>;
230 interrupt-parent = <&icu0>;
231 interrupts = <63>;
232 };
233
234 gsw: etop@e180000 {
235 compatible = "lantiq,etop-xway";
236 reg = <0xe180000 0x40000
237 0xe108000 0x200>;
238 interrupt-parent = <&icu0>;
239 interrupts = <73 72>;
240 mac-address = [ 00 11 22 33 44 55 ];
241 };
242
243 ppe@e234000 {
244 compatible = "lantiq,ppe-arx100";
245 reg = <0xe234000 0x3ffd>;
246 interrupt-parent = <&icu0>;
247 interrupts = <96>;
248 };
249
250 pci0: pci@e105400 {
251 status = "disabled";
252 #address-cells = <3>;
253 #size-cells = <2>;
254 #interrupt-cells = <1>;
255 compatible = "lantiq,pci-xway";
256 bus-range = <0x0 0x0>;
257 ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000 /* pci memory */
258 0x1000000 0 0x00000000 0xae00000 0 0x200000>; /* io space */
259 reg = <0x7000000 0x8000 /* config space */
260 0xe105400 0x400>; /* pci bridge */
261 lantiq,bus-clock = <33333333>;
262 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
263 interrupt-map = <0x7000 0 0 1 &icu0 30 1>;
264 req-mask = <0x1>;
265 };
266 };
267
268 adsl {
269 compatible = "lantiq,adsl-arx100";
270 };
271 };