0d9f24ad705924ba0303f54242c706aab2033f06
[openwrt/staging/hauke.git] / target / linux / ipq40xx / files / arch / arm / boot / dts / qcom-ipq4019-mf289f.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 // Copyright (c) 2022, Pawel Dembicki <paweldembicki@gmail.com>.
3 // Copyright (c) 2022, Giammarco Marzano <stich86@gmail.com>.
4
5 #include "qcom-ipq4019.dtsi"
6 #include <dt-bindings/soc/qcom,tcsr.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/leds/common.h>
10
11 / {
12 model = "ZTE MF289F";
13 compatible = "zte,mf289f";
14
15 aliases {
16 led-boot = &led_status;
17 led-failsafe = &led_status;
18 led-running = &led_status;
19 led-upgrade = &led_status;
20 };
21
22 chosen {
23 /*
24 * bootargs forced by u-boot bootipq command:
25 * 'ubi.mtd=rootfs root=mtd:ubi_rootfs rootfstype=squashfs rootwait'
26 */
27 bootargs-append = " root=/dev/ubiblock0_1";
28 };
29
30 /*
31 * This node is used to restart modem module to avoid anomalous
32 * behaviours on initial communication.
33 */
34 gpio-restart {
35 compatible = "gpio-restart";
36 gpios = <&tlmm 8 GPIO_ACTIVE_HIGH>;
37 };
38
39 leds {
40 compatible = "gpio-leds";
41
42 led_status: led-0 {
43 label = "blue:power";
44 function = LED_FUNCTION_POWER;
45 color = <LED_COLOR_ID_BLUE>;
46 gpios = <&tlmm 35 GPIO_ACTIVE_LOW>;
47 };
48
49 led-1 {
50 function = LED_FUNCTION_WLAN;
51 color = <LED_COLOR_ID_BLUE>;
52 gpios = <&tlmm 61 GPIO_ACTIVE_LOW>;
53 linux,default-trigger = "phy0tpt";
54 };
55 };
56
57 keys {
58 compatible = "gpio-keys";
59
60 key-reset {
61 label = "reset";
62 linux,code = <KEY_RESTART>;
63 gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
64 };
65
66 key-wps {
67 label = "wps";
68 linux,code = <KEY_WPS_BUTTON>;
69 gpios = <&tlmm 68 GPIO_ACTIVE_LOW>;
70 };
71 };
72
73 soc {
74 tcsr@1949000 {
75 compatible = "qcom,tcsr";
76 reg = <0x1949000 0x100>;
77 qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
78 };
79
80 tcsr@194b000 {
81 /* select hostmode */
82 compatible = "qcom,tcsr";
83 reg = <0x194b000 0x100>;
84 qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
85 status = "okay";
86 };
87
88 ess_tcsr@1953000 {
89 compatible = "qcom,tcsr";
90 reg = <0x1953000 0x1000>;
91 qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
92 };
93
94 tcsr@1957000 {
95 compatible = "qcom,tcsr";
96 reg = <0x1957000 0x100>;
97 qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
98 };
99 };
100 };
101
102 &prng {
103 status = "okay";
104 };
105
106 &mdio {
107 status = "okay";
108 pinctrl-0 = <&mdio_pins>;
109 pinctrl-names = "default";
110 reset-gpios = <&tlmm 47 GPIO_ACTIVE_LOW>;
111 reset-delay-us = <2000>;
112 };
113
114 &watchdog {
115 status = "okay";
116 };
117
118 &blsp_dma {
119 status = "okay";
120 };
121
122 &usb2 {
123 status = "okay";
124 };
125
126 &usb3 {
127 status = "okay";
128 };
129
130 &blsp1_spi1 {
131 pinctrl-0 = <&spi_0_pins>;
132 pinctrl-names = "default";
133 status = "okay";
134 cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>,
135 <&tlmm 54 GPIO_ACTIVE_HIGH>;
136
137 flash@0 {
138 compatible = "jedec,spi-nor";
139 #address-cells = <1>;
140 #size-cells = <1>;
141 reg = <0>;
142 spi-max-frequency = <24000000>;
143
144 partitions {
145 compatible = "fixed-partitions";
146 #address-cells = <1>;
147 #size-cells = <1>;
148
149 partition@0 {
150 label = "0:SBL1";
151 reg = <0x0 0x40000>;
152 read-only;
153 };
154
155 partition@40000 {
156 label = "0:MIBIB";
157 reg = <0x40000 0x20000>;
158 read-only;
159 };
160
161 partition@60000 {
162 label = "0:QSEE";
163 reg = <0x60000 0x60000>;
164 read-only;
165 };
166
167 partition@c0000 {
168 label = "0:CDT";
169 reg = <0xc0000 0x10000>;
170 read-only;
171 };
172
173 partition@d0000 {
174 label = "0:DDRPARAMS";
175 reg = <0xd0000 0x10000>;
176 read-only;
177 };
178
179 partition@e0000 {
180 label = "0:APPSBLENV";
181 reg = <0xe0000 0x10000>;
182 read-only;
183 };
184
185 partition@f0000 {
186 label = "0:APPSBL";
187 reg = <0xf0000 0xc0000>;
188 read-only;
189 };
190
191 partition@1b0000 {
192 label = "0:reserved1";
193 reg = <0x1b0000 0x50000>;
194 read-only;
195 };
196 };
197 };
198
199 spi-nand@1 { /* flash@1 ? */
200 compatible = "spi-nand";
201 reg = <1>;
202 spi-max-frequency = <24000000>;
203
204 partitions {
205 compatible = "fixed-partitions";
206 #address-cells = <1>;
207 #size-cells = <1>;
208
209 partition@0 {
210 label = "fota-flag";
211 reg = <0x0 0xa0000>;
212 read-only;
213 };
214
215 partition@a0000 {
216 label = "ART";
217 reg = <0xa0000 0x80000>;
218 read-only;
219 compatible = "nvmem-cells";
220 #address-cells = <1>;
221 #size-cells = <1>;
222
223 precal_art_1000: precal@1000 {
224 reg = <0x1000 0x2f20>;
225 };
226
227 precal_art_5000: precal@5000 {
228 reg = <0x5000 0x2f20>;
229 };
230 };
231
232 partition@120000 {
233 label = "mac";
234 reg = <0x120000 0x80000>;
235 read-only;
236 compatible = "nvmem-cells";
237 #address-cells = <1>;
238 #size-cells = <1>;
239
240 macaddr_mac_0: macaddr@0 {
241 reg = <0x0 0x6>;
242 };
243 };
244
245 partition@1a0000 {
246 label = "reserved2";
247 reg = <0x1a0000 0xc0000>;
248 read-only;
249 };
250
251 partition@260000 {
252 label = "cfg-param";
253 reg = <0x260000 0x400000>;
254 read-only;
255 };
256
257 partition@660000 {
258 label = "log";
259 reg = <0x660000 0x400000>;
260 };
261
262 partition@a60000 {
263 label = "oops";
264 reg = <0xa60000 0xa0000>;
265 };
266
267 partition@b00000 {
268 label = "reserved3";
269 reg = <0xb00000 0x500000>;
270 read-only;
271 };
272
273 partition@1000000 {
274 label = "web";
275 reg = <0x1000000 0x800000>;
276 };
277
278 partition@1800000 {
279 label = "rootfs";
280 reg = <0x1800000 0x1d00000>;
281 };
282
283 partition@3500000 {
284 label = "data";
285 reg = <0x3500000 0x1900000>;
286 };
287
288 partition@4e00000 {
289 label = "fota";
290 reg = <0x4e00000 0x3200000>;
291 };
292 };
293 };
294 };
295
296 &blsp1_uart1 {
297 pinctrl-0 = <&serial_pins>;
298 pinctrl-names = "default";
299 status = "okay";
300 };
301
302 &crypto {
303 status = "okay";
304 };
305
306 &cryptobam {
307 status = "okay";
308 };
309
310 &gmac {
311 status = "okay";
312 nvmem-cell-names = "mac-address";
313 nvmem-cells = <&macaddr_mac_0>;
314 };
315
316 &switch {
317 status = "okay";
318 };
319
320 &swport2 {
321 status = "okay";
322
323 label = "wan";
324
325 nvmem-cell-names = "mac-address";
326 nvmem-cells = <&macaddr_mac_0>;
327 mac-address-increment = <1>;
328 };
329
330 &swport5 {
331 status = "okay";
332
333 label = "lan";
334 };
335
336 &qpic_bam {
337 status = "okay";
338 };
339
340 &tlmm {
341 i2c_0_pins: i2c_0_pinmux {
342 mux {
343 pins = "gpio20", "gpio21";
344 function = "blsp_i2c0";
345 bias-disable;
346 };
347 };
348
349 mdio_pins: mdio_pinmux {
350 mux_1 {
351 pins = "gpio6";
352 function = "mdio";
353 bias-pull-up;
354 };
355
356 mux_2 {
357 pins = "gpio7";
358 function = "mdc";
359 bias-pull-up;
360 };
361 };
362
363 serial_pins: serial_pinmux {
364 mux {
365 pins = "gpio16", "gpio17";
366 function = "blsp_uart0";
367 bias-disable;
368 };
369 };
370
371 spi_0_pins: spi_0_pinmux {
372 pinmux {
373 function = "blsp_spi0";
374 pins = "gpio13", "gpio14", "gpio15";
375 drive-strength = <12>;
376 bias-disable;
377 };
378
379 pinmux_cs {
380 function = "gpio";
381 pins = "gpio12", "gpio54";
382 drive-strength = <2>;
383 bias-disable;
384 output-high;
385 };
386 };
387 };
388
389 &usb2_hs_phy {
390 status = "okay";
391 };
392
393 &usb3_ss_phy {
394 status = "okay";
395 };
396
397 &usb3_hs_phy {
398 status = "okay";
399 };
400
401 &wifi0 {
402 status = "okay";
403 nvmem-cell-names = "pre-calibration", "mac-address";
404 nvmem-cells = <&precal_art_1000>, <&macaddr_mac_0>;
405 mac-address-increment = <2>;
406 qcom,ath10k-calibration-variant = "zte,mf289f";
407 };
408
409 /* This node is used only on AT2 version for 5Ghz on IPQ4019 with board-id=21 */
410 &wifi1 {
411 status = "okay";
412 nvmem-cell-names = "pre-calibration", "mac-address";
413 nvmem-cells = <&precal_art_5000>, <&macaddr_mac_0>;
414 mac-address-increment = <3>;
415 qcom,ath10k-calibration-variant = "zte,mf289f";
416 };
417
418 /* This node is used only on AT1 version for 5Ghz on QCA9984 */
419 &pcie0 {
420 status = "okay";
421 perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
422 wake-gpio = <&tlmm 40 GPIO_ACTIVE_LOW>;
423 clkreq-gpio = <&tlmm 39 GPIO_ACTIVE_LOW>;
424
425 bridge@0,0 {
426 reg = <0x00000000 0 0 0 0>;
427 #address-cells = <3>;
428 #size-cells = <2>;
429 ranges;
430
431 wifi2: wifi@1,0 {
432 nvmem-cell-names = "mac-address";
433 nvmem-cells = <&macaddr_mac_0>;
434 mac-address-increment = <4>;
435 compatible = "qcom,ath10k";
436 reg = <0x00010000 0 0 0 0>;
437 qcom,ath10k-calibration-variant = "zte,mf289f";
438 };
439 };
440 };