target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-e2600ac-c2.dts

   1 /* SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2  *
   3  * Copyright (c) 2018 Peng Zhang <sd20@qxwlan.com>
   4  *
   5  */
   6
   7 #include "qcom-ipq4019-e2600ac.dtsi"
   8 #include <dt-bindings/gpio/gpio.h>
   9 #include <dt-bindings/input/input.h>
  10
  11 / {
  12         model = "Qxwlan E2600AC c2";
  13         compatible = "qxwlan,e2600ac-c2";
  14 };
  15
  16 &blsp1_spi1 {
  17         pinctrl-0 = <&spi_0_pins>;
  18         pinctrl-names = "default";
  19         status = "okay";
  20         cs-gpios = <&tlmm 12 GPIO_ACTIVE_LOW>;
  21
  22         flash@0 {
  23                 reg = <0>;
  24                 compatible = "jedec,spi-nor";
  25                 spi-max-frequency = <24000000>;
  26
  27                 partitions {
  28                         compatible = "fixed-partitions";
  29                         #address-cells = <1>;
  30                         #size-cells = <1>;
  31
  32                         partition@0 {
  33                                 label = "0:SBL1";
  34                                 reg = <0x0 0x40000>;
  35                                 read-only;
  36                         };
  37                         partition@40000 {
  38                                 label = "0:MIBIB";
  39                                 reg = <0x40000 0x20000>;
  40                                 read-only;
  41                         };
  42                         partition@60000 {
  43                                 label = "0:QSEE";
  44                                 reg = <0x60000 0x60000>;
  45                                 read-only;
  46                         };
  47                         partition@c0000 {
  48                                 label = "0:CDT";
  49                                 reg = <0xc0000 0x10000>;
  50                                 read-only;
  51                         };
  52                         partition@d0000 {
  53                                 label = "0:DDRPARAMS";
  54                                 reg = <0xd0000 0x10000>;
  55                                 read-only;
  56                         };
  57                         partition@e0000 {
  58                                 label = "0:APPSBLENV";
  59                                 reg = <0xe0000 0x10000>;
  60                                 read-only;
  61                         };
  62                         partition@f0000 {
  63                                 label = "0:APPSBL";
  64                                 reg = <0xf0000 0x80000>;
  65                                 read-only;
  66                         };
  67                         partition@170000 {
  68                                 label = "0:ART";
  69                                 reg = <0x170000 0x10000>;
  70                                 read-only;
  71                                 compatible = "nvmem-cells";
  72                                 #address-cells = <1>;
  73                                 #size-cells = <1>;
  74
  75                                 precal_art_1000: precal@1000 {
  76                                         reg = <0x1000 0x2f20>;
  77                                 };
  78
  79                                 precal_art_5000: precal@5000 {
  80                                         reg = <0x5000 0x2f20>;
  81                                 };
  82
  83                                 macaddr_gmac0: macaddr@0 {
  84                                         reg = <0x0 0x6>;
  85                                 };
  86
  87                                 macaddr_gmac1: macaddr@6 {
  88                                         reg = <0x6 0x6>;
  89                                 };
  90                         };
  91                 };
  92         };
  93 };
  94
  95 &nand {
  96         pinctrl-0 = <&nand_pins>;
  97         pinctrl-names = "default";
  98         status = "okay";
  99
 100         nand@0 {
 101                 partitions {
 102                         compatible = "fixed-partitions";
 103                         #address-cells = <1>;
 104                         #size-cells = <1>;
 105
 106                         partition@0 {
 107                                 label = "ubi";
 108                                 reg = <0x00000000 0x04000000>;
 109                         };
 110                 };
 111         };
 112 };
 113
 114 &tlmm {
 115         nand_pins: nand-pins {
 116
 117                 pullups {
 118                         pins = "gpio53", "gpio58", "gpio59";
 119                         function = "qpic";
 120                         bias-pull-up;
 121                 };
 122
 123                 pulldowns {
 124                         pins = "gpio54", "gpio55", "gpio56",
 125                                 "gpio57", "gpio60", "gpio61",
 126                                 "gpio62", "gpio63", "gpio64",
 127                                 "gpio65", "gpio66", "gpio67",
 128                                 "gpio68", "gpio69";
 129                         function = "qpic";
 130                         bias-pull-down;
 131                 };
 132         };
 133 };
 134
 135 &wifi0 {
 136         status = "okay";
 137         nvmem-cell-names = "pre-calibration";
 138         nvmem-cells = <&precal_art_1000>;
 139         qcom,ath10k-calibration-variant = "Qxwlan-E2600AC-C2";
 140 };
 141
 142 &wifi1 {
 143         status = "okay";
 144         nvmem-cell-names = "pre-calibration";
 145         nvmem-cells = <&precal_art_5000>;
 146         qcom,ath10k-calibration-variant = "Qxwlan-E2600AC-C2";
 147 };
 148
 149 &gmac {
 150         status = "okay";
 151 };
 152
 153 &switch {
 154         status = "okay";
 155 };
 156
 157 &swport2 {
 158         status = "okay";
 159         label = "sw-eth1";
 160
 161         nvmem-cell-names = "mac-address";
 162         nvmem-cells = <&macaddr_gmac0>;
 163 };
 164
 165 &swport4 {
 166         status = "okay";
 167         label = "sw-eth2";
 168
 169         nvmem-cell-names = "mac-address";
 170         nvmem-cells = <&macaddr_gmac0>;
 171 };
 172
 173 &swport5 {
 174         status = "okay";
 175
 176         label = "sw-eth3";
 177         nvmem-cell-names = "mac-address";
 178         nvmem-cells = <&macaddr_gmac1>;
 179 };