1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 // Copyright (c) 2022, Pawel Dembicki <paweldembicki@gmail.com>.
3 // Copyright (c) 2022, Giammarco Marzano <stich86@gmail.com>.
4 // Copyright (c) 2023, Andreas Böhler <dev@aboehler.at>
6 #include "qcom-ipq4018-mf287_common.dtsi"
10 compatible = "zte,mf287";
14 gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>;
18 gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
22 gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
26 gpios = <&tlmm 0 GPIO_ACTIVE_LOW>;
30 pinctrl-0 = <&spi_0_pins>;
31 pinctrl-names = "default";
33 cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>,
34 <&tlmm 59 GPIO_ACTIVE_HIGH>,
35 <&tlmm 1 GPIO_ACTIVE_HIGH>;
38 compatible = "jedec,spi-nor";
42 spi-max-frequency = <24000000>;
45 compatible = "fixed-partitions";
57 reg = <0x40000 0x20000>;
63 reg = <0x60000 0x60000>;
69 reg = <0xc0000 0x10000>;
74 label = "0:DDRPARAMS";
75 reg = <0xd0000 0x10000>;
80 label = "0:APPSBLENV";
81 reg = <0xe0000 0x10000>;
87 reg = <0xf0000 0xc0000>;
92 label = "0:reserved1";
93 reg = <0x1b0000 0x50000>;
99 spi-nand@1 { /* flash@1 ? */
100 compatible = "spi-nand";
102 spi-max-frequency = <24000000>;
105 compatible = "fixed-partitions";
106 #address-cells = <1>;
111 reg = <0x0 0x140000>;
117 reg = <0x140000 0x140000>;
119 compatible = "nvmem-cells";
120 #address-cells = <1>;
123 precal_art_1000: precal@1000 {
124 reg = <0x1000 0x2f20>;
127 precal_art_5000: precal@5000 {
128 reg = <0x5000 0x2f20>;
134 reg = <0x280000 0x140000>;
136 compatible = "nvmem-cells";
137 #address-cells = <1>;
140 macaddr_mac_0: macaddr@0 {
147 reg = <0x3c0000 0x600000>;
153 reg = <0x9c0000 0x140000>;
158 reg = <0xb00000 0x800000>;
163 reg = <0x1300000 0x2200000>;
168 reg = <0x3500000 0x1900000>;
173 reg = <0x4e00000 0x3200000>;
179 #address-cells = <1>;
182 compatible = "silabs,em3581";
184 spi-max-frequency = <12000000>;
189 serial_pins: serial_pinmux {
191 pins = "gpio60", "gpio61";
192 function = "blsp_uart0";
197 spi_0_pins: spi_0_pinmux {
199 function = "blsp_spi0";
200 pins = "gpio55", "gpio56", "gpio57";
201 drive-strength = <12>;
207 pins = "gpio54", "gpio59", "gpio1";
208 drive-strength = <2>;
216 qcom,ath10k-calibration-variant = "zte,mf287";
220 qcom,ath10k-calibration-variant = "zte,mf287";