target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ap120c-ac.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "qcom-ipq4019.dtsi"
   4 #include <dt-bindings/gpio/gpio.h>
   5 #include <dt-bindings/input/input.h>
   6 #include <dt-bindings/soc/qcom,tcsr.h>
   7
   8 / {
   9         model = "ALFA Network AP120C-AC";
  10         compatible = "alfa-network,ap120c-ac";
  11
  12         aliases {
  13                 led-boot = &status;
  14                 led-failsafe = &status;
  15                 led-running = &status;
  16                 led-upgrade = &status;
  17                 ethernet1 = &swport5;
  18         };
  19
  20         keys {
  21                 compatible = "gpio-keys";
  22
  23                 reset {
  24                         label = "reset";
  25                         gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
  26                         linux,code = <KEY_RESTART>;
  27                 };
  28         };
  29
  30         leds {
  31                 compatible = "gpio-leds";
  32
  33                 status: status {
  34                         label = "blue:status";
  35                         gpios = <&tlmm 5 GPIO_ACTIVE_LOW>;
  36                         default-state = "keep";
  37                 };
  38
  39                 wan {
  40                         label = "amber:wan";
  41                         gpios = <&ethphy4 1 GPIO_ACTIVE_HIGH>;
  42                 };
  43
  44                 wlan2g {
  45                         label = "green:wlan2g";
  46                         gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
  47                         linux,default-trigger = "phy0tpt";
  48                 };
  49
  50                 wlan5g {
  51                         label = "red:wlan5g";
  52                         gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
  53                         linux,default-trigger = "phy1tpt";
  54                 };
  55         };
  56
  57         soc {
  58                 rng@22000 {
  59                         status = "okay";
  60                 };
  61
  62                 mdio@90000 {
  63                         status = "okay";
  64
  65                         pinctrl-0 = <&mdio_pins>;
  66                         pinctrl-names = "default";
  67                 };
  68
  69                 counter@4a1000 {
  70                         compatible = "qcom,qca-gcnt";
  71                         reg = <0x4a1000 0x4>;
  72                 };
  73
  74                 tcsr@1949000 {
  75                         compatible = "qcom,tcsr";
  76                         reg = <0x1949000 0x100>;
  77                         qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  78                 };
  79
  80                 tcsr@194b000 {
  81                         compatible = "qcom,tcsr";
  82                         reg = <0x194b000 0x100>;
  83                         qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
  84                 };
  85
  86                 ess_tcsr@1953000 {
  87                         compatible = "qcom,tcsr";
  88                         reg = <0x1953000 0x1000>;
  89                         qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
  90                 };
  91
  92                 tcsr@1957000 {
  93                         compatible = "qcom,tcsr";
  94                         reg = <0x1957000 0x100>;
  95                         qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  96                 };
  97
  98                 usb2@60f8800 {
  99                         status = "okay";
 100                 };
 101
 102                 usb3@8af8800 {
 103                         status = "okay";
 104
 105                         dwc3@8a00000 {
 106                                 phys = <&usb3_hs_phy>;
 107                                 phy-names = "usb2-phy";
 108                         };
 109                 };
 110
 111                 crypto@8e3a000 {
 112                         status = "okay";
 113                 };
 114
 115                 watchdog@b017000 {
 116                         status = "okay";
 117                 };
 118         };
 119 };
 120
 121 &blsp_dma {
 122         status = "okay";
 123 };
 124
 125 &blsp1_i2c3 {
 126         status = "okay";
 127
 128         pinctrl-0 = <&i2c0_pins>;
 129         pinctrl-names = "default";
 130
 131         tpm@29 {
 132                 compatible = "atmel,at97sc3204t";
 133                 reg = <0x29>;
 134         };
 135 };
 136
 137 &blsp1_spi1 {
 138         status = "okay";
 139
 140         pinctrl-0 = <&spi0_pins>;
 141         pinctrl-names = "default";
 142         cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>,
 143                    <&tlmm  4 GPIO_ACTIVE_HIGH>;
 144
 145         flash@0 {
 146                 compatible = "jedec,spi-nor";
 147                 reg = <0>;
 148                 spi-max-frequency = <24000000>;
 149
 150                 partitions {
 151                         compatible = "fixed-partitions";
 152                         #address-cells = <1>;
 153                         #size-cells = <1>;
 154
 155                         partition@0 {
 156                                 label = "SBL1";
 157                                 reg = <0x00000000 0x00040000>;
 158                                 read-only;
 159                         };
 160
 161                         partition@40000 {
 162                                 label = "MIBIB";
 163                                 reg = <0x00040000 0x00020000>;
 164                                 read-only;
 165                         };
 166
 167                         partition@60000 {
 168                                 label = "QSEE";
 169                                 reg = <0x00060000 0x00060000>;
 170                                 read-only;
 171                         };
 172
 173                         partition@c0000 {
 174                                 label = "CDT";
 175                                 reg = <0x000c0000 0x00010000>;
 176                                 read-only;
 177                         };
 178
 179                         partition@d0000 {
 180                                 label = "DDRPARAMS";
 181                                 reg = <0x000d0000 0x00010000>;
 182                                 read-only;
 183                         };
 184
 185                         partition@e0000 {
 186                                 label = "APPSBLENV";
 187                                 reg = <0x000e0000 0x00010000>;
 188                         };
 189
 190                         partition@f0000 {
 191                                 label = "APPSBL";
 192                                 reg = <0x000f0000 0x00080000>;
 193                                 read-only;
 194                         };
 195
 196                         partition@170000 {
 197                                 label = "ART";
 198                                 reg = <0x00170000 0x00010000>;
 199                                 read-only;
 200                                 compatible = "nvmem-cells";
 201                                 #address-cells = <1>;
 202                                 #size-cells = <1>;
 203
 204                                 precal_art_1000: precal@1000 {
 205                                         reg = <0x1000 0x2f20>;
 206                                 };
 207
 208                                 precal_art_5000: precal@5000 {
 209                                         reg = <0x5000 0x2f20>;
 210                                 };
 211                         };
 212
 213                         partition@180000 {
 214                                 label = "priv_data1";
 215                                 reg = <0x00180000 0x00010000>;
 216                                 read-only;
 217                         };
 218
 219                         partition@190000 {
 220                                 label = "priv_data2";
 221                                 reg = <0x00190000 0x00010000>;
 222                                 read-only;
 223                         };
 224                 };
 225         };
 226
 227         nand@1 {
 228                 compatible = "spi-nand";
 229                 reg = <1>;
 230                 spi-max-frequency = <24000000>;
 231
 232                 partitions {
 233                         compatible = "fixed-partitions";
 234                         #address-cells = <1>;
 235                         #size-cells = <1>;
 236
 237                         partition@0 {
 238                                 label = "rootfs1";
 239                                 reg = <0x00000000 0x04000000>;
 240                         };
 241
 242                         partition@4000000 {
 243                                 label = "rootfs2";
 244                                 reg = <0x04000000 0x04000000>;
 245                         };
 246                 };
 247         };
 248 };
 249
 250 &blsp1_uart1 {
 251         status = "okay";
 252
 253         pinctrl-0 = <&serial0_pins>;
 254         pinctrl-names = "default";
 255 };
 256
 257 &cryptobam {
 258         status = "okay";
 259 };
 260
 261 &ethphy4 {
 262         gpio-controller;
 263         #gpio-cells = <2>;
 264 };
 265
 266 &tlmm {
 267         i2c0_pins: i2c0_pinmux {
 268                 mux_i2c {
 269                         function = "blsp_i2c0";
 270                         pins = "gpio58", "gpio59";
 271                         drive-strength = <16>;
 272                         bias-disable;
 273                 };
 274         };
 275
 276         mdio_pins: mdio_pinmux {
 277                 mux_mdio {
 278                         pins = "gpio53";
 279                         function = "mdio";
 280                         bias-pull-up;
 281                 };
 282
 283                 mux_mdc {
 284                         pins = "gpio52";
 285                         function = "mdc";
 286                         bias-pull-up;
 287                 };
 288         };
 289
 290         serial0_pins: serial0_pinmux {
 291                 mux_uart {
 292                         pins = "gpio60", "gpio61";
 293                         function = "blsp_uart0";
 294                         bias-disable;
 295                 };
 296         };
 297
 298         spi0_pins: spi0_pinmux {
 299                 mux_spi {
 300                         function = "blsp_spi0";
 301                         pins = "gpio55", "gpio56", "gpio57";
 302                         drive-strength = <12>;
 303                         bias-disable;
 304                 };
 305
 306                 mux_cs {
 307                         function = "gpio";
 308                         pins = "gpio54", "gpio4";
 309                         drive-strength = <2>;
 310                         bias-disable;
 311                         output-high;
 312                 };
 313         };
 314 };
 315
 316 &usb2_hs_phy {
 317         status = "okay";
 318 };
 319
 320 &usb3_hs_phy {
 321         status = "okay";
 322 };
 323
 324 &gmac {
 325         status = "okay";
 326 };
 327
 328 &switch {
 329         status = "okay";
 330 };
 331
 332 &swport4 {
 333         status = "okay";
 334
 335         label = "lan";
 336 };
 337
 338 &swport5 {
 339         status = "okay";
 340 };
 341
 342 &wifi0 {
 343         status = "okay";
 344         nvmem-cell-names = "pre-calibration";
 345         nvmem-cells = <&precal_art_1000>;
 346 };
 347
 348 &wifi1 {
 349         status = "okay";
 350         qcom,ath10k-calibration-variant = "ALFA-Network-AP120C-AC";
 351         nvmem-cell-names = "pre-calibration";
 352         nvmem-cells = <&precal_art_5000>;
 353 };