1 // SPDX-License-Identifier: GPL-2.0-only
3 * Device Tree Source for Meraki MR24 (Ikarem)
5 * Copyright (C) 2016 Chris Blake <chrisrblake93@gmail.com>
7 * Based on Cisco Meraki GPL Release r23-20150601 MR24 DTS
12 #include "apm82181.dtsi"
15 model = "Meraki MR24 Access Point";
16 compatible = "meraki,mr24", "meraki,ikarem", "apm,bluestone";
21 led-failsafe = &failsafe;
22 led-running = &status;
23 led-upgrade = &status;
27 stdout-path = "/plb/opb/serial@ef600400";
45 /* Ikarem has 32MB of NAND */
48 /* 32 MiB NAND Flash */
54 reg = <0x00000000 0x00150000>;
60 * The u-boot environment size is one NAND
61 * block (16KiB). u-boot allocates four NAND
62 * blocks (64KiB) in order to have spares
63 * around for bad block management
66 reg = <0x00150000 0x00010000>;
72 * redundant u-boot environment.
73 * has to be kept it in sync with the
74 * data in "u-boot-env".
76 label = "u-boot-env-redundant";
77 reg = <0x00160000 0x00010000>;
83 reg = <0x00170000 0x00010000>;
88 reg = <0x00180000 0x01e80000>;
104 /* Boot ROM is at 0x52-0x53, do not touch */
105 /* Unknown chip at 0x6e, not sure what it is */
111 phy-mode = "rgmii-id";
117 #address-cells = <1>;
121 compatible = "ethernet-phy-ieee802.3-c22";
129 compatible = "gpio-leds";
131 status: power-green {
132 label = "mr24:green:power";
133 gpios = <&GPIO0 18 GPIO_ACTIVE_LOW>;
136 failsafe: power-orange {
137 label = "mr24:orange:power";
138 gpios = <&GPIO0 19 GPIO_ACTIVE_LOW>;
142 label = "mr24:green:wan";
143 gpios = <&GPIO0 17 GPIO_ACTIVE_LOW>;
147 label = "mr24:green:wifi1";
148 gpios = <&GPIO0 23 GPIO_ACTIVE_LOW>;
152 label = "mr24:green:wifi2";
153 gpios = <&GPIO0 22 GPIO_ACTIVE_LOW>;
157 label = "mr24:green:wifi3";
158 gpios = <&GPIO0 21 GPIO_ACTIVE_LOW>;
162 label = "mr24:green:wifi4";
163 gpios = <&GPIO0 20 GPIO_ACTIVE_LOW>;
168 compatible = "gpio-keys";
171 /* Label as per Meraki's "MR24 Installation Guide" */
172 label = "Factory Reset Button";
173 linux,code = <KEY_RESTART>;
174 interrupt-parent = <&UIC1>;
175 interrupts = <0x15 IRQ_TYPE_EDGE_FALLING>;
176 gpios = <&GPIO0 16 GPIO_ACTIVE_LOW>;
177 debounce-interval = <60>;
185 * relevant lspci topology:
187 * -+-[0000:40]---00.0-[41-7f]----00.0-[42-45]--+-02.0-[43]----00.0
188 * +-03.0-[44]----00.0
193 reg = <0x00400000 0 0 0 0>;
194 #address-cells = <3>;
199 /* IDT PES3T3 PCI Express Switch */
200 compatible = "pci111d,8039";
201 reg = <0x00410000 0 0 0 0>;
202 #address-cells = <3>;
207 compatible = "pci111d,8039";
208 reg = <0x00421000 0 0 0 0>;
209 #address-cells = <3>;
214 /* Atheros AR9380 2.4GHz */
215 compatible = "pci168c,0030";
216 reg = <0x00430000 0 0 0 0>;
217 interrupts = <3>; /* INTC 4.1.1 */
222 compatible = "pci111d,8039";
223 reg = <0x00421800 0 0 0 0>;
224 #address-cells = <3>;
229 /* Atheros AR9380 5GHz */
230 compatible = "pci168c,0030";
231 reg = <0x00440000 0 0 0 0>;
232 interrupts = <4>; /* INTD 4.1.1 */