mediatek: mt8183: add DEVAPC driver to control protection
[project/bcm63xx/atf.git] / plat / mediatek / mt8183 / drivers / devapc / devapc.h
1 /*
2 * Copyright (c) 2019, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 #ifndef DEVAPC_H
8 #define DEVAPC_H
9
10 #include <stdint.h>
11
12 #define DEVAPC_AO_INFRA_BASE 0x1000E000
13 #define DEVAPC_AO_MM_BASE 0x1001C000
14 #define DEVAPC_AO_MD_BASE 0x10019000
15
16 #define DEVAPC_INFRA_D0_APC_0 (DEVAPC_AO_INFRA_BASE + 0x0000)
17 #define DEVAPC_INFRA_MAS_DOM_0 (DEVAPC_AO_INFRA_BASE + 0x0A00)
18 #define DEVAPC_INFRA_MAS_SEC_0 (DEVAPC_AO_INFRA_BASE + 0x0B00)
19 #define DEVAPC_INFRA_DOM_RMP_0 (DEVAPC_AO_INFRA_BASE + 0x0D00)
20 #define DEVAPC_INFRA_DOM_RMP_1 (DEVAPC_AO_INFRA_BASE + 0x0D04)
21 #define DEVAPC_INFRA_APC_CON (DEVAPC_AO_INFRA_BASE + 0x0F00)
22
23 #define DEVAPC_MD_APC_CON (DEVAPC_AO_MD_BASE + 0x0F00)
24
25 #define DEVAPC_MM_D0_APC_0 (DEVAPC_AO_MM_BASE + 0x0000)
26 #define DEVAPC_MM_DOM_RMP_0 (DEVAPC_AO_MM_BASE + 0x0D00)
27 #define DEVAPC_MM_APC_CON (DEVAPC_AO_MM_BASE + 0x0F00)
28
29 #define MOD_NO_IN_1_DEVAPC 16
30 #define MASTER_MOD_NO_IN_1_DEVAPC 8
31 #define SLAVE_INFRA_MAX_INDEX 195
32 #define SLAVE_MM_MAX_INDEX 140
33
34 enum {
35 MASTER_SCP = 0,
36 MASTER_SPM = 10,
37 MASTER_SSPM = 27
38 };
39
40 enum MASK_DOM {
41 DOMAIN_0 = 0,
42 DOMAIN_1,
43 DOMAIN_2,
44 DOMAIN_3,
45 DOMAIN_4,
46 DOMAIN_5,
47 DOMAIN_6,
48 DOMAIN_7,
49 DOMAIN_8,
50 DOMAIN_9,
51 DOMAIN_10,
52 DOMAIN_11
53 };
54
55 enum TRANSACTION {
56 NON_SECURE_TRANSACTION = 0,
57 SECURE_TRANSACTION
58 };
59
60 enum DAPC_SLAVE_TYPE {
61 DAPC_INFRA_SLAVE = 0,
62 DAPC_MM_SLAVE
63 };
64
65 enum APC_ATTR {
66 NO_SEC = 0,
67 S_RW_ONLY,
68 S_RW_NS_R,
69 FORBID,
70 };
71
72 struct DEVICE_INFO {
73 uint8_t d0_permission;
74 uint8_t d1_permission;
75 uint8_t d2_permission;
76 };
77
78 #define PERMISSION(DEV_NAME, ATTR1, ATTR2, ATTR3) \
79 {(uint8_t)ATTR1, (uint8_t)ATTR2, (uint8_t)ATTR3}
80
81 static const struct DEVICE_INFO D_APC_INFRA_Devices[] = {
82 /* module, domain0, domain1, domain2 */
83
84 /* 0 */
85 PERMISSION("INFRA_AO_TOPCKGEN", NO_SEC, NO_SEC, NO_SEC),
86 PERMISSION("INFRA_AO_INFRASYS_CONFIG_REGS", NO_SEC, FORBID, NO_SEC),
87 PERMISSION("IO_CFG", NO_SEC, FORBID, NO_SEC),
88 PERMISSION("INFRA_AO_PERICFG", NO_SEC, FORBID, NO_SEC),
89 PERMISSION("INFRA_AO_EFUSE_AO_DEBUG", NO_SEC, FORBID, NO_SEC),
90 PERMISSION("INFRA_AO_GPIO", NO_SEC, FORBID, NO_SEC),
91 PERMISSION("INFRA_AO_SLEEP_CONTROLLER", NO_SEC, FORBID, NO_SEC),
92 PERMISSION("INFRA_AO_TOPRGU", NO_SEC, FORBID, NO_SEC),
93 PERMISSION("INFRA_AO_APXGPT", NO_SEC, FORBID, NO_SEC),
94 PERMISSION("INFRA_AO_RESERVE", NO_SEC, FORBID, NO_SEC),
95
96 /* 10 */
97 PERMISSION("INFRA_AO_SEJ", NO_SEC, FORBID, NO_SEC),
98 PERMISSION("INFRA_AO_AP_CIRQ_EINT", NO_SEC, FORBID, NO_SEC),
99 PERMISSION("INFRA_AO_APMIXEDSYS", NO_SEC, NO_SEC, NO_SEC),
100 PERMISSION("INFRA_AO_PMIC_WRAP", NO_SEC, FORBID, NO_SEC),
101 PERMISSION("INFRA_AO_DEVICE_APC_AO_INFRA_PERI", NO_SEC, FORBID, NO_SEC),
102 PERMISSION("INFRA_AO_SLEEP_CONTROLLER_MD", NO_SEC, FORBID, NO_SEC),
103 PERMISSION("INFRA_AO_KEYPAD", NO_SEC, FORBID, NO_SEC),
104 PERMISSION("INFRA_AO_TOP_MISC", NO_SEC, FORBID, NO_SEC),
105 PERMISSION("INFRA_AO_DVFS_CTRL_PROC", NO_SEC, FORBID, NO_SEC),
106 PERMISSION("INFRA_AO_MBIST_AO_REG", NO_SEC, FORBID, NO_SEC),
107
108 /* 20 */
109 PERMISSION("INFRA_AO_CLDMA_AO_AP", NO_SEC, FORBID, NO_SEC),
110 PERMISSION("INFRA_AO_DEVICE_MPU", NO_SEC, FORBID, NO_SEC),
111 PERMISSION("INFRA_AO_AES_TOP_0", NO_SEC, FORBID, NO_SEC),
112 PERMISSION("INFRA_AO_SYS_TIMER", NO_SEC, FORBID, NO_SEC),
113 PERMISSION("INFRA_AO_MDEM_TEMP_SHARE", NO_SEC, FORBID, NO_SEC),
114 PERMISSION("INFRA_AO_DEVICE_APC_AO_MD", NO_SEC, FORBID, NO_SEC),
115 PERMISSION("INFRA_AO_SECURITY_AO", NO_SEC, FORBID, NO_SEC),
116 PERMISSION("INFRA_AO_TOPCKGEN_REG", NO_SEC, FORBID, NO_SEC),
117 PERMISSION("INFRA_AO_DEVICE_APC_AO_MM", NO_SEC, FORBID, NO_SEC),
118 PERMISSION("INFRASYS_RESERVE", NO_SEC, FORBID, NO_SEC),
119
120 /* 30 */
121 PERMISSION("INFRASYS_RESERVE", NO_SEC, FORBID, NO_SEC),
122 PERMISSION("INFRASYS_RESERVE", NO_SEC, FORBID, NO_SEC),
123 PERMISSION("INFRASYS_RESERVE", NO_SEC, FORBID, NO_SEC),
124 PERMISSION("INFRASYS_SYS_CIRQ", NO_SEC, FORBID, NO_SEC),
125 PERMISSION("INFRASYS_MM_IOMMU", NO_SEC, FORBID, NO_SEC),
126 PERMISSION("INFRASYS_EFUSE_PDN_DEBUG", NO_SEC, FORBID, NO_SEC),
127 PERMISSION("INFRASYS_DEVICE_APC", NO_SEC, FORBID, NO_SEC),
128 PERMISSION("INFRASYS_DBG_TRACKER", NO_SEC, FORBID, NO_SEC),
129 PERMISSION("INFRASYS_CCIF0_AP", NO_SEC, FORBID, NO_SEC),
130 PERMISSION("INFRASYS_CCIF0_MD", NO_SEC, FORBID, NO_SEC),
131
132 /* 40 */
133 PERMISSION("INFRASYS_CCIF1_AP", NO_SEC, FORBID, NO_SEC),
134 PERMISSION("INFRASYS_CCIF1_MD", NO_SEC, FORBID, NO_SEC),
135 PERMISSION("INFRASYS_MBIST", NO_SEC, FORBID, NO_SEC),
136 PERMISSION("INFRASYS_INFRA_PDN_REGISTER", NO_SEC, FORBID, NO_SEC),
137 PERMISSION("INFRASYS_TRNG", NO_SEC, FORBID, NO_SEC),
138 PERMISSION("INFRASYS_DX_CC", NO_SEC, FORBID, NO_SEC),
139 PERMISSION("MD_CCIF_MD1", NO_SEC, FORBID, NO_SEC),
140 PERMISSION("INFRASYS_CQ_DMA", NO_SEC, FORBID, NO_SEC),
141 PERMISSION("MD_CCIF_MD2", NO_SEC, FORBID, NO_SEC),
142 PERMISSION("INFRASYS_SRAMROM", NO_SEC, FORBID, NO_SEC),
143
144 /* 50 */
145 PERMISSION("ANA_MIPI_DSI0", NO_SEC, FORBID, NO_SEC),
146 PERMISSION("INFRASYS_RESERVE", NO_SEC, FORBID, NO_SEC),
147 PERMISSION("ANA_MIPI_CSI0", NO_SEC, FORBID, NO_SEC),
148 PERMISSION("ANA_MIPI_CSI1", NO_SEC, FORBID, NO_SEC),
149 PERMISSION("INFRASYS_EMI", NO_SEC, FORBID, NO_SEC),
150 PERMISSION("INFRASYS_RESERVE", NO_SEC, FORBID, NO_SEC),
151 PERMISSION("INFRASYS_CLDMA_PDN", NO_SEC, FORBID, NO_SEC),
152 PERMISSION("CLDMA_PDN_MD_MISC", NO_SEC, FORBID, NO_SEC),
153 PERMISSION("INFRA_MD", NO_SEC, FORBID, NO_SEC),
154 PERMISSION("BPI_BSI_SLV0", NO_SEC, FORBID, NO_SEC),
155
156 /* 60 */
157 PERMISSION("BPI_BSI_SLV1", NO_SEC, FORBID, NO_SEC),
158 PERMISSION("BPI_BSI_SLV2", NO_SEC, FORBID, NO_SEC),
159 PERMISSION("INFRASYS_EMI_MPU", NO_SEC, FORBID, NO_SEC),
160 PERMISSION("INFRASYS_DVFS_PROC", NO_SEC, FORBID, NO_SEC),
161 PERMISSION("INFRASYS_DRAMC_CH0_TOP0", NO_SEC, FORBID, NO_SEC),
162 PERMISSION("INFRASYS_DRAMC_CH0_TOP1", NO_SEC, FORBID, NO_SEC),
163 PERMISSION("INFRASYS_DRAMC_CH0_TOP2", NO_SEC, FORBID, NO_SEC),
164 PERMISSION("INFRASYS_DRAMC_CH0_TOP3", NO_SEC, FORBID, NO_SEC),
165 PERMISSION("INFRASYS_DRAMC_CH0_TOP4", NO_SEC, FORBID, NO_SEC),
166 PERMISSION("INFRASYS_DRAMC_CH1_TOP0", NO_SEC, FORBID, NO_SEC),
167
168 /* 70 */
169 PERMISSION("INFRASYS_DRAMC_CH1_TOP1", NO_SEC, FORBID, NO_SEC),
170 PERMISSION("INFRASYS_DRAMC_CH1_TOP2", NO_SEC, FORBID, NO_SEC),
171 PERMISSION("INFRASYS_DRAMC_CH1_TOP3", NO_SEC, FORBID, NO_SEC),
172 PERMISSION("INFRASYS_DRAMC_CH1_TOP4", NO_SEC, FORBID, NO_SEC),
173 PERMISSION("INFRASYS_GCE", NO_SEC, FORBID, NO_SEC),
174 PERMISSION("INFRASYS_CCIF2_AP", NO_SEC, FORBID, NO_SEC),
175 PERMISSION("INFRASYS_CCIF2_MD", NO_SEC, FORBID, NO_SEC),
176 PERMISSION("INFRASYS_CCIF3_AP", NO_SEC, FORBID, NO_SEC),
177 PERMISSION("INFRASYS_CCIF3_MD", NO_SEC, FORBID, NO_SEC),
178 PERMISSION("INFRA_AO_PWRMCU Partition 1", S_RW_NS_R, FORBID, NO_SEC),
179
180 /* 80 */
181 PERMISSION("INFRA_AO_PWRMCU Partition 2", S_RW_NS_R, FORBID, NO_SEC),
182 PERMISSION("INFRA_AO_PWRMCU Partition 3", S_RW_NS_R, FORBID, NO_SEC),
183 PERMISSION("INFRA_AO_PWRMCU Partition 4", S_RW_NS_R, FORBID, NO_SEC),
184 PERMISSION("INFRA_AO_PWRMCU Partition 5", S_RW_NS_R, FORBID, NO_SEC),
185 PERMISSION("INFRA_AO_PWRMCU Partition 6", S_RW_NS_R, FORBID, NO_SEC),
186 PERMISSION("INFRA_AO_PWRMCU Partition 7", S_RW_NS_R, FORBID, NO_SEC),
187 PERMISSION("INFRA_AO_PWRMCU Partition 8", S_RW_NS_R, FORBID, NO_SEC),
188 PERMISSION("INFRA_AO_SCP", NO_SEC, NO_SEC, NO_SEC),
189 PERMISSION("INFRA_AO_MCUCFG", NO_SEC, FORBID, NO_SEC),
190 PERMISSION("INFRASYS_DBUGSYS", NO_SEC, FORBID, NO_SEC),
191
192 /* 90 */
193 PERMISSION("PERISYS_APDMA", NO_SEC, FORBID, NO_SEC),
194 PERMISSION("PERISYS_AUXADC", NO_SEC, FORBID, NO_SEC),
195 PERMISSION("PERISYS_UART0", NO_SEC, NO_SEC, NO_SEC),
196 PERMISSION("PERISYS_UART1", NO_SEC, FORBID, NO_SEC),
197 PERMISSION("PERISYS_UART2", NO_SEC, FORBID, NO_SEC),
198 PERMISSION("PERISYS_I2C6", NO_SEC, FORBID, NO_SEC),
199 PERMISSION("PERISYS_PWM", NO_SEC, FORBID, NO_SEC),
200 PERMISSION("PERISYS_I2C0", NO_SEC, FORBID, NO_SEC),
201 PERMISSION("PERISYS_I2C1", NO_SEC, FORBID, NO_SEC),
202 PERMISSION("PERISYS_I2C2", NO_SEC, FORBID, NO_SEC),
203
204 /* 100 */
205 PERMISSION("PERISYS_SPI0", NO_SEC, FORBID, NO_SEC),
206 PERMISSION("PERISYS_PTP", NO_SEC, FORBID, NO_SEC),
207 PERMISSION("PERISYS_BTIF", NO_SEC, FORBID, NO_SEC),
208 PERMISSION("RESERVE", NO_SEC, FORBID, NO_SEC),
209 PERMISSION("PERISYS_DISP_PWM", NO_SEC, FORBID, NO_SEC),
210 PERMISSION("PERISYS_I2C3", NO_SEC, FORBID, NO_SEC),
211 PERMISSION("PERISYS_SPI1", NO_SEC, FORBID, NO_SEC),
212 PERMISSION("PERISYS_I2C4", NO_SEC, FORBID, NO_SEC),
213 PERMISSION("PERISYS_SPI2", NO_SEC, FORBID, NO_SEC),
214 PERMISSION("PERISYS_SPI3", NO_SEC, FORBID, NO_SEC),
215
216 /* 110 */
217 PERMISSION("PERISYS_I2C1_IMM", NO_SEC, FORBID, NO_SEC),
218 PERMISSION("PERISYS_I2C2_IMM", NO_SEC, FORBID, NO_SEC),
219 PERMISSION("PERISYS_I2C5", NO_SEC, FORBID, NO_SEC),
220 PERMISSION("PERISYS_I2C5_IMM", NO_SEC, FORBID, NO_SEC),
221 PERMISSION("PERISYS_SPI4", NO_SEC, FORBID, NO_SEC),
222 PERMISSION("PERISYS_SPI5", NO_SEC, FORBID, NO_SEC),
223 PERMISSION("PERISYS_I2C7", NO_SEC, FORBID, NO_SEC),
224 PERMISSION("PERISYS_I2C8", NO_SEC, FORBID, NO_SEC),
225 PERMISSION("PERISYS_USB", NO_SEC, FORBID, NO_SEC),
226 PERMISSION("PERISYS_USB_2_0_SUB", NO_SEC, FORBID, NO_SEC),
227
228 /* 120 */
229 PERMISSION("PERISYS_AUDIO", NO_SEC, FORBID, NO_SEC),
230 PERMISSION("PERISYS_MSDC0", NO_SEC, FORBID, NO_SEC),
231 PERMISSION("PERISYS_MSDC1", NO_SEC, FORBID, NO_SEC),
232 PERMISSION("PERISYS_MSDC2", NO_SEC, FORBID, NO_SEC),
233 PERMISSION("RESERVE", NO_SEC, FORBID, NO_SEC),
234 PERMISSION("PERISYS_UFS", NO_SEC, FORBID, NO_SEC),
235 PERMISSION("RESERVE", NO_SEC, FORBID, NO_SEC),
236 PERMISSION("RESERVE", NO_SEC, FORBID, NO_SEC),
237 PERMISSION("PERISYS_RESERVE", NO_SEC, FORBID, NO_SEC),
238 PERMISSION("EAST_RESERVE_0", NO_SEC, FORBID, NO_SEC),
239
240 /* 130 */
241 PERMISSION("EAST_RESERVE_1", NO_SEC, FORBID, NO_SEC),
242 PERMISSION("EAST_RESERVE_2", NO_SEC, FORBID, NO_SEC),
243 PERMISSION("EAST_RESERVE_3", NO_SEC, FORBID, NO_SEC),
244 PERMISSION("EAST_RESERVE_4", NO_SEC, FORBID, NO_SEC),
245 PERMISSION("EAST_IO_CFG_RT", NO_SEC, FORBID, NO_SEC),
246 PERMISSION("EAST_RESERVE_6", NO_SEC, FORBID, NO_SEC),
247 PERMISSION("EAST_RESERVE_7", NO_SEC, FORBID, NO_SEC),
248 PERMISSION("EAST_CSI0_TOP_AO", NO_SEC, FORBID, NO_SEC),
249 PERMISSION("RESERVE", NO_SEC, FORBID, NO_SEC),
250 PERMISSION("EAST_RESERVE_A", NO_SEC, FORBID, NO_SEC),
251
252 /* 140 */
253 PERMISSION("EAST_RESERVE_B", NO_SEC, FORBID, NO_SEC),
254 PERMISSION("EAST_RESERVE_C", NO_SEC, FORBID, NO_SEC),
255 PERMISSION("EAST_RESERVE_D", NO_SEC, FORBID, NO_SEC),
256 PERMISSION("EAST_RESERVE_E", NO_SEC, FORBID, NO_SEC),
257 PERMISSION("EAST_RESERVE_F", NO_SEC, FORBID, NO_SEC),
258 PERMISSION("SOUTH_RESERVE_0", NO_SEC, FORBID, NO_SEC),
259 PERMISSION("SOUTH_RESERVE_1", NO_SEC, FORBID, NO_SEC),
260 PERMISSION("SOUTH_IO_CFG_RM", NO_SEC, FORBID, NO_SEC),
261 PERMISSION("SOUTH_IO_CFG_RB", NO_SEC, FORBID, NO_SEC),
262 PERMISSION("SOUTH_EFUSE", NO_SEC, FORBID, NO_SEC),
263
264 /* 150 */
265 PERMISSION("SOUTH_RESERVE_5", NO_SEC, FORBID, NO_SEC),
266 PERMISSION("SOUTH_RESERVE_6", NO_SEC, FORBID, NO_SEC),
267 PERMISSION("SOUTH_RESERVE_7", NO_SEC, FORBID, NO_SEC),
268 PERMISSION("SOUTH_RESERVE_8", NO_SEC, FORBID, NO_SEC),
269 PERMISSION("SOUTH_RESERVE_9", NO_SEC, FORBID, NO_SEC),
270 PERMISSION("SOUTH_RESERVE_A", NO_SEC, FORBID, NO_SEC),
271 PERMISSION("SOUTH_RESERVE_B", NO_SEC, FORBID, NO_SEC),
272 PERMISSION("SOUTH_RESERVE_C", NO_SEC, FORBID, NO_SEC),
273 PERMISSION("SOUTH_RESERVE_D", NO_SEC, FORBID, NO_SEC),
274 PERMISSION("SOUTH_RESERVE_E", NO_SEC, FORBID, NO_SEC),
275
276 /* 160 */
277 PERMISSION("SOUTH_RESERVE_F", NO_SEC, FORBID, NO_SEC),
278 PERMISSION("WEST_RESERVE_0", NO_SEC, FORBID, NO_SEC),
279 PERMISSION("WEST_MSDC1_PAD_MACRO", NO_SEC, FORBID, NO_SEC),
280 PERMISSION("WEST_RESERVE_2", NO_SEC, FORBID, NO_SEC),
281 PERMISSION("WEST_RESERVE_3", NO_SEC, FORBID, NO_SEC),
282 PERMISSION("WEST_RESERVE_4", NO_SEC, FORBID, NO_SEC),
283 PERMISSION("WEST_MIPI_TX_CONFIG", NO_SEC, FORBID, NO_SEC),
284 PERMISSION("WEST_RESERVE_6", NO_SEC, FORBID, NO_SEC),
285 PERMISSION("WEST_IO_CFG_LB", NO_SEC, FORBID, NO_SEC),
286 PERMISSION("WEST_IO_CFG_LM", NO_SEC, FORBID, NO_SEC),
287
288 /* 170 */
289 PERMISSION("WEST_IO_CFG_BL", NO_SEC, FORBID, NO_SEC),
290 PERMISSION("WEST_RESERVE_A", NO_SEC, FORBID, NO_SEC),
291 PERMISSION("WEST_RESERVE_B", NO_SEC, FORBID, NO_SEC),
292 PERMISSION("WEST_RESERVE_C", NO_SEC, FORBID, NO_SEC),
293 PERMISSION("WEST_RESERVE_D", NO_SEC, FORBID, NO_SEC),
294 PERMISSION("WEST_RESERVE_E", NO_SEC, FORBID, NO_SEC),
295 PERMISSION("WEST_RESERVE_F", NO_SEC, FORBID, NO_SEC),
296 PERMISSION("NORTH_RESERVE_0", NO_SEC, FORBID, NO_SEC),
297 PERMISSION("EFUSE_TOP", NO_SEC, FORBID, NO_SEC),
298 PERMISSION("NORTH_IO_CFG_LT", NO_SEC, FORBID, NO_SEC),
299
300 /* 180 */
301 PERMISSION("NORTH_IO_CFG_TL", NO_SEC, FORBID, NO_SEC),
302 PERMISSION("NORTH_USB20 PHY", NO_SEC, FORBID, NO_SEC),
303 PERMISSION("NORTH_MSDC0 PAD MACRO", NO_SEC, FORBID, NO_SEC),
304 PERMISSION("NORTH_RESERVE_6", NO_SEC, FORBID, NO_SEC),
305 PERMISSION("NORTH_RESERVE_7", NO_SEC, FORBID, NO_SEC),
306 PERMISSION("NORTH_RESERVE_8", NO_SEC, FORBID, NO_SEC),
307 PERMISSION("NORTH_RESERVE_9", NO_SEC, FORBID, NO_SEC),
308 PERMISSION("NORTH_UFS_MPHY", NO_SEC, FORBID, NO_SEC),
309 PERMISSION("NORTH_RESERVE_B", NO_SEC, FORBID, NO_SEC),
310 PERMISSION("NORTH_RESERVE_C", NO_SEC, FORBID, NO_SEC),
311
312 /* 190 */
313 PERMISSION("NORTH_RESERVE_D", NO_SEC, FORBID, NO_SEC),
314 PERMISSION("NORTH_RESERVE_E", NO_SEC, FORBID, NO_SEC),
315 PERMISSION("NORTH_RESERVE_F", NO_SEC, FORBID, NO_SEC),
316 PERMISSION("PERISYS_CONN", NO_SEC, FORBID, NO_SEC),
317 PERMISSION("PERISYS_MD_VIOLATION", NO_SEC, FORBID, NO_SEC),
318 PERMISSION("PERISYS_RESERVE", NO_SEC, FORBID, NO_SEC)
319 };
320
321 static const struct DEVICE_INFO D_APC_MM_Devices[] = {
322 /* module, domain0, domain1, domain2 */
323
324 /* 0 */
325 PERMISSION("G3D_CONFIG", NO_SEC, FORBID, NO_SEC),
326 PERMISSION("MFG VAD", NO_SEC, FORBID, NO_SEC),
327 PERMISSION("SC0 VAD", NO_SEC, FORBID, NO_SEC),
328 PERMISSION("MFG_OTHERS", NO_SEC, FORBID, NO_SEC),
329 PERMISSION("MMSYS_CONFIG", NO_SEC, NO_SEC, NO_SEC),
330 PERMISSION("MDP_RDMA0", NO_SEC, NO_SEC, NO_SEC),
331 PERMISSION("MDP_RDMA1", NO_SEC, NO_SEC, NO_SEC),
332 PERMISSION("MDP_RSZ0", NO_SEC, NO_SEC, NO_SEC),
333 PERMISSION("MDP_RSZ1", NO_SEC, NO_SEC, NO_SEC),
334 PERMISSION("MDP_WROT0", NO_SEC, NO_SEC, NO_SEC),
335
336 /* 10 */
337 PERMISSION("MDP_WDMA", NO_SEC, NO_SEC, NO_SEC),
338 PERMISSION("MDP_TDSHP", NO_SEC, FORBID, NO_SEC),
339 PERMISSION("DISP_OVL0", NO_SEC, FORBID, NO_SEC),
340 PERMISSION("DISP_OVL0_2L", NO_SEC, FORBID, NO_SEC),
341 PERMISSION("DISP_OVL1_2L", NO_SEC, FORBID, NO_SEC),
342 PERMISSION("DISP_RDMA0", NO_SEC, FORBID, NO_SEC),
343 PERMISSION("DISP_RDMA1", NO_SEC, FORBID, NO_SEC),
344 PERMISSION("DISP_WDMA0", NO_SEC, FORBID, NO_SEC),
345 PERMISSION("DISP_COLOR0", NO_SEC, FORBID, NO_SEC),
346 PERMISSION("DISP_CCORR0", NO_SEC, FORBID, NO_SEC),
347
348 /* 20 */
349 PERMISSION("DISP_AAL0", NO_SEC, FORBID, NO_SEC),
350 PERMISSION("DISP_GAMMA0", NO_SEC, FORBID, NO_SEC),
351 PERMISSION("DISP_DITHER0", NO_SEC, FORBID, NO_SEC),
352 PERMISSION("DSI_SPLIT", NO_SEC, FORBID, NO_SEC),
353 PERMISSION("DSI0", NO_SEC, FORBID, NO_SEC),
354 PERMISSION("DPI", NO_SEC, FORBID, NO_SEC),
355 PERMISSION("MM_MUTEX", NO_SEC, FORBID, NO_SEC),
356 PERMISSION("SMI_LARB0", NO_SEC, FORBID, NO_SEC),
357 PERMISSION("SMI_LARB1", NO_SEC, FORBID, NO_SEC),
358 PERMISSION("SMI_COMMON", NO_SEC, FORBID, NO_SEC),
359
360 /* 30 */
361 PERMISSION("DISP_RSZ", NO_SEC, FORBID, NO_SEC),
362 PERMISSION("MDP_AAL", NO_SEC, NO_SEC, NO_SEC),
363 PERMISSION("MDP_CCORR", NO_SEC, NO_SEC, NO_SEC),
364 PERMISSION("DBI", NO_SEC, FORBID, NO_SEC),
365 PERMISSION("MMSYS_OTHERS", NO_SEC, FORBID, NO_SEC),
366 PERMISSION("IMGSYS_CONFIG", NO_SEC, NO_SEC, NO_SEC),
367 PERMISSION("IMGSYS_SMI_LARB1", NO_SEC, FORBID, NO_SEC),
368 PERMISSION("IMGSYS_DISP_A0", NO_SEC, NO_SEC, NO_SEC),
369 PERMISSION("IMGSYS_DISP_A1", NO_SEC, FORBID, NO_SEC),
370 PERMISSION("IMGSYS_DISP_A2", NO_SEC, FORBID, NO_SEC),
371
372 /* 40 */
373 PERMISSION("IMGSYS_DISP_A3", NO_SEC, FORBID, NO_SEC),
374 PERMISSION("IMGSYS_DISP_A4", NO_SEC, FORBID, NO_SEC),
375 PERMISSION("IMGSYS_DISP_A5", NO_SEC, FORBID, NO_SEC),
376 PERMISSION("IMGSYS_DPE", NO_SEC, FORBID, NO_SEC),
377 PERMISSION("IMGSYS_RSC", NO_SEC, FORBID, NO_SEC),
378 PERMISSION("IMGSYS_WPEA", NO_SEC, FORBID, NO_SEC),
379 PERMISSION("IMGSYS_FDVT", NO_SEC, NO_SEC, NO_SEC),
380 PERMISSION("IMGSYS_OWE", NO_SEC, FORBID, NO_SEC),
381 PERMISSION("IMGSYS_WPEB", NO_SEC, FORBID, NO_SEC),
382 PERMISSION("IMGSYS_MFB", NO_SEC, FORBID, NO_SEC),
383
384 /* 50 */
385 PERMISSION("IMGSYS_SMI_LARB2", NO_SEC, FORBID, NO_SEC),
386 PERMISSION("IMGSYS_OTHERS", NO_SEC, FORBID, NO_SEC),
387 PERMISSION("VENCSYS_GLOBAL_CON", NO_SEC, NO_SEC, NO_SEC),
388 PERMISSION("VENCSYSSYS_SMI_LARB4", NO_SEC, NO_SEC, NO_SEC),
389 PERMISSION("VENCSYS_VENC", NO_SEC, NO_SEC, NO_SEC),
390 PERMISSION("VENCSYS_JPGENC", NO_SEC, FORBID, NO_SEC),
391 PERMISSION("VENCSYS_MBIST_CTRL", NO_SEC, FORBID, NO_SEC),
392 PERMISSION("VENCSYS_OTHERS", NO_SEC, FORBID, NO_SEC),
393 PERMISSION("VDECSYS_GLOBAL_CON", NO_SEC, NO_SEC, NO_SEC),
394 PERMISSION("VDECSYS_SMI_LARB1", NO_SEC, FORBID, NO_SEC),
395
396 /* 60 */
397 PERMISSION("VDECSYS_FULL_TOP", NO_SEC, NO_SEC, NO_SEC),
398 PERMISSION("VDECSYS_OTHERS", NO_SEC, FORBID, NO_SEC),
399 PERMISSION("CAMSYS_CAMSYS_TOP", NO_SEC, FORBID, NO_SEC),
400 PERMISSION("CAMSYS_LARB6", NO_SEC, NO_SEC, NO_SEC),
401 PERMISSION("CAMSYS_LARB3", NO_SEC, NO_SEC, NO_SEC),
402 PERMISSION("CAMSYS_CAM_TOP", NO_SEC, NO_SEC, NO_SEC),
403 PERMISSION("CAMSYS_CAM_A", NO_SEC, NO_SEC, NO_SEC),
404 PERMISSION("CAMSYS_CAM_A", NO_SEC, NO_SEC, NO_SEC),
405 PERMISSION("CAMSYS_CAM_B", NO_SEC, NO_SEC, NO_SEC),
406 PERMISSION("CAMSYS_CAM_B", NO_SEC, NO_SEC, NO_SEC),
407
408 /* 70 */
409 PERMISSION("CAMSYS_CAM_C", NO_SEC, NO_SEC, NO_SEC),
410 PERMISSION("CAMSYS_CAM_C", NO_SEC, NO_SEC, NO_SEC),
411 PERMISSION("CAMSYS_CAM_TOP_SET", NO_SEC, FORBID, NO_SEC),
412 PERMISSION("CAMSYS_CAM_A_SET", NO_SEC, FORBID, NO_SEC),
413 PERMISSION("CAMSYS_CAM_A_SET", NO_SEC, FORBID, NO_SEC),
414 PERMISSION("CAMSYS_CAM_B_SET", NO_SEC, FORBID, NO_SEC),
415 PERMISSION("CAMSYS_CAM_B_SET", NO_SEC, FORBID, NO_SEC),
416 PERMISSION("CAMSYS_CAM_C_SET", NO_SEC, FORBID, NO_SEC),
417 PERMISSION("CAMSYS_CAM_C_SET", NO_SEC, FORBID, NO_SEC),
418 PERMISSION("CAMSYS_CAM_TOP_INNER", NO_SEC, FORBID, NO_SEC),
419
420 /* 80 */
421 PERMISSION("CAMSYS_CAM_A_INNER", NO_SEC, FORBID, NO_SEC),
422 PERMISSION("CAMSYS_CAM_A_INNER", NO_SEC, FORBID, NO_SEC),
423 PERMISSION("CAMSYS_CAM_B_INNER", NO_SEC, FORBID, NO_SEC),
424 PERMISSION("CAMSYS_CAM_B_INNER", NO_SEC, FORBID, NO_SEC),
425 PERMISSION("CAMSYS_CAM_C_INNER", NO_SEC, FORBID, NO_SEC),
426 PERMISSION("CAMSYS_CAM_C_INNER", NO_SEC, FORBID, NO_SEC),
427 PERMISSION("CAMSYS_CAM_A_EXT", NO_SEC, FORBID, NO_SEC),
428 PERMISSION("CAMSYS_CAM_B_EXT", NO_SEC, FORBID, NO_SEC),
429 PERMISSION("CAMSYS_CAM_C_EXT", NO_SEC, FORBID, NO_SEC),
430 PERMISSION("CAMSYS_CAM_TOP_CLR", NO_SEC, FORBID, NO_SEC),
431
432 /* 90 */
433 PERMISSION("CAMSYS_CAM_A_CLR", NO_SEC, FORBID, NO_SEC),
434 PERMISSION("CAMSYS_CAM_A_CLR", NO_SEC, FORBID, NO_SEC),
435 PERMISSION("CAMSYS_CAM_B_CLR", NO_SEC, FORBID, NO_SEC),
436 PERMISSION("CAMSYS_CAM_B_CLR", NO_SEC, FORBID, NO_SEC),
437 PERMISSION("CAMSYS_CAM_C_CLR", NO_SEC, FORBID, NO_SEC),
438 PERMISSION("CAMSYS_CAM_C_CLR", NO_SEC, FORBID, NO_SEC),
439 PERMISSION("CAMSYS_CAM_A_EXT", NO_SEC, FORBID, NO_SEC),
440 PERMISSION("CAMSYS_CAM_B_EXT", NO_SEC, FORBID, NO_SEC),
441 PERMISSION("CAMSYS_CAM_C_EXT", NO_SEC, FORBID, NO_SEC),
442 PERMISSION("CAMSYS_CAM_RESERVE", NO_SEC, FORBID, NO_SEC),
443
444 /* 100 */
445 PERMISSION("CAMSYS_SENINF_A", NO_SEC, FORBID, NO_SEC),
446 PERMISSION("CAMSYS_SENINF_B", NO_SEC, FORBID, NO_SEC),
447 PERMISSION("CAMSYS_SENINF_C", NO_SEC, FORBID, NO_SEC),
448 PERMISSION("CAMSYS_SENINF_D", NO_SEC, FORBID, NO_SEC),
449 PERMISSION("CAMSYS_SENINF_E", NO_SEC, FORBID, NO_SEC),
450 PERMISSION("CAMSYS_SENINF_F", NO_SEC, FORBID, NO_SEC),
451 PERMISSION("CAMSYS_SENINF_G", NO_SEC, FORBID, NO_SEC),
452 PERMISSION("CAMSYS_SENINF_H", NO_SEC, FORBID, NO_SEC),
453 PERMISSION("CAMSYS_CAMSV_A", NO_SEC, FORBID, NO_SEC),
454 PERMISSION("CAMSYS_CAMSV_B", NO_SEC, FORBID, NO_SEC),
455
456 /* 110 */
457 PERMISSION("CAMSYS_CAMSV_C", NO_SEC, FORBID, NO_SEC),
458 PERMISSION("CAMSYS_CAMSV_D", NO_SEC, FORBID, NO_SEC),
459 PERMISSION("CAMSYS_MD32 DMEM_12", NO_SEC, FORBID, NO_SEC),
460 PERMISSION("CAMSYS_RESEVE", NO_SEC, FORBID, NO_SEC),
461 PERMISSION("CAMSYS_CCU_CTL", NO_SEC, FORBID, NO_SEC),
462 PERMISSION("CAMSYS_CCU_H2T_A", NO_SEC, FORBID, NO_SEC),
463 PERMISSION("CAMSYS_CCU_T2H_A", NO_SEC, FORBID, NO_SEC),
464 PERMISSION("CAMSYS_RESERVE", NO_SEC, FORBID, NO_SEC),
465 PERMISSION("CAMSYS_RESERVE", NO_SEC, FORBID, NO_SEC),
466 PERMISSION("CAMSYS_CCU_DMA", NO_SEC, FORBID, NO_SEC),
467
468 /* 120 */
469 PERMISSION("CAMSYS_TSF", NO_SEC, FORBID, NO_SEC),
470 PERMISSION("CAMSYS_MD32_PMEM_24", NO_SEC, FORBID, NO_SEC),
471 PERMISSION("CAMSYS_OTHERS", NO_SEC, FORBID, NO_SEC),
472 PERMISSION("VPUSYS_CFG", NO_SEC, FORBID, NO_SEC),
473 PERMISSION("VPUSYS_ADL_CTRL", NO_SEC, FORBID, NO_SEC),
474 PERMISSION("VPUSYS_COREA_DMEM_0_128KB", NO_SEC, FORBID, NO_SEC),
475 PERMISSION("VPUSYS_COREA_DMEM_128_256KB", NO_SEC, FORBID, NO_SEC),
476 PERMISSION("VPUSYS_COREA_IMEM_256KB", NO_SEC, FORBID, NO_SEC),
477 PERMISSION("VPUSYS_COREA_CONTROL", NO_SEC, FORBID, NO_SEC),
478 PERMISSION("VPUSYS_COREA_DEBUG", NO_SEC, FORBID, NO_SEC),
479
480 /* 130 */
481 PERMISSION("VPUSYS_COREB_DMEM_0_128KB", NO_SEC, FORBID, NO_SEC),
482 PERMISSION("VPUSYS_COREB_DMEM_128_256KB", NO_SEC, FORBID, NO_SEC),
483 PERMISSION("VPUSYS_COREB_IMEM_256KB", NO_SEC, FORBID, NO_SEC),
484 PERMISSION("VPUSYS_COREB_CONTROL", NO_SEC, FORBID, NO_SEC),
485 PERMISSION("VPUSYS_COREB_DEBUG", NO_SEC, FORBID, NO_SEC),
486 PERMISSION("VPUSYS_COREC_DMEM_0_128KB", NO_SEC, FORBID, NO_SEC),
487 PERMISSION("VPUSYS_COREC_DMEM_128_256KB", NO_SEC, FORBID, NO_SEC),
488 PERMISSION("VPUSYS_COREC_IMEM_256KB", NO_SEC, FORBID, NO_SEC),
489 PERMISSION("VPUSYS_COREC_CONTROL", NO_SEC, FORBID, NO_SEC),
490 PERMISSION("VPUSYS_COREC_DEBUG", NO_SEC, FORBID, NO_SEC),
491
492 /* 140 */
493 PERMISSION("VPUSYS_OTHERS", NO_SEC, FORBID, NO_SEC)
494 };
495
496 void devapc_init(void);
497
498 #endif /* DEVAPC_H */
499