plat/bcm/include/pmc_addr_4912.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright 2019 Broadcom Ltd.
   4  */
   5 /*
   6 <:copyright-BRCM:2019:DUAL/GPL:standard
   7
   8    Copyright (c) 2019 Broadcom
   9    All Rights Reserved
  10
  11 This program is free software; you can redistribute it and/or modify
  12 it under the terms of the GNU General Public License, version 2, as published by
  13 the Free Software Foundation (the "GPL").
  14
  15 This program is distributed in the hope that it will be useful,
  16 but WITHOUT ANY WARRANTY; without even the implied warranty of
  17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18 GNU General Public License for more details.
  19
  20
  21 A copy of the GPL is available at http://www.broadcom.com/licenses/GPLv2.php, or by
  22 writing to the Free Software Foundation, Inc., 59 Temple Place - Suite 330,
  23 Boston, MA 02111-1307, USA.
  24
  25 :>
  26 */
  27
  28 #ifndef _4912_PMC_ADDR_H
  29 #define _4912_PMC_ADDR_H
  30
  31 #define PMB_BUS_MAX             2
  32 #define PMB_BUS_ID_SHIFT        12
  33
  34 #define PMB_BUS_PERIPH          0
  35 #define PMB_ADDR_PERIPH         (0 | PMB_BUS_PERIPH << PMB_BUS_ID_SHIFT)
  36 #define PMB_ZONES_PERIPH        4
  37
  38 #define PMB_BUS_CHIP_CLKRST     0
  39 #define PMB_ADDR_CHIP_CLKRST    (1 | PMB_BUS_CHIP_CLKRST << PMB_BUS_ID_SHIFT)
  40 #define PMB_ZONES_CHIP_CLKRST   0
  41
  42 #define PMB_BUS_PVTMON          1
  43 #define PMB_ADDR_PVTMON         (3 | PMB_BUS_PVTMON << PMB_BUS_ID_SHIFT)
  44 #define PMB_ZONES_PVTMON        0
  45
  46 #define PMB_BUS_CRYPTO          1
  47 #define PMB_ADDR_CRYPTO         (4 | PMB_BUS_CRYPTO << PMB_BUS_ID_SHIFT)
  48 #define PMB_ZONES_CRYPTO        0
  49
  50 #define PMB_BUS_USB30_2X        0
  51 #define PMB_ADDR_USB30_2X       (5 | PMB_BUS_USB30_2X << PMB_BUS_ID_SHIFT)
  52 #define PMB_ZONES_USB30_2X      4
  53
  54 #define PMB_BUS_PCIE1           1
  55 #define PMB_ADDR_PCIE1          (6 | PMB_BUS_PCIE1 << PMB_BUS_ID_SHIFT)
  56 #define PMB_ZONES_PCIE1         4
  57
  58 // referring to PCIEG3
  59 #define PMB_BUS_PCIE3           1
  60 #define PMB_ADDR_PCIE3          (7 | PMB_BUS_PCIE3 << PMB_BUS_ID_SHIFT)
  61 #define PMB_ZONES_PCIE3         1
  62
  63 #define PMB_BUS_MEMC            1
  64 #define PMB_ADDR_MEMC           (8 | PMB_BUS_MEMC << PMB_BUS_ID_SHIFT)
  65 #define PMB_ZONES_MEMC          1
  66
  67 #define PMB_BUS_XRDP            1
  68 #define PMB_ADDR_XRDP           (9 | PMB_BUS_XRDP << PMB_BUS_ID_SHIFT)
  69 #define PMB_ZONES_XRDP          1
  70
  71 #define PMB_BUS_PCIE2           1
  72 #define PMB_ADDR_PCIE2          (11 | PMB_BUS_PCIE2 << PMB_BUS_ID_SHIFT)
  73 #define PMB_ZONES_PCIE2         1
  74
  75 #define PMB_BUS_PCIE0           0
  76 #define PMB_ADDR_PCIE0          (12 | PMB_BUS_PCIE0 << PMB_BUS_ID_SHIFT)
  77 #define PMB_ZONES_PCIE0         1
  78
  79 #define PMB_BUS_ETH             1
  80 #define PMB_ADDR_ETH            (13 | PMB_BUS_ETH << PMB_BUS_ID_SHIFT)
  81 #define PMB_ZONES_ETH           1
  82
  83 #define PMB_BUS_MPM             1
  84 #define PMB_ADDR_MPM            (14 | PMB_BUS_MPM << PMB_BUS_ID_SHIFT)
  85 #define PMB_ZONES_MPM           1
  86
  87 #define PMB_BUS_XRDPPLL         0
  88 #define PMB_ADDR_XRDPPLL        (15 | PMB_BUS_XRDPPLL << PMB_BUS_ID_SHIFT)
  89 #define PMB_ZONES_XRDPPLL       0
  90
  91 #define PMB_BUS_PERIPH_ARS      0
  92 #define PMB_ADDR_PERIPH_ARS     (16 | PMB_BUS_PERIPH_ARS << PMB_BUS_ID_SHIFT)
  93 #define PMB_ZONES_PERIPH_ARS    0
  94
  95 #define PMB_BUS_PCIE0_UBUS_ARS  0
  96 #define PMB_ADDR_PCIE0_UBUS_ARS (17 | PMB_BUS_PCIE0_UBUS_ARS << PMB_BUS_ID_SHIFT)
  97 #define PMB_ZONES_PCIE0_UBUS_ARS 0
  98
  99 #define PMB_BUS_USB30_2X_ARS    0
 100 #define PMB_ADDR_USB30_2X_ARS   (18 | PMB_BUS_USB30_2X_ARS << PMB_BUS_ID_SHIFT)
 101 #define PMB_ZONES_USB30_2X_ARS  0
 102
 103 #define PMB_BUS_SYS_ARS         0
 104 #define PMB_ADDR_SYS_ARS        (19 | PMB_BUS_SYS_ARS << PMB_BUS_ID_SHIFT)
 105 #define PMB_ZONES_SYS_ARS       0
 106
 107 #define PMB_BUS_CRYPTO2_ARS     1
 108 #define PMB_ADDR_CRYPTO2_ARS    (20 | PMB_BUS_CRYPTO2_ARS << PMB_BUS_ID_SHIFT)
 109 #define PMB_ZONES_CRYPTO2_ARS   0
 110
 111 #define PMB_BUS_XRDP_ARS        1
 112 #define PMB_ADDR_XRDP_ARS       (21 | PMB_BUS_XRDP_ARS << PMB_BUS_ID_SHIFT)
 113 #define PMB_ZONES_XRDP_ARS      0
 114
 115 #define PMB_BUS_MPM_ARS         1
 116 #define PMB_ADDR_MPM_ARS        (22 | PMB_BUS_MPM_ARS << PMB_BUS_ID_SHIFT)
 117 #define PMB_ZONES_MPM_ARS       0
 118
 119 #define PMB_BUS_MEMC_ARS        1
 120 #define PMB_ADDR_MEMC_ARS       (23 | PMB_BUS_MEMC_ARS << PMB_BUS_ID_SHIFT)
 121 #define PMB_ZONES_MEMC_ARS      0
 122
 123 #define PMB_BUS_ETH_ARS         1
 124 #define PMB_ADDR_ETH_ARS        (24 | PMB_BUS_ETH_ARS << PMB_BUS_ID_SHIFT)
 125 #define PMB_ZONES_ETH_ARS       0
 126
 127 #define PMB_BUS_PCIE1_UBUS_ARS  1
 128 #define PMB_ADDR_PCIE1_UBUS_ARS (25 | PMB_BUS_PCIE1_UBUS_ARS << PMB_BUS_ID_SHIFT)
 129 #define PMB_ZONES_PCIE1_UBUS_ARS        0
 130
 131 #define PMB_BUS_PCIE3_ARS       1
 132 #define PMB_ADDR_PCIE3_ARS      (26 | PMB_BUS_PCIE3_ARS << PMB_BUS_ID_SHIFT)
 133 #define PMB_ZONES_PCIE3_ARS     0
 134
 135 #define PMB_BUS_MERLIN0_UBUS_ARS        1
 136 #define PMB_ADDR_MERLIN0_UBUS_ARS       (27 | PMB_BUS_MERLIN0_UBUS_ARS << PMB_BUS_ID_SHIFT)
 137 #define PMB_ZONES_MERLIN0_UBUS_ARS      0
 138
 139 #define PMB_BUS_MERLIN1_UBUS_ARS        1
 140 #define PMB_ADDR_MERLIN1_UBUS_ARS       (28 | PMB_BUS_MERLIN1_UBUS_ARS << PMB_BUS_ID_SHIFT)
 141 #define PMB_ZONES_MERLIN1_UBUS_ARS      0
 142
 143 #define PMB_BUS_MERLIN2_UBUS_ARS        1
 144 #define PMB_ADDR_MERLIN2_UBUS_ARS       (29 | PMB_BUS_MERLIN2_UBUS_ARS << PMB_BUS_ID_SHIFT)
 145 #define PMB_ZONES_MERLIN2_UBUS_ARS      0
 146
 147 #define PMB_BUS_ORION_PLL       1
 148 #define PMB_ADDR_ORION_PLL      (32 | PMB_BUS_ORION_PLL << PMB_BUS_ID_SHIFT)
 149 #define PMB_ZONES_ORION_PLL     0
 150 #define PMB_BUS_BIU_PLL         PMB_BUS_ORION_PLL
 151 #define PMB_ADDR_BIU_PLL        PMB_ADDR_ORION_PLL
 152 #define PMB_ZONES_BIU_PLL       PMB_ZONES_ORION_PLL
 153
 154 #define PMB_BUS_ORION_BPCM      1
 155 #define PMB_ADDR_ORION_BPCM     (33 | PMB_BUS_ORION_BPCM << PMB_BUS_ID_SHIFT)
 156 #define PMB_ZONES_ORION_BPCM    1
 157 #define PMB_BUS_BIU_BPCM        PMB_BUS_ORION_BPCM
 158 #define PMB_ADDR_BIU_BPCM       PMB_ADDR_ORION_BPCM
 159 #define PMB_ZONES_BIU_BPCM      PMB_ZONES_ORION_BPCM
 160
 161 #define PMB_BUS_ORION_CPU0      1
 162 #define PMB_ADDR_ORION_CPU0     (34 | PMB_BUS_ORION_CPU0 << PMB_BUS_ID_SHIFT)
 163 #define PMB_ZONES_ORION_CPU0    1
 164
 165 #define PMB_BUS_ORION_CPU1      1
 166 #define PMB_ADDR_ORION_CPU1     (35 | PMB_BUS_ORION_CPU1 << PMB_BUS_ID_SHIFT)
 167 #define PMB_ZONES_ORION_CPU1    1
 168
 169 #define PMB_BUS_ORION_CPU2      1
 170 #define PMB_ADDR_ORION_CPU2     (36 | PMB_BUS_ORION_CPU2 << PMB_BUS_ID_SHIFT)
 171 #define PMB_ZONES_ORION_CPU2    1
 172
 173 #define PMB_BUS_ORION_CPU3      1
 174 #define PMB_ADDR_ORION_CPU3     (37 | PMB_BUS_ORION_CPU3 << PMB_BUS_ID_SHIFT)
 175 #define PMB_ZONES_ORION_CPU3    1
 176
 177 #define PMB_BUS_ORION_NONCPU    1
 178 #define PMB_ADDR_ORION_NONCPU   (38 | PMB_BUS_ORION_NONCPU << PMB_BUS_ID_SHIFT)
 179 #define PMB_ZONES_ORION_NONCPU  1
 180
 181 #define PMB_BUS_ORION_ARS       1
 182 #define PMB_ADDR_ORION_ARS      (39 | PMB_BUS_ORION_ARS << PMB_BUS_ID_SHIFT)
 183 #define PMB_ZONES_ORION_ARS     0
 184
 185 #define PMB_BUS_ORION_ACEBIU_ARS        1
 186 #define PMB_ADDR_ORION_ACEBIU_ARS       (40 | PMB_BUS_ORION_ACEBIU_ARS << PMB_BUS_ID_SHIFT)
 187 #define PMB_ZONES_ORION_ACEBIU_ARS      0
 188 #endif