package/boot/uboot-mediatek/patches/101-07-i2c-mediatek-fix-I2C-usability-for-MT7981.patch

   1 From 77898faf6ce56eb08109cdb853f074bad5acee55 Mon Sep 17 00:00:00 2001
   2 From: Weijie Gao <weijie.gao@mediatek.com>
   3 Date: Wed, 19 Jul 2023 17:16:15 +0800
   4 Subject: [PATCH 07/29] i2c: mediatek: fix I2C usability for MT7981
   5
   6 MT7981 actually uses MediaTek I2C controller v3 instead of v1.
   7 This patch adds support for I2C controller v3 fix fixes the I2C usability
   8 for MT7981.
   9
  10 Signed-off-by: Sam Shih <sam.shih@mediatek.com>
  11 Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
  12 ---
  13  drivers/i2c/mtk_i2c.c | 45 +++++++++++++++++++++++++++++++++++++++++--
  14  1 file changed, 43 insertions(+), 2 deletions(-)
  15
  16 --- a/drivers/i2c/mtk_i2c.c
  17 +++ b/drivers/i2c/mtk_i2c.c
  18 @@ -183,9 +183,36 @@ static const uint mt_i2c_regs_v2[] = {
  19         [REG_DCM_EN] = 0xf88,
  20  };
  21
  22 +static const uint mt_i2c_regs_v3[] = {
  23 +       [REG_PORT] = 0x0,
  24 +       [REG_INTR_MASK] = 0x8,
  25 +       [REG_INTR_STAT] = 0xc,
  26 +       [REG_CONTROL] = 0x10,
  27 +       [REG_TRANSFER_LEN] = 0x14,
  28 +       [REG_TRANSAC_LEN] = 0x18,
  29 +       [REG_DELAY_LEN] = 0x1c,
  30 +       [REG_TIMING] = 0x20,
  31 +       [REG_START] = 0x24,
  32 +       [REG_EXT_CONF] = 0x28,
  33 +       [REG_LTIMING] = 0x2c,
  34 +       [REG_HS] = 0x30,
  35 +       [REG_IO_CONFIG] = 0x34,
  36 +       [REG_FIFO_ADDR_CLR] = 0x38,
  37 +       [REG_TRANSFER_LEN_AUX] = 0x44,
  38 +       [REG_CLOCK_DIV] = 0x48,
  39 +       [REG_SOFTRESET] = 0x50,
  40 +       [REG_SLAVE_ADDR] = 0x94,
  41 +       [REG_DEBUGSTAT] = 0xe4,
  42 +       [REG_DEBUGCTRL] = 0xe8,
  43 +       [REG_FIFO_STAT] = 0xf4,
  44 +       [REG_FIFO_THRESH] = 0xf8,
  45 +       [REG_DCM_EN] = 0xf88,
  46 +};
  47 +
  48  struct mtk_i2c_soc_data {
  49         const uint *regs;
  50         uint dma_sync: 1;
  51 +       uint ltiming_adjust: 1;
  52  };
  53
  54  struct mtk_i2c_priv {
  55 @@ -401,6 +428,10 @@ static int mtk_i2c_set_speed(struct udev
  56                                 (sample_cnt << HS_SAMPLE_OFFSET) |
  57                                 (step_cnt << HS_STEP_OFFSET);
  58                 i2c_writel(priv, REG_HS, high_speed_reg);
  59 +               if (priv->soc_data->ltiming_adjust) {
  60 +                       timing_reg = (sample_cnt << 12) | (step_cnt << 9);
  61 +                       i2c_writel(priv, REG_LTIMING, timing_reg);
  62 +               }
  63         } else {
  64                 ret = mtk_i2c_calculate_speed(clk_src, priv->speed,
  65                                               &step_cnt, &sample_cnt);
  66 @@ -412,7 +443,12 @@ static int mtk_i2c_set_speed(struct udev
  67                 high_speed_reg = I2C_TIME_CLR_VALUE;
  68                 i2c_writel(priv, REG_TIMING, timing_reg);
  69                 i2c_writel(priv, REG_HS, high_speed_reg);
  70 +               if (priv->soc_data->ltiming_adjust) {
  71 +                       timing_reg = (sample_cnt << 6) | step_cnt;
  72 +                       i2c_writel(priv, REG_LTIMING, timing_reg);
  73 +               }
  74         }
  75 +
  76  exit:
  77         if (mtk_i2c_clk_disable(priv))
  78                 return log_msg_ret("set_speed disable clk", -1);
  79 @@ -725,7 +761,6 @@ static int mtk_i2c_probe(struct udevice
  80                 return log_msg_ret("probe enable clk", -1);
  81
  82         mtk_i2c_init_hw(priv);
  83 -
  84         if (mtk_i2c_clk_disable(priv))
  85                 return log_msg_ret("probe disable clk", -1);
  86
  87 @@ -750,31 +785,37 @@ static int mtk_i2c_deblock(struct udevic
  88  static const struct mtk_i2c_soc_data mt76xx_soc_data = {
  89         .regs = mt_i2c_regs_v1,
  90         .dma_sync = 0,
  91 +       .ltiming_adjust = 0,
  92  };
  93
  94  static const struct mtk_i2c_soc_data mt7981_soc_data = {
  95 -       .regs = mt_i2c_regs_v1,
  96 +       .regs = mt_i2c_regs_v3,
  97         .dma_sync = 1,
  98 +       .ltiming_adjust = 1,
  99  };
 100
 101  static const struct mtk_i2c_soc_data mt7986_soc_data = {
 102         .regs = mt_i2c_regs_v1,
 103         .dma_sync = 1,
 104 +       .ltiming_adjust = 0,
 105  };
 106
 107  static const struct mtk_i2c_soc_data mt8183_soc_data = {
 108         .regs = mt_i2c_regs_v2,
 109         .dma_sync = 1,
 110 +       .ltiming_adjust = 0,
 111  };
 112
 113  static const struct mtk_i2c_soc_data mt8518_soc_data = {
 114         .regs = mt_i2c_regs_v1,
 115         .dma_sync = 0,
 116 +       .ltiming_adjust = 0,
 117  };
 118
 119  static const struct mtk_i2c_soc_data mt8512_soc_data = {
 120         .regs = mt_i2c_regs_v1,
 121         .dma_sync = 1,
 122 +       .ltiming_adjust = 0,
 123  };
 124
 125  static const struct dm_i2c_ops mtk_i2c_ops = {