arch/arm/mach-rockchip/rk3399-board-spl.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * (C) Copyright 2016 Rockchip Electronics Co., Ltd
   4  * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
   5  */
   6
   7 #include <common.h>
   8 #include <debug_uart.h>
   9 #include <dm.h>
  10 #include <ram.h>
  11 #include <spl.h>
  12 #include <spl_gpio.h>
  13 #include <syscon.h>
  14 #include <asm/gpio.h>
  15 #include <asm/io.h>
  16 #include <asm/arch-rockchip/bootrom.h>
  17 #include <asm/arch-rockchip/clock.h>
  18 #include <asm/arch-rockchip/cru_rk3399.h>
  19 #include <asm/arch-rockchip/grf_rk3399.h>
  20 #include <asm/arch-rockchip/hardware.h>
  21 #include <asm/arch-rockchip/periph.h>
  22 #include <asm/arch-rockchip/sys_proto.h>
  23 #include <power/regulator.h>
  24 #include <dm/pinctrl.h>
  25
  26 void board_return_to_bootrom(void)
  27 {
  28         back_to_bootrom(BROM_BOOT_NEXTSTAGE);
  29 }
  30
  31 static const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
  32         [BROM_BOOTSOURCE_EMMC] = "/sdhci@fe330000",
  33         [BROM_BOOTSOURCE_SPINOR] = "/spi@ff1d0000",
  34         [BROM_BOOTSOURCE_SD] = "/dwmmc@fe320000",
  35 };
  36
  37 const char *board_spl_was_booted_from(void)
  38 {
  39         u32  bootdevice_brom_id = readl(RK3399_BROM_BOOTSOURCE_ID_ADDR);
  40         const char *bootdevice_ofpath = NULL;
  41
  42         if (bootdevice_brom_id < ARRAY_SIZE(boot_devices))
  43                 bootdevice_ofpath = boot_devices[bootdevice_brom_id];
  44
  45         if (bootdevice_ofpath)
  46                 debug("%s: brom_bootdevice_id %x maps to '%s'\n",
  47                       __func__, bootdevice_brom_id, bootdevice_ofpath);
  48         else
  49                 debug("%s: failed to resolve brom_bootdevice_id %x\n",
  50                       __func__, bootdevice_brom_id);
  51
  52         return bootdevice_ofpath;
  53 }
  54
  55 u32 spl_boot_device(void)
  56 {
  57         u32 boot_device = BOOT_DEVICE_MMC1;
  58
  59         if (CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM))
  60                 return BOOT_DEVICE_BOOTROM;
  61
  62         return boot_device;
  63 }
  64
  65 const char *spl_decode_boot_device(u32 boot_device)
  66 {
  67         int i;
  68         static const struct {
  69                 u32 boot_device;
  70                 const char *ofpath;
  71         } spl_boot_devices_tbl[] = {
  72                 { BOOT_DEVICE_MMC1, "/dwmmc@fe320000" },
  73                 { BOOT_DEVICE_MMC2, "/sdhci@fe330000" },
  74                 { BOOT_DEVICE_SPI, "/spi@ff1d0000" },
  75         };
  76
  77         for (i = 0; i < ARRAY_SIZE(spl_boot_devices_tbl); ++i)
  78                 if (spl_boot_devices_tbl[i].boot_device == boot_device)
  79                         return spl_boot_devices_tbl[i].ofpath;
  80
  81         return NULL;
  82 }
  83
  84 void spl_perform_fixups(struct spl_image_info *spl_image)
  85 {
  86         void *blob = spl_image->fdt_addr;
  87         const char *boot_ofpath;
  88         int chosen;
  89
  90         /*
  91          * Inject the ofpath of the device the full U-Boot (or Linux in
  92          * Falcon-mode) was booted from into the FDT, if a FDT has been
  93          * loaded at the same time.
  94          */
  95         if (!blob)
  96                 return;
  97
  98         boot_ofpath = spl_decode_boot_device(spl_image->boot_device);
  99         if (!boot_ofpath) {
 100                 pr_err("%s: could not map boot_device to ofpath\n", __func__);
 101                 return;
 102         }
 103
 104         chosen = fdt_find_or_add_subnode(blob, 0, "chosen");
 105         if (chosen < 0) {
 106                 pr_err("%s: could not find/create '/chosen'\n", __func__);
 107                 return;
 108         }
 109         fdt_setprop_string(blob, chosen,
 110                            "u-boot,spl-boot-device", boot_ofpath);
 111 }
 112
 113 #define TIMER_CHN10_BASE        0xff8680a0
 114 #define TIMER_END_COUNT_L       0x00
 115 #define TIMER_END_COUNT_H       0x04
 116 #define TIMER_INIT_COUNT_L      0x10
 117 #define TIMER_INIT_COUNT_H      0x14
 118 #define TIMER_CONTROL_REG       0x1c
 119
 120 #define TIMER_EN        0x1
 121 #define TIMER_FMODE     (0 << 1)
 122 #define TIMER_RMODE     (1 << 1)
 123
 124 void secure_timer_init(void)
 125 {
 126         writel(0xffffffff, TIMER_CHN10_BASE + TIMER_END_COUNT_L);
 127         writel(0xffffffff, TIMER_CHN10_BASE + TIMER_END_COUNT_H);
 128         writel(0, TIMER_CHN10_BASE + TIMER_INIT_COUNT_L);
 129         writel(0, TIMER_CHN10_BASE + TIMER_INIT_COUNT_H);
 130         writel(TIMER_EN | TIMER_FMODE, TIMER_CHN10_BASE + TIMER_CONTROL_REG);
 131 }
 132
 133
 134 void board_init_f(ulong dummy)
 135 {
 136         struct udevice *pinctrl;
 137         struct udevice *dev;
 138         struct rk3399_pmusgrf_regs *sgrf;
 139         struct rk3399_grf_regs *grf;
 140         int ret;
 141
 142 #ifdef CONFIG_DEBUG_UART
 143         debug_uart_init();
 144
 145 # ifdef CONFIG_TARGET_CHROMEBOOK_BOB
 146         int sum, i;
 147
 148         /*
 149          * Add a delay and ensure that the compiler does not optimise this out.
 150          * This is needed since the power rails tail a while to turn on, and
 151          * we get garbage serial output otherwise.
 152          */
 153         sum = 0;
 154         for (i = 0; i < 150000; i++)
 155                 sum += i;
 156         gru_dummy_function(sum);
 157 #endif /* CONFIG_TARGET_CHROMEBOOK_BOB */
 158
 159         /*
 160          * Debug UART can be used from here if required:
 161          *
 162          * debug_uart_init();
 163          * printch('a');
 164          * printhex8(0x1234);
 165          * printascii("string");
 166          */
 167         printascii("U-Boot SPL board init\n");
 168 #endif
 169
 170         ret = spl_early_init();
 171         if (ret) {
 172                 debug("spl_early_init() failed: %d\n", ret);
 173                 hang();
 174         }
 175
 176         /*
 177          * Disable DDR and SRAM security regions.
 178          *
 179          * As we are entered from the BootROM, the region from
 180          * 0x0 through 0xfffff (i.e. the first MB of memory) will
 181          * be protected. This will cause issues with the DW_MMC
 182          * driver, which tries to DMA from/to the stack (likely)
 183          * located in this range.
 184          */
 185         sgrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUSGRF);
 186         rk_clrsetreg(&sgrf->ddr_rgn_con[16], 0x1ff, 0);
 187         rk_clrreg(&sgrf->slv_secure_con4, 0x2000);
 188
 189         /*  eMMC clock generator: disable the clock multipilier */
 190         grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
 191         rk_clrreg(&grf->emmccore_con[11], 0x0ff);
 192
 193         secure_timer_init();
 194
 195         ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
 196         if (ret) {
 197                 pr_err("Pinctrl init failed: %d\n", ret);
 198                 return;
 199         }
 200
 201         ret = uclass_get_device(UCLASS_RAM, 0, &dev);
 202         if (ret) {
 203                 pr_err("DRAM init failed: %d\n", ret);
 204                 return;
 205         }
 206 }
 207
 208 #if defined(SPL_GPIO_SUPPORT)
 209 static void rk3399_force_power_on_reset(void)
 210 {
 211         ofnode node;
 212         struct gpio_desc sysreset_gpio;
 213
 214         debug("%s: trying to force a power-on reset\n", __func__);
 215
 216         node = ofnode_path("/config");
 217         if (!ofnode_valid(node)) {
 218                 debug("%s: no /config node?\n", __func__);
 219                 return;
 220         }
 221
 222         if (gpio_request_by_name_nodev(node, "sysreset-gpio", 0,
 223                                        &sysreset_gpio, GPIOD_IS_OUT)) {
 224                 debug("%s: could not find a /config/sysreset-gpio\n", __func__);
 225                 return;
 226         }
 227
 228         dm_gpio_set_value(&sysreset_gpio, 1);
 229 }
 230 #endif
 231
 232 void spl_board_init(void)
 233 {
 234 #if defined(SPL_GPIO_SUPPORT)
 235         struct rk3399_cru *cru = rockchip_get_cru();
 236
 237         /*
 238          * The RK3399 resets only 'almost all logic' (see also in the TRM
 239          * "3.9.4 Global software reset"), when issuing a software reset.
 240          * This may cause issues during boot-up for some configurations of
 241          * the application software stack.
 242          *
 243          * To work around this, we test whether the last reset reason was
 244          * a power-on reset and (if not) issue an overtemp-reset to reset
 245          * the entire module.
 246          *
 247          * While this was previously fixed by modifying the various places
 248          * that could generate a software reset (e.g. U-Boot's sysreset
 249          * driver, the ATF or Linux), we now have it here to ensure that
 250          * we no longer have to track this through the various components.
 251          */
 252         if (cru->glb_rst_st != 0)
 253                 rk3399_force_power_on_reset();
 254 #endif
 255
 256 #if defined(SPL_DM_REGULATOR)
 257         /*
 258          * Turning the eMMC and SPI back on (if disabled via the Qseven
 259          * BIOS_ENABLE) signal is done through a always-on regulator).
 260          */
 261         if (regulators_enable_boot_on(false))
 262                 debug("%s: Cannot enable boot on regulator\n", __func__);
 263 #endif
 264
 265         preloader_console_init();
 266 }
 267
 268 #ifdef CONFIG_SPL_LOAD_FIT
 269 int board_fit_config_name_match(const char *name)
 270 {
 271         /* Just empty function now - can't decide what to choose */
 272         debug("%s: %s\n", __func__, name);
 273
 274         return 0;
 275 }
 276 #endif