arch: add some defines for generic timer registers
authorYann Gautier <yann.gautier@st.com>
Wed, 17 Apr 2019 11:47:07 +0000 (13:47 +0200)
committerYann Gautier <yann.gautier@st.com>
Mon, 17 Jun 2019 12:03:16 +0000 (14:03 +0200)
Those defines are used in STM32MP1 clock driver.
It is better to put them altogether with already defined registers.

Change-Id: I6f8ad8c2477b947af6f76283a4ef5c40212d0027
Signed-off-by: Yann Gautier <yann.gautier@st.com>
drivers/st/clk/stm32mp1_clk.c
include/arch/aarch32/arch.h
include/arch/aarch64/arch.h

index 11fd6667de32466331c5fa7587ef76f234bd9558..eb252872705256bf6287233ddf58378881f1292b 100644 (file)
@@ -1516,9 +1516,6 @@ static void stm32mp1_set_rtcsrc(unsigned int clksrc, bool lse_css)
        }
 }
 
-#define CNTCVL_OFF     0x008
-#define CNTCVU_OFF     0x00C
-
 static void stm32mp1_stgen_config(void)
 {
        uintptr_t stgen;
index 44044d40306bfef8db5e033e286dffc740a07b27..0db414588a137fb632373c07a01e3074d6cbe9b0 100644 (file)
  * Generic timer memory mapped registers & offsets
  ******************************************************************************/
 #define CNTCR_OFF                      U(0x000)
+/* Counter Count Value Lower register */
+#define CNTCVL_OFF                     U(0x008)
+/* Counter Count Value Upper register */
+#define CNTCVU_OFF                     U(0x00C)
 #define CNTFID_OFF                     U(0x020)
 
 #define CNTCR_EN                       (U(1) << 0)
index d23d89e3cb49f81abb15a6558716b34219f70c0b..502b86813957440dc09b7848acbf8602c9169ae2 100644 (file)
@@ -99,6 +99,7 @@
  * Generic timer memory mapped registers & offsets
  ******************************************************************************/
 #define CNTCR_OFF                      U(0x000)
+#define CNTCV_OFF                      U(0x008)
 #define CNTFID_OFF                     U(0x020)
 
 #define CNTCR_EN                       (U(1) << 0)