realtek: Add support for clause45 PHYs

[openwrt/staging/zorun.git] / target / linux / realtek / files-5.4 / arch / mips / include / asm / mach-rtl838x / mach-rtl83xx.h

diff --git a/target/linux/realtek/files-5.4/arch/mips/include/asm/mach-rtl838x/mach-rtl83xx.h b/target/linux/realtek/files-5.4/arch/mips/include/asm/mach-rtl838x/mach-rtl83xx.h
index fc401e548107b4d77ba76cee58ae5e32baadf5b1..0abfc6f4d2ae5b8e46491198ca5dfe0186a951ab 100644 (file)
--- a/target/linux/realtek/files-5.4/arch/mips/include/asm/mach-rtl838x/mach-rtl83xx.h
+++ b/target/linux/realtek/files-5.4/arch/mips/include/asm/mach-rtl838x/mach-rtl83xx.h
@@ -313,8 +313,29 @@
 #define RTL839X_SMI_PORT_POLLING_CTRL  (0x03fc)
 #define RTL839X_PHYREG_ACCESS_CTRL     (0x03DC)
 #define RTL839X_PHYREG_CTRL            (0x03E0)
-#define RTL839X_PHYREG_PORT_CTRL(p)    (0x03E4 + ((p >> 5) << 2))
+#define RTL839X_PHYREG_PORT_CTRL       (0x03E4)
 #define RTL839X_PHYREG_DATA_CTRL       (0x03F0)
+#define RTL839X_PHYREG_MMD_CTRL                (0x3F4)
+
+#define RTL930X_SMI_GLB_CTRL           (0xCA00)
+#define RTL930X_SMI_POLL_CTRL          (0xca90)
+#define RTL930X_SMI_PORT0_15_POLLING_SEL (0xCA08)
+#define RTL930X_SMI_PORT16_27_POLLING_SEL (0xCA0C)
+#define RTL930X_SMI_PORT0_5_ADDR       (0xCB80)
+#define RTL930X_SMI_ACCESS_PHY_CTRL_0  (0xCB70)
+#define RTL930X_SMI_ACCESS_PHY_CTRL_1  (0xCB74)
+#define RTL930X_SMI_ACCESS_PHY_CTRL_2  (0xCB78)
+#define RTL930X_SMI_ACCESS_PHY_CTRL_3  (0xCB7C)
+
+#define RTL931X_SMI_GLB_CTRL1          (0x0CBC)
+#define RTL931X_SMI_GLB_CTRL0          (0x0CC0)
+#define RTL931X_SMI_PORT_POLLING_CTRL  (0x0CCC)
+#define RTL931X_SMI_INDRT_ACCESS_CTRL_0        (0x0C00)
+#define RTL931X_SMI_INDRT_ACCESS_CTRL_1        (0x0C04)
+#define RTL931X_SMI_INDRT_ACCESS_CTRL_2        (0x0C08)
+#define RTL931X_SMI_INDRT_ACCESS_CTRL_3        (0x0C10)
+#define RTL931X_SMI_INDRT_ACCESS_BC_PHYID_CTRL (0x0C14)
+#define RTL931X_SMI_INDRT_ACCESS_MMD_CTRL (0xC18)
 
 #define RTL930X_SMI_GLB_CTRL           (0xCA00)
 #define RTL930X_SMI_POLL_CTRL          (0xca90)