drivers/mtd/nand/raw/qcom_nandc.c | 82 +++++++++++++++++++++++++++++--
1 file changed, 77 insertions(+), 5 deletions(-)
-diff --git a/drivers/mtd/nand/raw/qcom_nandc.c b/drivers/mtd/nand/raw/qcom_nandc.c
-index 667e4bfe369f..69be86898d7a 100644
--- a/drivers/mtd/nand/raw/qcom_nandc.c
+++ b/drivers/mtd/nand/raw/qcom_nandc.c
-@@ -160,6 +160,11 @@
+@@ -159,6 +159,11 @@
/* NAND_CTRL bits */
#define BAM_MODE_EN BIT(0)
/*
* the NAND controller performs reads/writes with ECC in 516 byte chunks.
* the driver calls the chunks 'step' or 'codeword' interchangeably
-@@ -431,6 +436,13 @@ struct qcom_nand_controller {
+@@ -430,6 +435,13 @@ struct qcom_nand_controller {
* @cfg0, cfg1, cfg0_raw..: NANDc register configurations needed for
* ecc/non-ecc mode for the current nand flash
* device
*/
struct qcom_nand_host {
struct nand_chip chip;
-@@ -453,6 +465,9 @@ struct qcom_nand_host {
+@@ -452,6 +464,9 @@ struct qcom_nand_host {
u32 ecc_bch_cfg;
u32 clrflashstatus;
u32 clrreadstatus;
};
/*
-@@ -462,6 +477,7 @@ struct qcom_nand_host {
+@@ -460,12 +475,14 @@ struct qcom_nand_host {
* @ecc_modes - ecc mode for NAND
* @is_bam - whether NAND controller is using BAM
* @is_qpic - whether NAND CTRL is part of qpic IP
* @dev_cmd_reg_start - NAND_DEV_CMD_* registers starting offset
*/
struct qcom_nandc_props {
-@@ -469,6 +485,7 @@ struct qcom_nandc_props {
+ u32 ecc_modes;
bool is_bam;
bool is_qpic;
+ bool has_boot_pages;
u32 dev_cmd_reg_start;
};
- /* Frees the BAM transaction memory */
-@@ -1622,7 +1639,7 @@ qcom_nandc_read_cw_raw(struct mtd_info *mtd, struct nand_chip *chip,
+@@ -1604,7 +1621,7 @@ qcom_nandc_read_cw_raw(struct mtd_info *
data_size1 = mtd->writesize - host->cw_size * (ecc->steps - 1);
oob_size1 = host->bbm_size;
data_size2 = ecc->size - data_size1 -
((ecc->steps - 1) * 4);
oob_size2 = (ecc->steps * 4) + host->ecc_bytes_hw +
-@@ -1703,7 +1720,7 @@ check_for_erased_page(struct qcom_nand_host *host, u8 *data_buf,
+@@ -1685,7 +1702,7 @@ check_for_erased_page(struct qcom_nand_h
}
for_each_set_bit(cw, &uncorrectable_cws, ecc->steps) {
data_size = ecc->size - ((ecc->steps - 1) * 4);
oob_size = (ecc->steps * 4) + host->ecc_bytes_hw;
} else {
-@@ -1862,7 +1879,7 @@ static int read_page_ecc(struct qcom_nand_host *host, u8 *data_buf,
+@@ -1844,7 +1861,7 @@ static int read_page_ecc(struct qcom_nan
for (i = 0; i < ecc->steps; i++) {
int data_size, oob_size;
data_size = ecc->size - ((ecc->steps - 1) << 2);
oob_size = (ecc->steps << 2) + host->ecc_bytes_hw +
host->spare_bytes;
-@@ -1959,6 +1976,30 @@ static int copy_last_cw(struct qcom_nand_host *host, int page)
+@@ -1941,6 +1958,30 @@ static int copy_last_cw(struct qcom_nand
return ret;
}
/* implements ecc->read_page() */
static int qcom_nandc_read_page(struct nand_chip *chip, uint8_t *buf,
int oob_required, int page)
-@@ -1967,6 +2008,9 @@ static int qcom_nandc_read_page(struct nand_chip *chip, uint8_t *buf,
+@@ -1949,6 +1990,9 @@ static int qcom_nandc_read_page(struct n
struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip);
u8 *data_buf, *oob_buf = NULL;
nand_read_page_op(chip, page, 0, NULL, 0);
data_buf = buf;
oob_buf = oob_required ? chip->oob_poi : NULL;
-@@ -1986,6 +2030,9 @@ static int qcom_nandc_read_page_raw(struct nand_chip *chip, uint8_t *buf,
+@@ -1968,6 +2012,9 @@ static int qcom_nandc_read_page_raw(stru
int cw, ret;
u8 *data_buf = buf, *oob_buf = chip->oob_poi;
for (cw = 0; cw < ecc->steps; cw++) {
ret = qcom_nandc_read_cw_raw(mtd, chip, data_buf, oob_buf,
page, cw);
-@@ -2006,6 +2053,9 @@ static int qcom_nandc_read_oob(struct nand_chip *chip, int page)
+@@ -1988,6 +2035,9 @@ static int qcom_nandc_read_oob(struct na
struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip);
struct nand_ecc_ctrl *ecc = &chip->ecc;
clear_read_regs(nandc);
clear_bam_transaction(nandc);
-@@ -2026,6 +2076,9 @@ static int qcom_nandc_write_page(struct nand_chip *chip, const uint8_t *buf,
+@@ -2008,6 +2058,9 @@ static int qcom_nandc_write_page(struct
u8 *data_buf, *oob_buf;
int i, ret;
nand_prog_page_begin_op(chip, page, 0, NULL, 0);
clear_read_regs(nandc);
-@@ -2041,7 +2094,7 @@ static int qcom_nandc_write_page(struct nand_chip *chip, const uint8_t *buf,
+@@ -2023,7 +2076,7 @@ static int qcom_nandc_write_page(struct
for (i = 0; i < ecc->steps; i++) {
int data_size, oob_size;
data_size = ecc->size - ((ecc->steps - 1) << 2);
oob_size = (ecc->steps << 2) + host->ecc_bytes_hw +
host->spare_bytes;
-@@ -2098,6 +2151,9 @@ static int qcom_nandc_write_page_raw(struct nand_chip *chip,
+@@ -2080,6 +2133,9 @@ static int qcom_nandc_write_page_raw(str
u8 *data_buf, *oob_buf;
int i, ret;
nand_prog_page_begin_op(chip, page, 0, NULL, 0);
clear_read_regs(nandc);
clear_bam_transaction(nandc);
-@@ -2116,7 +2172,7 @@ static int qcom_nandc_write_page_raw(struct nand_chip *chip,
+@@ -2098,7 +2154,7 @@ static int qcom_nandc_write_page_raw(str
data_size1 = mtd->writesize - host->cw_size * (ecc->steps - 1);
oob_size1 = host->bbm_size;
data_size2 = ecc->size - data_size1 -
((ecc->steps - 1) << 2);
oob_size2 = (ecc->steps << 2) + host->ecc_bytes_hw +
-@@ -2176,6 +2232,9 @@ static int qcom_nandc_write_oob(struct nand_chip *chip, int page)
+@@ -2158,6 +2214,9 @@ static int qcom_nandc_write_oob(struct n
int data_size, oob_size;
int ret;
host->use_ecc = true;
clear_bam_transaction(nandc);
-@@ -2828,6 +2887,7 @@ static int qcom_nand_host_init_and_register(struct qcom_nand_controller *nandc,
+@@ -2806,6 +2865,7 @@ static int qcom_nand_host_init_and_regis
struct nand_chip *chip = &host->chip;
struct mtd_info *mtd = nand_to_mtd(chip);
struct device *dev = nandc->dev;
int ret;
ret = of_property_read_u32(dn, "reg", &host->cs);
-@@ -2888,6 +2948,17 @@ static int qcom_nand_host_init_and_register(struct qcom_nand_controller *nandc,
+@@ -2866,6 +2926,17 @@ static int qcom_nand_host_init_and_regis
if (ret)
nand_cleanup(chip);
return ret;
}
-@@ -3057,6 +3128,7 @@ static int qcom_nandc_remove(struct platform_device *pdev)
+@@ -3035,6 +3106,7 @@ static int qcom_nandc_remove(struct plat
static const struct qcom_nandc_props ipq806x_nandc_props = {
.ecc_modes = (ECC_RS_4BIT | ECC_BCH_8BIT),
.is_bam = false,
.dev_cmd_reg_start = 0x0,
};
---
-2.29.2
-