target/linux/mediatek/dts/mt7986a-glinet-gl-mt6000.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 /dts-v1/;
   4 #include <dt-bindings/gpio/gpio.h>
   5 #include <dt-bindings/input/input.h>
   6 #include <dt-bindings/pinctrl/mt65xx.h>
   7
   8 #include "mt7986a.dtsi"
   9
  10 / {
  11         model = "GL.iNet GL-MT6000";
  12         compatible = "glinet,gl-mt6000", "mediatek,mt7986a";
  13
  14         aliases {
  15                 serial0 = &uart0;
  16                 label-mac-device = &gmac1;
  17                 led-boot = &led_blue;
  18                 led-failsafe = &led_blue;
  19                 led-running = &led_white;
  20                 led-upgrade = &led_white;
  21         };
  22
  23         chosen {
  24                 stdout-path = "serial0:115200n8";
  25                 bootargs-append = " root=PARTLABEL=rootfs rootwait";
  26         };
  27
  28         reg_1p8v: regulator-1p8v {
  29                 compatible = "regulator-fixed";
  30                 regulator-name = "1.8vd";
  31                 regulator-min-microvolt = <1800000>;
  32                 regulator-max-microvolt = <1800000>;
  33                 regulator-boot-on;
  34                 regulator-always-on;
  35         };
  36
  37         reg_3p3v: regulator-3p3v {
  38                 compatible = "regulator-fixed";
  39                 regulator-name = "fixed-3.3V";
  40                 regulator-min-microvolt = <3300000>;
  41                 regulator-max-microvolt = <3300000>;
  42                 regulator-boot-on;
  43                 regulator-always-on;
  44         };
  45
  46         keys {
  47                 compatible = "gpio-keys";
  48
  49                 reset {
  50                         label = "reset";
  51                         linux,code = <KEY_RESTART>;
  52                         gpios = <&pio 9 GPIO_ACTIVE_LOW>;
  53                 };
  54         };
  55
  56         leds {
  57                 compatible = "gpio-leds";
  58
  59                 led_blue: led@0 {
  60                         label = "blue:run";
  61                         gpios = <&pio 38 GPIO_ACTIVE_LOW>;
  62                 };
  63
  64                 led_white: led@1 {
  65                         label = "white:system";
  66                         gpios = <&pio 37 GPIO_ACTIVE_LOW>;
  67                 };
  68         };
  69
  70         usb_vbus: regulator-usb-vbus {
  71                 compatible = "regulator-fixed";
  72                 regulator-name = "usb_vbus";
  73                 regulator-min-microvolt = <5000000>;
  74                 regulator-max-microvolt = <5000000>;
  75                 gpios = <&pio 24 GPIO_ACTIVE_HIGH>;
  76                 enable-active-high;
  77                 regulator-boot-on;
  78         };
  79 };
  80
  81 &eth {
  82         status = "okay";
  83
  84         gmac0: mac@0 {
  85                 compatible = "mediatek,eth-mac";
  86                 reg = <0>;
  87                 phy-mode = "2500base-x";
  88                 nvmem-cells = <&macaddr_factory_a 2>;
  89                 nvmem-cell-names = "mac-address";
  90
  91                 fixed-link {
  92                         speed = <2500>;
  93                         full-duplex;
  94                         pause;
  95                 };
  96         };
  97
  98         gmac1: mac@1 {
  99                 compatible = "mediatek,eth-mac";
 100                 reg = <1>;
 101                 nvmem-cells = <&macaddr_factory_a 0>;
 102                 nvmem-cell-names = "mac-address";
 103                 phy-mode = "2500base-x";
 104                 phy-handle = <&phy1>;
 105         };
 106
 107         mdio: mdio-bus {
 108                 #address-cells = <1>;
 109                 #size-cells = <0>;
 110
 111                 phy1: phy@1 {
 112                         compatible = "ethernet-phy-ieee802.3-c45";
 113                         reg = <1>;
 114                         reset-assert-us = <100000>;
 115                         reset-deassert-us = <100000>;
 116                         reset-gpios = <&pio 10 GPIO_ACTIVE_LOW>;
 117                         interrupt-parent = <&pio>;
 118                         interrupts = <46 IRQ_TYPE_LEVEL_LOW>;
 119                         realtek,aldps-enable;
 120                 };
 121
 122                 phy7: ethernet-phy@7 {
 123                         compatible = "ethernet-phy-ieee802.3-c45";
 124                         reg = <7>;
 125                         reset-assert-us = <100000>;
 126                         reset-deassert-us = <100000>;
 127                         reset-gpios = <&pio 19 GPIO_ACTIVE_LOW>;
 128                         interrupt-parent = <&pio>;
 129                         interrupts = <47 IRQ_TYPE_LEVEL_LOW>;
 130                         realtek,aldps-enable;
 131                 };
 132
 133                 switch: switch@1f {
 134                         compatible = "mediatek,mt7531";
 135                         reg = <31>;
 136                         reset-gpios = <&pio 18 GPIO_ACTIVE_HIGH>;
 137                         interrupt-controller;
 138                         #interrupt-cells = <1>;
 139                         interrupt-parent = <&pio>;
 140                         interrupts = <66 IRQ_TYPE_LEVEL_HIGH>;
 141
 142                         ports {
 143                                 #address-cells = <1>;
 144                                 #size-cells = <0>;
 145
 146                                 port@0 {
 147                                         reg = <0>;
 148                                         label = "lan2";
 149                                 };
 150
 151                                 port@1 {
 152                                         reg = <1>;
 153                                         label = "lan3";
 154                                 };
 155
 156                                 port@2 {
 157                                         reg = <2>;
 158                                         label = "lan4";
 159                                 };
 160
 161                                 port@3 {
 162                                         reg = <3>;
 163                                         label = "lan5";
 164                                 };
 165
 166                                 port@5 {
 167                                         reg = <5>;
 168                                         label = "lan1";
 169                                         phy-handle = <&phy7>;
 170                                         phy-mode = "2500base-x";
 171                                 };
 172
 173                                 port@6 {
 174                                         reg = <6>;
 175                                         ethernet = <&gmac0>;
 176                                         phy-mode = "2500base-x";
 177
 178                                         fixed-link {
 179                                                 speed = <2500>;
 180                                                 full-duplex;
 181                                                 pause;
 182                                         };
 183                                 };
 184                         };
 185                 };
 186         };
 187 };
 188
 189 &pio {
 190         wf_2g_5g_pins: wf_2g_5g-pins {
 191                 mux {
 192                         function = "wifi";
 193                         groups = "wf_2g", "wf_5g";
 194                 };
 195                 conf {
 196                         pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
 197                                "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
 198                                "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
 199                                "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
 200                                "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
 201                                "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
 202                                "WF1_TOP_CLK", "WF1_TOP_DATA";
 203                         drive-strength = <4>;
 204                 };
 205         };
 206
 207         mmc0_pins_default: mmc0-pins {
 208                 mux {
 209                         function = "emmc";
 210                         groups = "emmc_51";
 211                 };
 212                 conf-cmd-dat {
 213                         pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
 214                                "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
 215                                "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
 216                         input-enable;
 217                         drive-strength = <4>;
 218                         mediatek,pull-up-adv = <1>;     /* pull-up 10K */
 219                 };
 220                 conf-clk {
 221                         pins = "EMMC_CK";
 222                         drive-strength = <6>;
 223                         mediatek,pull-down-adv = <2>;   /* pull-down 50K */
 224                 };
 225                 conf-ds {
 226                         pins = "EMMC_DSL";
 227                         mediatek,pull-down-adv = <2>;   /* pull-down 50K */
 228                 };
 229                 conf-rst {
 230                         pins = "EMMC_RSTB";
 231                         drive-strength = <4>;
 232                         mediatek,pull-up-adv = <1>;     /* pull-up 10K */
 233                 };
 234         };
 235
 236         mmc0_pins_uhs: mmc0-uhs-pins {
 237                 mux {
 238                         function = "emmc";
 239                         groups = "emmc_51";
 240                 };
 241                 conf-cmd-dat {
 242                         pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
 243                                "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
 244                                "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
 245                         input-enable;
 246                         drive-strength = <4>;
 247                         mediatek,pull-up-adv = <1>;     /* pull-up 10K */
 248                 };
 249                 conf-clk {
 250                         pins = "EMMC_CK";
 251                         drive-strength = <6>;
 252                         mediatek,pull-down-adv = <2>;   /* pull-down 50K */
 253                 };
 254                 conf-ds {
 255                         pins = "EMMC_DSL";
 256                         mediatek,pull-down-adv = <2>;   /* pull-down 50K */
 257                 };
 258                 conf-rst {
 259                         pins = "EMMC_RSTB";
 260                         drive-strength = <4>;
 261                         mediatek,pull-up-adv = <1>;     /* pull-up 10K */
 262                 };
 263         };
 264 };
 265
 266 &crypto {
 267         status = "okay";
 268 };
 269
 270 &ssusb {
 271         vusb33-supply = <&reg_3p3v>;
 272         vbus-supply = <&usb_vbus>;
 273         status = "okay";
 274 };
 275
 276 &trng {
 277         status = "okay";
 278 };
 279
 280 &uart0 {
 281         status = "okay";
 282 };
 283
 284 &usb_phy {
 285         status = "okay";
 286 };
 287
 288 &watchdog {
 289         status = "okay";
 290 };
 291
 292 &wifi {
 293         nvmem-cells = <&eeprom_factory_0>;
 294         nvmem-cell-names = "eeprom";
 295         pinctrl-names = "default";
 296         pinctrl-0 = <&wf_2g_5g_pins>;
 297         status = "okay";
 298 };
 299
 300 &mmc0 {
 301         pinctrl-names = "default", "state_uhs";
 302         pinctrl-0 = <&mmc0_pins_default>;
 303         pinctrl-1 = <&mmc0_pins_uhs>;
 304         bus-width = <8>;
 305         max-frequency = <200000000>;
 306         cap-mmc-highspeed;
 307         mmc-hs200-1_8v;
 308         mmc-hs400-1_8v;
 309         hs400-ds-delay = <0x14014>;
 310         vmmc-supply = <&reg_3p3v>;
 311         vqmmc-supply = <&reg_1p8v>;
 312         non-removable;
 313         no-sd;
 314         no-sdio;
 315         status = "okay";
 316
 317         card@0 {
 318                 compatible = "mmc-card";
 319                 reg = <0>;
 320
 321                 block {
 322                         compatible = "block-device";
 323                         partitions {
 324                                 block-partition-env {
 325                                         partname = "u-boot-env";
 326
 327                                         nvmem-layout {
 328                                                 compatible = "u-boot,env-layout";
 329                                         };
 330                                 };
 331
 332                                 block-partition-factory {
 333                                         partname = "factory";
 334
 335                                         nvmem-layout {
 336                                                 compatible = "fixed-layout";
 337                                                 #address-cells = <1>;
 338                                                 #size-cells = <1>;
 339
 340                                                 eeprom_factory_0: eeprom@0 {
 341                                                         reg = <0x0 0x1000>;
 342                                                 };
 343
 344                                                 macaddr_factory_a: macaddr@a {
 345                                                         compatible = "mac-base";
 346                                                         reg = <0xa 0x6>;
 347                                                         #nvmem-cell-cells = <1>;
 348                                                 };
 349                                         };
 350                                 };
 351                         };
 352                 };
 353         };
 354 };