target/linux/mediatek/dts/mt7981b-zyxel-nwa50ax-pro.dts

   1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
   2 /dts-v1/;
   3
   4 #include "mt7981.dtsi"
   5
   6 / {
   7         model = "ZyXEL NWA50AX Pro";
   8         compatible = "zyxel,nwa50ax-pro", "mediatek,mt7981";
   9
  10         aliases {
  11                 led-boot = &led_green;
  12                 led-failsafe = &led_red;
  13                 led-running = &led_green;
  14                 led-upgrade = &led_red;
  15                 serial0 = &uart0;
  16                 label-mac-device = &gmac1;
  17         };
  18
  19         chosen {
  20                 stdout-path = "serial0:115200n8";
  21         };
  22
  23         gpio-keys {
  24                 compatible = "gpio-keys";
  25
  26                 reset {
  27                         label = "reset";
  28                         linux,code = <KEY_RESTART>;
  29                         gpios = <&pio 1 GPIO_ACTIVE_LOW>;
  30                 };
  31         };
  32
  33         leds {
  34                 compatible = "gpio-leds";
  35
  36                 led_green: led@0 {
  37                         label = "green:system";
  38                         gpios = <&pio 4 GPIO_ACTIVE_HIGH>;
  39                 };
  40
  41                 led@1 {
  42                         label = "blue:system";
  43                         gpios = <&pio 6 GPIO_ACTIVE_HIGH>;
  44                 };
  45
  46                 led_red: led@2 {
  47                         label = "red:system";
  48                         gpios = <&pio 7 GPIO_ACTIVE_HIGH>;
  49                 };
  50         };
  51 };
  52
  53 &uart0 {
  54         status = "okay";
  55 };
  56
  57 &watchdog {
  58         status = "okay";
  59 };
  60
  61 &eth {
  62         pinctrl-names = "default";
  63         pinctrl-0 = <&mdio_pins>;
  64
  65         status = "okay";
  66
  67         gmac1: mac@1 {
  68                 compatible = "mediatek,eth-mac";
  69                 reg = <1>;
  70                 phy-mode = "2500base-x";
  71
  72                 phy-handle = <&phy0>;
  73
  74                 nvmem-cells = <&macaddr_mrd_1fff8>;
  75                 nvmem-cell-names = "mac-address";
  76         };
  77 };
  78
  79 &mdio_bus {
  80         reset-gpios = <&pio 12 GPIO_ACTIVE_LOW>;
  81         reset-delay-us = <1500000>;
  82         reset-post-delay-us = <1000000>;
  83
  84         phy0: ethernet-phy@5 {
  85                 reg = <5>;
  86                 compatible = "ethernet-phy-ieee802.3-c45";
  87         };
  88 };
  89
  90 &spi0 {
  91         pinctrl-names = "default";
  92         pinctrl-0 = <&spi0_flash_pins>;
  93         status = "okay";
  94
  95         spi_nand: flash@0 {
  96                 #address-cells = <1>;
  97                 #size-cells = <1>;
  98                 compatible = "spi-nand";
  99                 reg = <0>;
 100                 spi-max-frequency = <52000000>;
 101
 102                 spi-cal-enable;
 103                 spi-cal-mode = "read-data";
 104                 spi-cal-datalen = <7>;
 105                 spi-cal-data = /bits/ 8 <0x53 0x50 0x49 0x4E 0x41 0x4E 0x44>;
 106                 spi-cal-addrlen = <5>;
 107                 spi-cal-addr = /bits/ 32 <0x0 0x0 0x0 0x0 0x0>;
 108
 109                 spi-tx-buswidth = <4>;
 110                 spi-rx-buswidth = <4>;
 111                 mediatek,nmbm;
 112                 mediatek,bmt-max-ratio = <1>;
 113                 mediatek,bmt-max-reserved-blocks = <64>;
 114
 115                 mediatek,bmt-remap-range =
 116                         <0x0 0x580000>,
 117                         <0xef00000 0xef80000>;
 118
 119                 partitions {
 120                         compatible = "fixed-partitions";
 121                         #address-cells = <1>;
 122                         #size-cells = <1>;
 123
 124                         partition@0 {
 125                                 label = "BL2";
 126                                 reg = <0x00000 0x0100000>;
 127                                 read-only;
 128                         };
 129
 130                         partition@100000 {
 131                                 label = "u-boot-env";
 132                                 reg = <0x0100000 0x0080000>;
 133                         };
 134
 135                         factory: partition@180000 {
 136                                 label = "Factory";
 137                                 reg = <0x180000 0x0200000>;
 138                                 read-only;
 139
 140                                 compatible = "nvmem-cells";
 141                                 #address-cells = <1>;
 142                                 #size-cells = <1>;
 143
 144                                 macaddr: macaddr@a {
 145                                         reg = <0xa 0x6>;
 146                                 };
 147                         };
 148
 149                         partition@380000 {
 150                                 label = "FIP";
 151                                 reg = <0x380000 0x0200000>;
 152                                 read-only;
 153                         };
 154
 155                         partition@580000 {
 156                                 label = "ubi";
 157                                 reg = <0x580000 0x3200000>;
 158                         };
 159
 160                         partition@3780000 {
 161                                 label = "ubi_1";
 162                                 reg = <0x3780000 0x3200000>;
 163                                 read-only;
 164                         };
 165
 166                         partition@6980000 {
 167                                 label = "rootfs-data";
 168                                 reg = <0x6980000 0x3c00000>;
 169                                 read-only;
 170                         };
 171
 172                         partition@a580000 {
 173                                 label = "logs";
 174                                 reg = <0xa580000 0x3a80000>;
 175                                 read-only;
 176                         };
 177
 178                         partition@e000000 {
 179                                 label = "myzyxel";
 180                                 reg = <0xe000000 0xf00000>;
 181                                 read-only;
 182                         };
 183
 184                         partition@ef00000 {
 185                                 label = "bootconfig";
 186                                 reg = <0xef00000 0x80000>;
 187                         };
 188
 189                         partition@ef80000 {
 190                                 label = "mrd";
 191                                 reg = <0xef80000 0x80000>;
 192                                 read-only;
 193
 194                                 compatible = "nvmem-cells";
 195                                 #address-cells = <1>;
 196                                 #size-cells = <1>;
 197
 198                                 macaddr_mrd_1fff8: macaddr@1fff8 {
 199                                         reg = <0x1fff8 0x6>;
 200                                 };
 201                         };
 202                 };
 203         };
 204 };
 205
 206 &pio {
 207         spi0_flash_pins: spi0-pins {
 208                 mux {
 209                         function = "spi";
 210                         groups = "spi0", "spi0_wp_hold";
 211                 };
 212         };
 213
 214         pwm_pins: pwm0-pins {
 215                 mux {
 216                         function = "pwm";
 217                         groups = "pwm0_1";
 218                 };
 219         };
 220 };
 221
 222 &wifi {
 223         status = "okay";
 224
 225         mediatek,mtd-eeprom = <&factory 0x0>;
 226 };