target/linux/generic/backport-6.1/790-52-v6.10-net-dsa-mt7530-mdio-read-PHY-address-of-switch-from-.patch

   1 From 5053a6cf1d50d785078562470d2a63695a9f3bf2 Mon Sep 17 00:00:00 2001
   2 From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <arinc.unal@arinc9.com>
   3 Date: Thu, 18 Apr 2024 08:35:30 +0300
   4 Subject: [PATCH 4/5] net: dsa: mt7530-mdio: read PHY address of switch from
   5  device tree
   6 MIME-Version: 1.0
   7 Content-Type: text/plain; charset=UTF-8
   8 Content-Transfer-Encoding: 8bit
   9
  10 Read the PHY address the switch listens on from the reg property of the
  11 switch node on the device tree. This change brings support for MT7530
  12 switches on boards with such bootstrapping configuration where the switch
  13 listens on a different PHY address than the hardcoded PHY address on the
  14 driver, 31.
  15
  16 As described on the "MT7621 Programming Guide v0.4" document, the MT7530
  17 switch and its PHYs can be configured to listen on the range of 7-12,
  18 15-20, 23-28, and 31 and 0-4 PHY addresses.
  19
  20 There are operations where the switch PHY registers are used. For the PHY
  21 address of the control PHY, transform the MT753X_CTRL_PHY_ADDR constant
  22 into a macro and use it. The PHY address for the control PHY is 0 when the
  23 switch listens on 31. In any other case, it is one greater than the PHY
  24 address the switch listens on.
  25
  26 Reviewed-by: Daniel Golle <daniel@makrotopia.org>
  27 Tested-by: Daniel Golle <daniel@makrotopia.org>
  28 Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
  29 Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
  30 Signed-off-by: Paolo Abeni <pabeni@redhat.com>
  31 ---
  32  drivers/net/dsa/mt7530-mdio.c | 28 +++++++++++++-------------
  33  drivers/net/dsa/mt7530.c      | 37 +++++++++++++++++++++++------------
  34  drivers/net/dsa/mt7530.h      |  4 +++-
  35  3 files changed, 41 insertions(+), 28 deletions(-)
  36
  37 --- a/drivers/net/dsa/mt7530-mdio.c
  38 +++ b/drivers/net/dsa/mt7530-mdio.c
  39 @@ -18,7 +18,8 @@
  40  static int
  41  mt7530_regmap_write(void *context, unsigned int reg, unsigned int val)
  42  {
  43 -       struct mii_bus *bus = context;
  44 +       struct mt7530_priv *priv = context;
  45 +       struct mii_bus *bus = priv->bus;
  46         u16 page, r, lo, hi;
  47         int ret;
  48
  49 @@ -27,36 +28,35 @@ mt7530_regmap_write(void *context, unsig
  50         lo = val & 0xffff;
  51         hi = val >> 16;
  52
  53 -       /* MT7530 uses 31 as the pseudo port */
  54 -       ret = bus->write(bus, 0x1f, 0x1f, page);
  55 +       ret = bus->write(bus, priv->mdiodev->addr, 0x1f, page);
  56         if (ret < 0)
  57                 return ret;
  58
  59 -       ret = bus->write(bus, 0x1f, r,  lo);
  60 +       ret = bus->write(bus, priv->mdiodev->addr, r, lo);
  61         if (ret < 0)
  62                 return ret;
  63
  64 -       ret = bus->write(bus, 0x1f, 0x10, hi);
  65 +       ret = bus->write(bus, priv->mdiodev->addr, 0x10, hi);
  66         return ret;
  67  }
  68
  69  static int
  70  mt7530_regmap_read(void *context, unsigned int reg, unsigned int *val)
  71  {
  72 -       struct mii_bus *bus = context;
  73 +       struct mt7530_priv *priv = context;
  74 +       struct mii_bus *bus = priv->bus;
  75         u16 page, r, lo, hi;
  76         int ret;
  77
  78         page = (reg >> 6) & 0x3ff;
  79         r = (reg >> 2) & 0xf;
  80
  81 -       /* MT7530 uses 31 as the pseudo port */
  82 -       ret = bus->write(bus, 0x1f, 0x1f, page);
  83 +       ret = bus->write(bus, priv->mdiodev->addr, 0x1f, page);
  84         if (ret < 0)
  85                 return ret;
  86
  87 -       lo = bus->read(bus, 0x1f, r);
  88 -       hi = bus->read(bus, 0x1f, 0x10);
  89 +       lo = bus->read(bus, priv->mdiodev->addr, r);
  90 +       hi = bus->read(bus, priv->mdiodev->addr, 0x10);
  91
  92         *val = (hi << 16) | (lo & 0xffff);
  93
  94 @@ -107,8 +107,7 @@ mt7531_create_sgmii(struct mt7530_priv *
  95                 mt7531_pcs_config[i]->unlock = mt7530_mdio_regmap_unlock;
  96                 mt7531_pcs_config[i]->lock_arg = &priv->bus->mdio_lock;
  97
  98 -               regmap = devm_regmap_init(priv->dev,
  99 -                                         &mt7530_regmap_bus, priv->bus,
 100 +               regmap = devm_regmap_init(priv->dev, &mt7530_regmap_bus, priv,
 101                                           mt7531_pcs_config[i]);
 102                 if (IS_ERR(regmap)) {
 103                         ret = PTR_ERR(regmap);
 104 @@ -153,6 +152,7 @@ mt7530_probe(struct mdio_device *mdiodev
 105
 106         priv->bus = mdiodev->bus;
 107         priv->dev = &mdiodev->dev;
 108 +       priv->mdiodev = mdiodev;
 109
 110         ret = mt7530_probe_common(priv);
 111         if (ret)
 112 @@ -203,8 +203,8 @@ mt7530_probe(struct mdio_device *mdiodev
 113         regmap_config->reg_stride = 4;
 114         regmap_config->max_register = MT7530_CREV;
 115         regmap_config->disable_locking = true;
 116 -       priv->regmap = devm_regmap_init(priv->dev, &mt7530_regmap_bus,
 117 -                                       priv->bus, regmap_config);
 118 +       priv->regmap = devm_regmap_init(priv->dev, &mt7530_regmap_bus, priv,
 119 +                                       regmap_config);
 120         if (IS_ERR(priv->regmap))
 121                 return PTR_ERR(priv->regmap);
 122
 123 --- a/drivers/net/dsa/mt7530.c
 124 +++ b/drivers/net/dsa/mt7530.c
 125 @@ -86,22 +86,26 @@ core_read_mmd_indirect(struct mt7530_pri
 126         int value, ret;
 127
 128         /* Write the desired MMD Devad */
 129 -       ret = bus->write(bus, 0, MII_MMD_CTRL, devad);
 130 +       ret = bus->write(bus, MT753X_CTRL_PHY_ADDR(priv->mdiodev->addr),
 131 +                        MII_MMD_CTRL, devad);
 132         if (ret < 0)
 133                 goto err;
 134
 135         /* Write the desired MMD register address */
 136 -       ret = bus->write(bus, 0, MII_MMD_DATA, prtad);
 137 +       ret = bus->write(bus, MT753X_CTRL_PHY_ADDR(priv->mdiodev->addr),
 138 +                        MII_MMD_DATA, prtad);
 139         if (ret < 0)
 140                 goto err;
 141
 142         /* Select the Function : DATA with no post increment */
 143 -       ret = bus->write(bus, 0, MII_MMD_CTRL, (devad | MII_MMD_CTRL_NOINCR));
 144 +       ret = bus->write(bus, MT753X_CTRL_PHY_ADDR(priv->mdiodev->addr),
 145 +                        MII_MMD_CTRL, devad | MII_MMD_CTRL_NOINCR);
 146         if (ret < 0)
 147                 goto err;
 148
 149         /* Read the content of the MMD's selected register */
 150 -       value = bus->read(bus, 0, MII_MMD_DATA);
 151 +       value = bus->read(bus, MT753X_CTRL_PHY_ADDR(priv->mdiodev->addr),
 152 +                         MII_MMD_DATA);
 153
 154         return value;
 155  err:
 156 @@ -118,22 +122,26 @@ core_write_mmd_indirect(struct mt7530_pr
 157         int ret;
 158
 159         /* Write the desired MMD Devad */
 160 -       ret = bus->write(bus, 0, MII_MMD_CTRL, devad);
 161 +       ret = bus->write(bus, MT753X_CTRL_PHY_ADDR(priv->mdiodev->addr),
 162 +                        MII_MMD_CTRL, devad);
 163         if (ret < 0)
 164                 goto err;
 165
 166         /* Write the desired MMD register address */
 167 -       ret = bus->write(bus, 0, MII_MMD_DATA, prtad);
 168 +       ret = bus->write(bus, MT753X_CTRL_PHY_ADDR(priv->mdiodev->addr),
 169 +                        MII_MMD_DATA, prtad);
 170         if (ret < 0)
 171                 goto err;
 172
 173         /* Select the Function : DATA with no post increment */
 174 -       ret = bus->write(bus, 0, MII_MMD_CTRL, (devad | MII_MMD_CTRL_NOINCR));
 175 +       ret = bus->write(bus, MT753X_CTRL_PHY_ADDR(priv->mdiodev->addr),
 176 +                        MII_MMD_CTRL, devad | MII_MMD_CTRL_NOINCR);
 177         if (ret < 0)
 178                 goto err;
 179
 180         /* Write the data into MMD's selected register */
 181 -       ret = bus->write(bus, 0, MII_MMD_DATA, data);
 182 +       ret = bus->write(bus, MT753X_CTRL_PHY_ADDR(priv->mdiodev->addr),
 183 +                        MII_MMD_DATA, data);
 184  err:
 185         if (ret < 0)
 186                 dev_err(&bus->dev,
 187 @@ -2670,16 +2678,19 @@ mt7531_setup(struct dsa_switch *ds)
 188          * phy_[read,write]_mmd_indirect is called, we provide our own
 189          * mt7531_ind_mmd_phy_[read,write] to complete this function.
 190          */
 191 -       val = mt7531_ind_c45_phy_read(priv, MT753X_CTRL_PHY_ADDR,
 192 +       val = mt7531_ind_c45_phy_read(priv,
 193 +                                     MT753X_CTRL_PHY_ADDR(priv->mdiodev->addr),
 194                                       MDIO_MMD_VEND2, CORE_PLL_GROUP4);
 195         val |= MT7531_RG_SYSPLL_DMY2 | MT7531_PHY_PLL_BYPASS_MODE;
 196         val &= ~MT7531_PHY_PLL_OFF;
 197 -       mt7531_ind_c45_phy_write(priv, MT753X_CTRL_PHY_ADDR, MDIO_MMD_VEND2,
 198 -                                CORE_PLL_GROUP4, val);
 199 +       mt7531_ind_c45_phy_write(priv,
 200 +                                MT753X_CTRL_PHY_ADDR(priv->mdiodev->addr),
 201 +                                MDIO_MMD_VEND2, CORE_PLL_GROUP4, val);
 202
 203         /* Disable EEE advertisement on the switch PHYs. */
 204 -       for (i = MT753X_CTRL_PHY_ADDR;
 205 -            i < MT753X_CTRL_PHY_ADDR + MT7530_NUM_PHYS; i++) {
 206 +       for (i = MT753X_CTRL_PHY_ADDR(priv->mdiodev->addr);
 207 +            i < MT753X_CTRL_PHY_ADDR(priv->mdiodev->addr) + MT7530_NUM_PHYS;
 208 +            i++) {
 209                 mt7531_ind_c45_phy_write(priv, i, MDIO_MMD_AN, MDIO_AN_EEE_ADV,
 210                                          0);
 211         }
 212 --- a/drivers/net/dsa/mt7530.h
 213 +++ b/drivers/net/dsa/mt7530.h
 214 @@ -629,7 +629,7 @@ enum mt7531_clk_skew {
 215  #define  MT7531_PHY_PLL_OFF            BIT(5)
 216  #define  MT7531_PHY_PLL_BYPASS_MODE    BIT(4)
 217
 218 -#define MT753X_CTRL_PHY_ADDR           0
 219 +#define MT753X_CTRL_PHY_ADDR(addr)     ((addr + 1) & 0x1f)
 220
 221  #define CORE_PLL_GROUP5                        0x404
 222  #define  RG_LCDDS_PCW_NCPO1(x)         ((x) & 0xffff)
 223 @@ -771,6 +771,7 @@ struct mt753x_info {
 224   * @irq_enable:                IRQ enable bits, synced to SYS_INT_EN
 225   * @create_sgmii:      Pointer to function creating SGMII PCS instance(s)
 226   * @active_cpu_ports:  Holding the active CPU ports
 227 + * @mdiodev:           The pointer to the MDIO device structure
 228   */
 229  struct mt7530_priv {
 230         struct device           *dev;
 231 @@ -797,6 +798,7 @@ struct mt7530_priv {
 232         u32 irq_enable;
 233         int (*create_sgmii)(struct mt7530_priv *priv);
 234         u8 active_cpu_ports;
 235 +       struct mdio_device *mdiodev;
 236  };
 237
 238  struct mt7530_hw_vlan_entry {