d1: add new target
[openwrt/staging/mans0n.git] / target / linux / d1 / patches-6.1 / 0114-drm-panel-cwd686-Use-the-init-sequence-from-the-R-01.patch
1 From 02da00f2215f3d755ec806636fe499331870e8d6 Mon Sep 17 00:00:00 2001
2 From: Samuel Holland <samuel@sholland.org>
3 Date: Tue, 9 Aug 2022 20:14:59 -0500
4 Subject: [PATCH 114/117] drm: panel: cwd686: Use the init sequence from the
5 R-01 BSP
6
7 Signed-off-by: Samuel Holland <samuel@sholland.org>
8 ---
9 .../gpu/drm/panel/panel-clockwork-cwd686.c | 44 ++++++++-----------
10 1 file changed, 19 insertions(+), 25 deletions(-)
11
12 --- a/drivers/gpu/drm/panel/panel-clockwork-cwd686.c
13 +++ b/drivers/gpu/drm/panel/panel-clockwork-cwd686.c
14 @@ -131,34 +131,28 @@ static int cwd686_init_sequence(struct c
15 {
16 struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
17
18 - dcs_write_seq(0xF0,0x5A,0x5A);
19 - dcs_write_seq(0xF1,0xA5,0xA5);
20 - dcs_write_seq(0xB6,0x0D,0x0D);
21 - dcs_write_seq(0xB4,0x0A,0x08,0x12,0x10,0x0E,0x0C,0x00,0x00,0x00,0x03,0x00,0x03,0x03,0x03,0x03,0x03,0x03,0x03,0x04,0x06);
22 - dcs_write_seq(0xB3,0x0B,0x09,0x13,0x11,0x0F,0x0D,0x00,0x00,0x00,0x03,0x00,0x03,0x03,0x03,0x03,0x03,0x03,0x03,0x05,0x07);
23 - dcs_write_seq(0xB0,0x54,0x32,0x23,0x45,0x44,0x44,0x44,0x44,0x90,0x01,0x90,0x01);
24 - dcs_write_seq(0xB1,0x32,0x84,0x02,0x83,0x30,0x01,0x6B,0x01);
25 + dcs_write_seq(0xF0,0x5A,0x59);
26 + dcs_write_seq(0xF1,0xA5,0xA6);
27 + dcs_write_seq(0xB0,0x54,0x32,0x23,0x45,0x44,0x44,0x44,0x44,0x9F,0x00,0x01,0x9F,0x00,0x01);
28 + dcs_write_seq(0xB1,0x32,0x84,0x02,0x83,0x29,0x06,0x06,0x72,0x06,0x06);
29 dcs_write_seq(0xB2,0x73);
30 - dcs_write_seq(0xBD,0x4E,0x0E,0x50,0x50,0x26,0x1D,0x00,0x14,0x42,0x03);
31 - dcs_write_seq(0xB7,0x01,0x01,0x09,0x11,0x0D,0x55,0x19,0x19,0x21,0x1D,0x00,0x00,0x00,0x00,0x02,0xFF,0x3C);
32 - dcs_write_seq(0xB8,0x23,0x01,0x30,0x34,0x63);
33 - dcs_write_seq(0xB9,0xA0,0x22,0x00,0x44);
34 - dcs_write_seq(0xBA,0x12,0x63);
35 - dcs_write_seq(0xC1,0x0C,0x16,0x04,0x0C,0x10,0x04);
36 - dcs_write_seq(0xC2,0x11,0x41);
37 - dcs_write_seq(0xC3,0x22,0x31,0x04);
38 - dcs_write_seq(0xC7,0x05,0x23,0x6B,0x49,0x00);
39 - dcs_write_seq(0xC5,0x00);
40 - dcs_write_seq(0xD0,0x37,0xFF,0xFF);
41 - dcs_write_seq(0xD2,0x63,0x0B,0x08,0x88);
42 - dcs_write_seq(0xD3,0x01,0x00,0x00,0x01,0x01,0x37,0x25,0x38,0x31,0x06,0x07);
43 - dcs_write_seq(0xC8,0x7C,0x6A,0x5D,0x53,0x53,0x45,0x4B,0x35,0x4D,0x4A,0x49,0x66,0x53,0x57,0x4A,0x48,0x3B,0x2A,0x06,0x7C,0x6A,0x5D,0x53,0x53,0x45,0x4B,0x35,0x4D,0x4A,0x49,0x66,0x53,0x57,0x4A,0x48,0x3B,0x2A,0x06);//GAMMA2.2
44 - dcs_write_seq(0xC6,0x00,0x00,0xFF,0x00,0x00,0xFF,0x00,0x00);
45 - dcs_write_seq(0xF4,0x08,0x77);
46 + dcs_write_seq(0xB3,0x0B,0x09,0x13,0x11,0x0F,0x0D,0x00,0x00,0x00,0x03,0x00,0x03,0x03,0x03,0x03,0x03,0x03,0x03,0x05,0x07);
47 + dcs_write_seq(0xB4,0x0A,0x08,0x12,0x10,0x0E,0x0C,0x00,0x00,0x00,0x03,0x00,0x03,0x03,0x03,0x03,0x03,0x03,0x03,0x04,0x06);
48 + dcs_write_seq(0xB6,0x13,0x13);
49 + dcs_write_seq(0xB8,0xB4,0x43,0x02,0xCC);
50 + dcs_write_seq(0xB9,0xA5,0x20,0xFF,0xC8);
51 + dcs_write_seq(0xBA,0x88,0x23);
52 + dcs_write_seq(0xBD,0x43,0x0E,0x0E,0x50,0x50,0x29,0x10,0x03,0x44,0x03);
53 + dcs_write_seq(0xC1,0x00,0x0C,0x16,0x04,0x00,0x30,0x10,0x04);
54 + dcs_write_seq(0xC2,0x21,0x81);
55 + dcs_write_seq(0xC3,0x02,0x30);
56 + dcs_write_seq(0xC7,0x25,0x6A);
57 + dcs_write_seq(0xC8,0x7C,0x68,0x59,0x4E,0x4B,0x3C,0x41,0x2B,0x44,0x43,0x43,0x60,0x4E,0x55,0x47,0x44,0x38,0x27,0x06,0x7C,0x68,0x59,0x4E,0x4B,0x3C,0x41,0x2B,0x44,0x43,0x43,0x60,0x4E,0x55,0x47,0x44,0x38,0x27,0x06);
58 + dcs_write_seq(0xD4,0x00,0x00,0x00,0x32,0x04,0x51);
59 + dcs_write_seq(0xF1,0x5A,0x59);
60 + dcs_write_seq(0xF0,0xA5,0xA6);
61 dcs_write_seq(0x36,0x14);
62 dcs_write_seq(0x35,0x00);
63 - dcs_write_seq(0xF1,0x5A,0x5A);
64 - dcs_write_seq(0xF0,0xA5,0xA5);
65
66 return 0;
67 }