target/linux/d1/patches-6.1/0063-riscv-dts-allwinner-d1-Add-PWM-support.patch

   1 From 2ee8994e4db3978261e6c644e897400c4df5edeb Mon Sep 17 00:00:00 2001
   2 From: Samuel Holland <samuel@sholland.org>
   3 Date: Thu, 11 Aug 2022 22:24:52 -0500
   4 Subject: [PATCH 063/117] riscv: dts: allwinner: d1: Add PWM support
   5
   6 Signed-off-by: Samuel Holland <samuel@sholland.org>
   7 ---
   8  arch/riscv/boot/dts/allwinner/sun20i-d1.dtsi | 35 ++++++++++++++++++++
   9  1 file changed, 35 insertions(+)
  10
  11 --- a/arch/riscv/boot/dts/allwinner/sun20i-d1.dtsi
  12 +++ b/arch/riscv/boot/dts/allwinner/sun20i-d1.dtsi
  13 @@ -155,6 +155,30 @@
  14                         };
  15
  16                         /omit-if-no-ref/
  17 +                       pwm0_pd16_pin: pwm0-pd16-pin {
  18 +                               pins = "PD16";
  19 +                               function = "pwm0";
  20 +                       };
  21 +
  22 +                       /omit-if-no-ref/
  23 +                       pwm2_pd18_pin: pwm2-pd18-pin {
  24 +                               pins = "PD18";
  25 +                               function = "pwm2";
  26 +                       };
  27 +
  28 +                       /omit-if-no-ref/
  29 +                       pwm4_pd20_pin: pwm4-pd20-pin {
  30 +                               pins = "PD20";
  31 +                               function = "pwm4";
  32 +                       };
  33 +
  34 +                       /omit-if-no-ref/
  35 +                       pwm7_pd22_pin: pwm7-pd22-pin {
  36 +                               pins = "PD22";
  37 +                               function = "pwm7";
  38 +                       };
  39 +
  40 +                       /omit-if-no-ref/
  41                         uart0_pb8_pins: uart0-pb8-pins {
  42                                 pins = "PB8", "PB9";
  43                                 function = "uart0";
  44 @@ -173,6 +197,17 @@
  45                         };
  46                 };
  47
  48 +               pwm: pwm@2000c00 {
  49 +                       compatible = "allwinner,sun20i-d1-pwm";
  50 +                       reg = <0x2000c00 0x400>;
  51 +                       interrupts = <34 IRQ_TYPE_LEVEL_HIGH>;
  52 +                       clocks = <&ccu CLK_BUS_PWM>, <&osc24M>;
  53 +                       clock-names = "bus", "mod";
  54 +                       resets = <&ccu RST_BUS_PWM>;
  55 +                       status = "disabled";
  56 +                       #pwm-cells = <3>;
  57 +               };
  58 +
  59                 ccu: clock-controller@2001000 {
  60                         compatible = "allwinner,sun20i-d1-ccu";
  61                         reg = <0x2001000 0x1000>;