target/linux/bcm27xx/patches-5.15/950-0604-ARM-dts-Create-bcm2711-rpi-cm4s.dts-4761.patch

   1 From dc1156479b5bf177ecb403e11fe990af5db54394 Mon Sep 17 00:00:00 2001
   2 From: peterharperuk <77111776+peterharperuk@users.noreply.github.com>
   3 Date: Mon, 13 Dec 2021 14:00:35 +0000
   4 Subject: [PATCH] ARM: dts: Create bcm2711-rpi-cm4s.dts (#4761)
   5
   6 Signed-off-by: Peter Harper <peter.harper@raspberrypi.com>
   7 ---
   8  arch/arm/boot/dts/Makefile             |   3 +-
   9  arch/arm/boot/dts/bcm2711-rpi-cm4s.dts | 398 +++++++++++++++++++++++++
  10  2 files changed, 400 insertions(+), 1 deletion(-)
  11  create mode 100644 arch/arm/boot/dts/bcm2711-rpi-cm4s.dts
  12
  13 --- a/arch/arm/boot/dts/Makefile
  14 +++ b/arch/arm/boot/dts/Makefile
  15 @@ -16,7 +16,8 @@ dtb-$(CONFIG_ARCH_BCM2835) += \
  16         bcm2711-rpi-4-b.dtb \
  17         bcm2711-rpi-400.dtb \
  18         bcm2710-rpi-cm3.dtb \
  19 -       bcm2711-rpi-cm4.dtb
  20 +       bcm2711-rpi-cm4.dtb \
  21 +       bcm2711-rpi-cm4s.dtb
  22
  23  dtb-$(CONFIG_ARCH_ALPINE) += \
  24         alpine-db.dtb
  25 --- /dev/null
  26 +++ b/arch/arm/boot/dts/bcm2711-rpi-cm4s.dts
  27 @@ -0,0 +1,398 @@
  28 +// SPDX-License-Identifier: GPL-2.0
  29 +/dts-v1/;
  30 +#include "bcm2711.dtsi"
  31 +#include "bcm2711-rpi.dtsi"
  32 +
  33 +/ {
  34 +       compatible = "raspberrypi,4-compute-module-s", "brcm,bcm2711";
  35 +       model = "Raspberry Pi Compute Module 4S";
  36 +
  37 +       chosen {
  38 +               /* 8250 auxiliary UART instead of pl011 */
  39 +               stdout-path = "serial1:115200n8";
  40 +       };
  41 +
  42 +       leds {
  43 +               led-act {
  44 +                       gpios = <&virtgpio 0 0>;
  45 +               };
  46 +       };
  47 +};
  48 +
  49 +&ddc0 {
  50 +       status = "okay";
  51 +};
  52 +
  53 +&gpio {
  54 +       /*
  55 +        * Parts taken from rpi_SCH_4b_4p0_reduced.pdf and
  56 +        * the official GPU firmware DT blob.
  57 +        *
  58 +        * Legend:
  59 +        * "FOO" = GPIO line named "FOO" on the schematic
  60 +        * "FOO_N" = GPIO line named "FOO" on schematic, active low
  61 +        */
  62 +       gpio-line-names = "ID_SDA",
  63 +                         "ID_SCL",
  64 +                         "SDA1",
  65 +                         "SCL1",
  66 +                         "GPIO_GCLK",
  67 +                         "GPIO5",
  68 +                         "GPIO6",
  69 +                         "SPI_CE1_N",
  70 +                         "SPI_CE0_N",
  71 +                         "SPI_MISO",
  72 +                         "SPI_MOSI",
  73 +                         "SPI_SCLK",
  74 +                         "GPIO12",
  75 +                         "GPIO13",
  76 +                         /* Serial port */
  77 +                         "TXD1",
  78 +                         "RXD1",
  79 +                         "GPIO16",
  80 +                         "GPIO17",
  81 +                         "GPIO18",
  82 +                         "GPIO19",
  83 +                         "GPIO20",
  84 +                         "GPIO21",
  85 +                         "GPIO22",
  86 +                         "GPIO23",
  87 +                         "GPIO24",
  88 +                         "GPIO25",
  89 +                         "GPIO26",
  90 +                         "GPIO27",
  91 +                         "GPIO28",
  92 +                         "GPIO29",
  93 +                         "GPIO30",
  94 +                         "GPIO31",
  95 +                         "GPIO32",
  96 +                         "GPIO33",
  97 +                         "GPIO34",
  98 +                         "GPIO35",
  99 +                         "GPIO36",
 100 +                         "GPIO37",
 101 +                         "GPIO38",
 102 +                         "GPIO39",
 103 +                         "PWM0_MISO",
 104 +                         "PWM1_MOSI",
 105 +                         "GPIO42",
 106 +                         "GPIO43",
 107 +                         "GPIO44",
 108 +                         "GPIO45";
 109 +};
 110 +
 111 +&hdmi0 {
 112 +       status = "okay";
 113 +};
 114 +
 115 +&pixelvalve0 {
 116 +       status = "okay";
 117 +};
 118 +
 119 +&pixelvalve1 {
 120 +       status = "okay";
 121 +};
 122 +
 123 +&pixelvalve2 {
 124 +       status = "okay";
 125 +};
 126 +
 127 +&pixelvalve4 {
 128 +       status = "okay";
 129 +};
 130 +
 131 +&pwm1 {
 132 +       pinctrl-names = "default";
 133 +       pinctrl-0 = <&pwm1_0_gpio40 &pwm1_1_gpio41>;
 134 +       status = "okay";
 135 +};
 136 +
 137 +/* EMMC2 is used to drive the EMMC card */
 138 +&emmc2 {
 139 +       bus-width = <8>;
 140 +       broken-cd;
 141 +       status = "okay";
 142 +};
 143 +
 144 +&pcie0 {
 145 +       status = "disabled";
 146 +};
 147 +
 148 +&vchiq {
 149 +       interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
 150 +};
 151 +
 152 +&vc4 {
 153 +       status = "okay";
 154 +};
 155 +
 156 +&vec {
 157 +       status = "disabled";
 158 +};
 159 +
 160 +// =============================================
 161 +// Downstream rpi- changes
 162 +
 163 +#define BCM2711
 164 +
 165 +#include "bcm270x.dtsi"
 166 +#include "bcm2711-rpi-ds.dtsi"
 167 +
 168 +/ {
 169 +       soc {
 170 +               /delete-node/ pixelvalve@7e807000;
 171 +               /delete-node/ hdmi@7e902000;
 172 +
 173 +               virtgpio: virtgpio {
 174 +                       compatible = "brcm,bcm2835-virtgpio";
 175 +                       gpio-controller;
 176 +                       #gpio-cells = <2>;
 177 +                       firmware = <&firmware>;
 178 +                       status = "okay";
 179 +               };
 180 +       };
 181 +};
 182 +
 183 +#include "bcm283x-rpi-csi0-2lane.dtsi"
 184 +#include "bcm283x-rpi-csi1-4lane.dtsi"
 185 +#include "bcm283x-rpi-i2c0mux_0_44.dtsi"
 186 +#include "bcm283x-rpi-cam1-regulator.dtsi"
 187 +
 188 +/ {
 189 +       chosen {
 190 +               bootargs = "coherent_pool=1M 8250.nr_uarts=1 snd_bcm2835.enable_compat_alsa=0 snd_bcm2835.enable_hdmi=1";
 191 +       };
 192 +
 193 +       aliases {
 194 +               serial0 = &uart0;
 195 +               mmc0 = &emmc2;
 196 +               mmc1 = &mmcnr;
 197 +               mmc2 = &sdhost;
 198 +               i2c3 = &i2c3;
 199 +               i2c4 = &i2c4;
 200 +               i2c5 = &i2c5;
 201 +               i2c6 = &i2c6;
 202 +               spi3 = &spi3;
 203 +               spi4 = &spi4;
 204 +               spi5 = &spi5;
 205 +               spi6 = &spi6;
 206 +               /delete-property/ intc;
 207 +       };
 208 +
 209 +       /delete-node/ wifi-pwrseq;
 210 +};
 211 +
 212 +&uart0 {
 213 +       pinctrl-names = "default";
 214 +       pinctrl-0 = <&uart0_pins>;
 215 +       status = "okay";
 216 +};
 217 +
 218 +&spi0 {
 219 +       pinctrl-names = "default";
 220 +       pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
 221 +       cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
 222 +
 223 +       spidev0: spidev@0{
 224 +               compatible = "spidev";
 225 +               reg = <0>;      /* CE0 */
 226 +               #address-cells = <1>;
 227 +               #size-cells = <0>;
 228 +               spi-max-frequency = <125000000>;
 229 +       };
 230 +
 231 +       spidev1: spidev@1{
 232 +               compatible = "spidev";
 233 +               reg = <1>;      /* CE1 */
 234 +               #address-cells = <1>;
 235 +               #size-cells = <0>;
 236 +               spi-max-frequency = <125000000>;
 237 +       };
 238 +};
 239 +
 240 +&gpio {
 241 +       spi0_pins: spi0_pins {
 242 +               brcm,pins = <9 10 11>;
 243 +               brcm,function = <BCM2835_FSEL_ALT0>;
 244 +       };
 245 +
 246 +       spi0_cs_pins: spi0_cs_pins {
 247 +               brcm,pins = <8 7>;
 248 +               brcm,function = <BCM2835_FSEL_GPIO_OUT>;
 249 +       };
 250 +
 251 +       spi3_pins: spi3_pins {
 252 +               brcm,pins = <1 2 3>;
 253 +               brcm,function = <BCM2835_FSEL_ALT3>;
 254 +       };
 255 +
 256 +       spi3_cs_pins: spi3_cs_pins {
 257 +               brcm,pins = <0 24>;
 258 +               brcm,function = <BCM2835_FSEL_GPIO_OUT>;
 259 +       };
 260 +
 261 +       spi4_pins: spi4_pins {
 262 +               brcm,pins = <5 6 7>;
 263 +               brcm,function = <BCM2835_FSEL_ALT3>;
 264 +       };
 265 +
 266 +       spi4_cs_pins: spi4_cs_pins {
 267 +               brcm,pins = <4 25>;
 268 +               brcm,function = <BCM2835_FSEL_GPIO_OUT>;
 269 +       };
 270 +
 271 +       spi5_pins: spi5_pins {
 272 +               brcm,pins = <13 14 15>;
 273 +               brcm,function = <BCM2835_FSEL_ALT3>;
 274 +       };
 275 +
 276 +       spi5_cs_pins: spi5_cs_pins {
 277 +               brcm,pins = <12 26>;
 278 +               brcm,function = <BCM2835_FSEL_GPIO_OUT>;
 279 +       };
 280 +
 281 +       spi6_pins: spi6_pins {
 282 +               brcm,pins = <19 20 21>;
 283 +               brcm,function = <BCM2835_FSEL_ALT3>;
 284 +       };
 285 +
 286 +       spi6_cs_pins: spi6_cs_pins {
 287 +               brcm,pins = <18 27>;
 288 +               brcm,function = <BCM2835_FSEL_GPIO_OUT>;
 289 +       };
 290 +
 291 +       i2c0_pins: i2c0 {
 292 +               brcm,pins = <0 1>;
 293 +               brcm,function = <BCM2835_FSEL_ALT0>;
 294 +               brcm,pull = <BCM2835_PUD_UP>;
 295 +       };
 296 +
 297 +       i2c1_pins: i2c1 {
 298 +               brcm,pins = <2 3>;
 299 +               brcm,function = <BCM2835_FSEL_ALT0>;
 300 +               brcm,pull = <BCM2835_PUD_UP>;
 301 +       };
 302 +
 303 +       i2c3_pins: i2c3 {
 304 +               brcm,pins = <4 5>;
 305 +               brcm,function = <BCM2835_FSEL_ALT5>;
 306 +               brcm,pull = <BCM2835_PUD_UP>;
 307 +       };
 308 +
 309 +       i2c4_pins: i2c4 {
 310 +               brcm,pins = <8 9>;
 311 +               brcm,function = <BCM2835_FSEL_ALT5>;
 312 +               brcm,pull = <BCM2835_PUD_UP>;
 313 +       };
 314 +
 315 +       i2c5_pins: i2c5 {
 316 +               brcm,pins = <12 13>;
 317 +               brcm,function = <BCM2835_FSEL_ALT5>;
 318 +               brcm,pull = <BCM2835_PUD_UP>;
 319 +       };
 320 +
 321 +       i2c6_pins: i2c6 {
 322 +               brcm,pins = <22 23>;
 323 +               brcm,function = <BCM2835_FSEL_ALT5>;
 324 +               brcm,pull = <BCM2835_PUD_UP>;
 325 +       };
 326 +
 327 +       i2s_pins: i2s {
 328 +               brcm,pins = <18 19 20 21>;
 329 +               brcm,function = <BCM2835_FSEL_ALT0>;
 330 +       };
 331 +
 332 +       sdio_pins: sdio_pins {
 333 +               brcm,pins =     <34 35 36 37 38 39>;
 334 +               brcm,function = <BCM2835_FSEL_ALT3>; // alt3 = SD1
 335 +               brcm,pull =     <0 2 2 2 2 2>;
 336 +       };
 337 +
 338 +       uart0_pins: uart0_pins {
 339 +               brcm,pins;
 340 +               brcm,function;
 341 +               brcm,pull;
 342 +       };
 343 +
 344 +       uart2_pins: uart2_pins {
 345 +               brcm,pins = <0 1>;
 346 +               brcm,function = <BCM2835_FSEL_ALT4>;
 347 +               brcm,pull = <0 2>;
 348 +       };
 349 +
 350 +       uart3_pins: uart3_pins {
 351 +               brcm,pins = <4 5>;
 352 +               brcm,function = <BCM2835_FSEL_ALT4>;
 353 +               brcm,pull = <0 2>;
 354 +       };
 355 +
 356 +       uart4_pins: uart4_pins {
 357 +               brcm,pins = <8 9>;
 358 +               brcm,function = <BCM2835_FSEL_ALT4>;
 359 +               brcm,pull = <0 2>;
 360 +       };
 361 +
 362 +       uart5_pins: uart5_pins {
 363 +               brcm,pins = <12 13>;
 364 +               brcm,function = <BCM2835_FSEL_ALT4>;
 365 +               brcm,pull = <0 2>;
 366 +       };
 367 +};
 368 +
 369 +&i2c0if {
 370 +       clock-frequency = <100000>;
 371 +};
 372 +
 373 +&i2c1 {
 374 +       pinctrl-names = "default";
 375 +       pinctrl-0 = <&i2c1_pins>;
 376 +       clock-frequency = <100000>;
 377 +};
 378 +
 379 +&i2s {
 380 +       pinctrl-names = "default";
 381 +       pinctrl-0 = <&i2s_pins>;
 382 +};
 383 +
 384 +// =============================================
 385 +// Board specific stuff here
 386 +
 387 +&sdhost {
 388 +       status = "disabled";
 389 +};
 390 +
 391 +&gpio {
 392 +       audio_pins: audio_pins {
 393 +               brcm,pins = <>;
 394 +               brcm,function = <>;
 395 +       };
 396 +};
 397 +
 398 +&leds {
 399 +       act_led: led-act {
 400 +               label = "led0";
 401 +               linux,default-trigger = "mmc0";
 402 +       };
 403 +};
 404 +
 405 +&pwm1 {
 406 +       status = "disabled";
 407 +};
 408 +
 409 +&audio {
 410 +       pinctrl-names = "default";
 411 +       pinctrl-0 = <&audio_pins>;
 412 +       brcm,disable-headphones = <1>;
 413 +};
 414 +
 415 +/ {
 416 +       __overrides__ {
 417 +               act_led_gpio = <&act_led>,"gpios:4";
 418 +               act_led_activelow = <&act_led>,"gpios:8";
 419 +               act_led_trigger = <&act_led>,"linux,default-trigger";
 420 +
 421 +               sd_poll_once = <&emmc2>, "non-removable?";
 422 +               spi_dma4 = <&spi0>, "dmas:0=", <&dma40>,
 423 +                          <&spi0>, "dmas:8=", <&dma40>;
 424 +       };
 425 +};