1 From c218d35ede9474ffa6231e8be88c8ad28044ca2e Mon Sep 17 00:00:00 2001
2 From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= <noralf@tronnes.org>
3 Date: Wed, 3 Nov 2021 12:21:14 +0100
4 Subject: [PATCH] overlays: Add fbtft overlay
6 Content-Type: text/plain; charset=UTF-8
7 Content-Transfer-Encoding: 8bit
9 Add an overlay that provides much of the functionality that fbtft_device did.
11 Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
13 arch/arm/boot/dts/overlays/Makefile | 1 +
14 arch/arm/boot/dts/overlays/README | 124 ++++
15 arch/arm/boot/dts/overlays/fbtft-overlay.dts | 611 +++++++++++++++++++
16 3 files changed, 736 insertions(+)
17 create mode 100644 arch/arm/boot/dts/overlays/fbtft-overlay.dts
19 --- a/arch/arm/boot/dts/overlays/Makefile
20 +++ b/arch/arm/boot/dts/overlays/Makefile
21 @@ -49,6 +49,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \
29 --- a/arch/arm/boot/dts/overlays/README
30 +++ b/arch/arm/boot/dts/overlays/README
31 @@ -857,6 +857,130 @@ Params: interrupt GPIO use
32 swapxy Touchscreen swapped x y axis
36 +Info: Overlay for SPI-connected displays using the fbtft drivers.
38 + This overlay seeks to replace the functionality provided by fbtft_device
39 + which is now gone from the kernel.
41 + Most displays from fbtft_device have been ported over.
43 + dtoverlay=fbtft,spi0-0,rpi-display,reset_pin=23,dc_pin=24,led_pin=18,rotate=270
45 + It is also possible to specify the controller (this will use the default
46 + init sequence in the driver).
48 + dtoverlay=fbtft,spi0-0,ili9341,bgr,reset_pin=23,dc_pin=24,led_pin=18,rotate=270
50 + For devices on spi1 or spi2, the interfaces should be enabled
51 + with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays.
53 + The following features of fbtft_device have not been ported over:
54 + - parallel bus is not supported
55 + - the init property which overrides the controller initialization
56 + sequence is not supported as a parameter due to memory limitations in
57 + the bootloader responsible for applying the overlay.
59 + See https://github.com/notro/fbtft/wiki/FBTFT-RPI-overlays for how to
62 +Load: dtoverlay=fbtft,<param>=<val>
64 + spi<n>-<m> Configure device at spi<n>, cs<m>
66 + speed SPI bus speed in Hz (default 32000000)
67 + cpha Shifted clock phase (CPHA) mode
68 + cpol Inverse clock polarity (CPOL) mode
70 + adafruit18 Adafruit 1.8
71 + adafruit22 Adafruit 2.2 (old)
72 + adafruit22a Adafruit 2.2
73 + adafruit28 Adafruit 2.8
74 + adafruit13m Adafruit 1.3 OLED
75 + admatec_c-berry28 C-Berry28
77 + er_tftm050_2 ER-TFTM070-2
78 + er_tftm070_5 ER-TFTM070-5
80 + ew24ha0_9bit EW24HA0 in 9-bit mode
81 + freetronicsoled128 Freetronics OLED128
84 + itdb28_spi ITDB02-2.8 with SPI interface circuit
85 + mi0283qt-2 Watterott MI0283QT-2
86 + mi0283qt-9a Watterott MI0283QT-9A
87 + nokia3310 Nokia 3310
88 + nokia3310a Nokia 3310a
89 + nokia5110 Nokia 5110
91 + pitft Adafruit PiTFT 2.8
93 + rpi-display Watterott rpi-display
94 + sainsmart18 Sainsmart 1.8
95 + sainsmart32_spi Sainsmart 3.2 with SPI interfce circuit
96 + tinylcd35 TinyLCD 3.5
97 + tm022hdh26 Tianma TM022HDH26
98 + tontec35_9481 Tontect 3.5 with ILI9481 controller
99 + tontec35_9486 Tontect 3.5 with ILI9486 controller
100 + waveshare32b Waveshare 3.2
101 + waveshare22 Waveshare 2.2
103 + bd663474 BD663474 display controller
104 + hx8340bn HX8340BN display controller
105 + hx8347d HX8347D display controller
106 + hx8353d HX8353D display controller
107 + hx8357d HX8357D display controller
108 + ili9163 ILI9163 display controller
109 + ili9320 ILI9320 display controller
110 + ili9325 ILI9325 display controller
111 + ili9340 ILI9340 display controller
112 + ili9341 ILI9341 display controller
113 + ili9481 ILI9481 display controller
114 + ili9486 ILI9486 display controller
115 + pcd8544 PCD8544 display controller
116 + ra8875 RA8875 display controller
117 + s6d02a1 S6D02A1 display controller
118 + s6d1121 S6D1121 display controller
119 + seps525 SEPS525 display controller
120 + sh1106 SH1106 display controller
121 + ssd1289 SSD1289 display controller
122 + ssd1305 SSD1305 display controller
123 + ssd1306 SSD1306 display controller
124 + ssd1325 SSD1325 display controller
125 + ssd1331 SSD1331 display controller
126 + ssd1351 SSD1351 display controller
127 + st7735r ST7735R display controller
128 + st7789v ST7789V display controller
129 + tls8204 TLS8204 display controller
130 + uc1611 UC1611 display controller
131 + uc1701 UC1701 display controller
132 + upd161704 UPD161704 display controller
134 + width Display width in pixels
135 + height Display height in pixels
136 + regwidth Display controller register width (default is
138 + buswidth Display bus interface width (default 8)
139 + debug Debug output level {0-7}
140 + rotate Display rotation {0, 90, 180, 270} (counter
141 + clockwise). Not supported by all drivers.
142 + bgr Enable BGR mode (default off). Use if Red and
143 + Blue are swapped. Not supported by all drivers.
144 + fps Frames per second (default 30). In effect this
145 + states how long the driver will wait after video
146 + memory has been changed until display update
147 + transfer is started.
148 + txbuflen Length of the FBTFT transmit buffer
150 + startbyte Sets the Start byte used by fb_ili9320,
151 + fb_ili9325 and fb_hx8347d. Common value is 0x70.
152 + gamma String representation of Gamma Curve(s). Driver
153 + specific. Not supported by all drivers.
154 + reset_pin GPIO pin for RESET
155 + dc_pin GPIO pin for D/C
156 + led_pin GPIO pin for LED backlight
160 Info: Configures the Fe-Pi Audio Sound Card
161 Load: dtoverlay=fe-pi-audio
163 +++ b/arch/arm/boot/dts/overlays/fbtft-overlay.dts
166 + * Device Tree overlay for fbtft drivers
173 + compatible = "brcm,bcm2835";
177 + target = <&display>;
179 + compatible = "sitronix,st7735r";
180 + spi-max-frequency = <32000000>;
181 + gamma = "02 1c 07 12 37 32 29 2d 29 25 2B 39 00 01 03 10\n03 1d 07 06 2E 2C 29 2D 2E 2E 37 3F 00 00 02 10";
187 + target = <&display>;
189 + compatible = "himax,hx8340bn";
190 + spi-max-frequency = <32000000>;
198 + target = <&display>;
200 + compatible = "ilitek,ili9340";
201 + spi-max-frequency = <32000000>;
208 + target = <&display>;
210 + compatible = "ilitek,ili9341";
211 + spi-max-frequency = <32000000>;
218 + target = <&display>;
220 + compatible = "solomon,ssd1306";
221 + spi-max-frequency = <16000000>;
225 + /* admatec_c-berry28 */
227 + target = <&display>;
229 + compatible = "sitronix,st7789v";
230 + spi-max-frequency = <48000000>;
234 + 0x010000B2 0x0C 0x0C 0x00 0x33 0x33
236 + 0x010000C2 0x01 0xFF
241 + 0x010000D0 0xA4 0xA1
243 + gamma = "D0 00 14 15 13 2C 42 43 4E 09 16 14 18 21\nD0 00 14 15 13 0B 43 55 53 0C 17 14 23 20";
249 + target = <&display>;
251 + compatible = "UltraChip,uc1701";
252 + spi-max-frequency = <8000000>;
259 + target = <&display>;
261 + compatible = "raio,ra8875";
262 + spi-max-frequency = <5000000>;
273 + target = <&display>;
275 + compatible = "raio,ra8875";
276 + spi-max-frequency = <5000000>;
287 + target = <&display>;
289 + compatible = "ultrachip,uc1611";
290 + spi-max-frequency = <32000000>;
298 + target = <&display>;
300 + compatible = "ultrachip,uc1611";
301 + spi-max-frequency = <32000000>;
308 + /* freetronicsoled128 */
310 + target = <&display>;
312 + compatible = "solomon,ssd1351";
313 + spi-max-frequency = <20000000>;
314 + backlight = <2>; /* FBTFT_ONBOARD_BACKLIGHT */
321 + target = <&display>;
323 + compatible = "ilitek,ili9320";
324 + spi-max-frequency = <32000000>;
327 + startbyte = <0x70>;
334 + target = <&display>;
336 + compatible = "ilitek,ili9325";
337 + spi-max-frequency = <48000000>;
340 + init = <0x010000e7 0x0010
392 + startbyte = <0x70>;
395 + gamma = "04 1F 4 7 7 0 7 7 6 0\n0F 00 1 7 4 0 0 0 6 7";
401 + target = <&display>;
403 + compatible = "ilitek,ili9325";
404 + spi-max-frequency = <32000000>;
411 + target = <&display>;
413 + compatible = "himax,hx8347d";
414 + spi-max-frequency = <32000000>;
415 + startbyte = <0x70>;
422 + target = <&display>;
424 + compatible = "ilitek,ili9341";
425 + spi-max-frequency = <32000000>;
433 + target = <&display>;
435 + compatible = "philips,pcd8544";
436 + spi-max-frequency = <400000>;
442 + target = <&display>;
444 + compatible = "teralane,tls8204";
445 + spi-max-frequency = <1000000>;
451 + target = <&display>;
453 + compatible = "ilitek,ili9163";
454 + spi-max-frequency = <12000000>;
461 + target = <&display>;
463 + compatible = "ilitek,ili9486";
464 + spi-max-frequency = <32000000>;
472 + target = <&display>;
474 + compatible = "ilitek,ili9340";
475 + spi-max-frequency = <32000000>;
479 + 0x010000EF 0x03 0x80 0x02
480 + 0x010000CF 0x00 0xC1 0x30
481 + 0x010000ED 0x64 0x03 0x12 0x81
482 + 0x010000E8 0x85 0x00 0x78
483 + 0x010000CB 0x39 0x2C 0x00 0x34 0x02
485 + 0x010000EA 0x00 0x00
488 + 0x010000C5 0x3E 0x28
491 + 0x010000B1 0x00 0x18
492 + 0x010000B6 0x08 0x82 0x27
495 + 0x010000E0 0x0F 0x31 0x2B 0x0C 0x0E 0x08 0x4E 0xF1 0x37 0x07 0x10 0x03 0x0E 0x09 0x00
496 + 0x010000E1 0x00 0x0E 0x14 0x03 0x11 0x07 0x31 0xC1 0x48 0x08 0x0F 0x0C 0x31 0x36 0x0F
507 + target = <&display>;
509 + compatible = "solomon,ssd1351";
510 + spi-max-frequency = <20000000>;
512 + gamma = "0 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 4 4 4 4 4 4 4 4 4 4 4 4";
518 + target = <&display>;
520 + compatible = "ilitek,ili9341";
521 + spi-max-frequency = <32000000>;
528 + target = <&display>;
530 + compatible = "sitronix,st7735r";
531 + spi-max-frequency = <32000000>;
535 + /* sainsmart32_spi */
537 + target = <&display>;
539 + compatible = "solomon,ssd1289";
540 + spi-max-frequency = <16000000>;
547 + target = <&display>;
549 + compatible = "neosec,tinylcd";
550 + spi-max-frequency = <32000000>;
557 + target = <&display>;
559 + compatible = "ilitek,ili9341";
560 + spi-max-frequency = <32000000>;
565 + /* tontec35_9481 - boards before 02 July 2014 */
567 + target = <&display>;
569 + compatible = "ilitek,ili9481";
570 + spi-max-frequency = <128000000>;
577 + /* tontec35_9486 - boards after 02 July 2014 */
579 + target = <&display>;
581 + compatible = "ilitek,ili9486";
582 + spi-max-frequency = <128000000>;
591 + target = <&display>;
593 + compatible = "ilitek,ili9340";
594 + spi-max-frequency = <48000000>;
595 + init = <0x010000CB 0x39 0x2C 0x00 0x34 0x02
596 + 0x010000CF 0x00 0xC1 0x30
597 + 0x010000E8 0x85 0x00 0x78
598 + 0x010000EA 0x00 0x00
599 + 0x010000ED 0x64 0x03 0x12 0x81
603 + 0x010000C5 0x3E 0x28
607 + 0x010000B1 0x00 0x18
608 + 0x010000B6 0x08 0x82 0x27
611 + 0x010000E0 0x0F 0x31 0x2B 0x0C 0x0E 0x08 0x4E 0xF1 0x37 0x07 0x10 0x03 0x0E 0x09 0x00
612 + 0x010000E1 0x00 0x0E 0x14 0x03 0x11 0x07 0x31 0xC1 0x48 0x08 0x0F 0x0C 0x31 0x36 0x0F
623 + target = <&display>;
625 + compatible = "hitachi,bd663474";
626 + spi-max-frequency = <32000000>;
632 + spidev_fragment: fragment@100 {
633 + target-path = "spi0/spidev@0";
635 + status = "disabled";
639 + display_fragment: fragment@101 {
642 + /* needed to avoid dtc warning */
643 + #address-cells = <1>;
648 + display: display@0{
650 + spi-max-frequency = <32000000>;
658 + spi0-0 = <&display_fragment>, "target:0=",<&spi0>,
659 + <&spidev_fragment>, "target-path=spi0/spidev@0",
660 + <&display>, "reg:0=0";
661 + spi0-1 = <&display_fragment>, "target:0=",<&spi0>,
662 + <&spidev_fragment>, "target-path=spi0/spidev@1",
663 + <&display>, "reg:0=1";
664 + spi1-0 = <&display_fragment>, "target:0=",<&spi1>,
665 + <&spidev_fragment>, "target-path=spi1/spidev@0",
666 + <&display>, "reg:0=0";
667 + spi1-1 = <&display_fragment>, "target:0=",<&spi1>,
668 + <&spidev_fragment>, "target-path=spi1/spidev@1",
669 + <&display>, "reg:0=1";
670 + spi1-2 = <&display_fragment>, "target:0=",<&spi1>,
671 + <&spidev_fragment>, "target-path=spi1/spidev@2",
672 + <&display>, "reg:0=2";
673 + spi2-0 = <&display_fragment>, "target:0=",<&spi2>,
674 + <&spidev_fragment>, "target-path=spi2/spidev@0",
675 + <&display>, "reg:0=0";
676 + spi2-1 = <&display_fragment>, "target:0=",<&spi2>,
677 + <&spidev_fragment>, "target-path=spi2/spidev@1",
678 + <&display>, "reg:0=1";
679 + spi2-2 = <&display_fragment>, "target:0=",<&spi2>,
680 + <&spidev_fragment>, "target-path=spi2/spidev@2",
681 + <&display>, "reg:0=2";
683 + speed = <&display>, "spi-max-frequency:0";
684 + cpha = <&display>, "spi-cpha?";
685 + cpol = <&display>, "spi-cpol?";
688 + adafruit18 = <0>, "+0";
689 + adafruit22 = <0>, "+1";
690 + adafruit22a = <0>, "+2";
691 + adafruit28 = <0>, "+3";
692 + adafruit13m = <0>, "+4";
693 + admatec_c-berry28 = <0>, "+5";
694 + dogs102 = <0>, "+6";
695 + er_tftm050_2 = <0>, "+7";
696 + er_tftm070_5 = <0>, "+8";
697 + ew24ha0 = <0>, "+9";
698 + ew24ha0_9bit = <0>, "+10";
699 + freetronicsoled128 = <0>, "+11";
700 + hy28a = <0>, "+12";
701 + hy28b = <0>, "+13";
702 + itdb28_spi = <0>, "+14";
703 + mi0283qt-2 = <0>, "+15";
704 + mi0283qt-9a = <0>, "+16";
705 + nokia3310 = <0>, "+17";
706 + nokia3310a = <0>, "+18";
707 + nokia5110 = <0>, "+19";
708 + piscreen = <0>, "+20";
709 + pitft = <0>, "+21";
710 + pioled = <0>, "+22";
711 + rpi-display = <0>, "+23";
712 + sainsmart18 = <0>, "+24";
713 + sainsmart32_spi = <0>, "+25";
714 + tinylcd35 = <0>, "+26";
715 + tm022hdh26 = <0>, "+27";
716 + tontec35_9481 = <0>, "+28";
717 + tontec35_9486 = <0>, "+29";
718 + waveshare32b = <0>, "+30";
719 + waveshare22 = <0>, "+31";
722 + bd663474 = <&display>, "compatible=hitachi,bd663474";
723 + hx8340bn = <&display>, "compatible=himax,hx8340bn";
724 + hx8347d = <&display>, "compatible=himax,hx8347d";
725 + hx8353d = <&display>, "compatible=himax,hx8353d";
726 + hx8357d = <&display>, "compatible=himax,hx8357d";
727 + ili9163 = <&display>, "compatible=ilitek,ili9163";
728 + ili9320 = <&display>, "compatible=ilitek,ili9320";
729 + ili9325 = <&display>, "compatible=ilitek,ili9325";
730 + ili9340 = <&display>, "compatible=ilitek,ili9340";
731 + ili9341 = <&display>, "compatible=ilitek,ili9341";
732 + ili9481 = <&display>, "compatible=ilitek,ili9481";
733 + ili9486 = <&display>, "compatible=ilitek,ili9486";
734 + pcd8544 = <&display>, "compatible=philips,pcd8544";
735 + ra8875 = <&display>, "compatible=raio,ra8875";
736 + s6d02a1 = <&display>, "compatible=samsung,s6d02a1";
737 + s6d1121 = <&display>, "compatible=samsung,s6d1121";
738 + seps525 = <&display>, "compatible=syncoam,seps525";
739 + sh1106 = <&display>, "compatible=sinowealth,sh1106";
740 + ssd1289 = <&display>, "compatible=solomon,ssd1289";
741 + ssd1305 = <&display>, "compatible=solomon,ssd1305";
742 + ssd1306 = <&display>, "compatible=solomon,ssd1306";
743 + ssd1325 = <&display>, "compatible=solomon,ssd1325";
744 + ssd1331 = <&display>, "compatible=solomon,ssd1331";
745 + ssd1351 = <&display>, "compatible=solomon,ssd1351";
746 + st7735r = <&display>, "compatible=sitronix,st7735r";
747 + st7789v = <&display>, "compatible=sitronix,st7789v";
748 + tls8204 = <&display>, "compatible=teralane,tls8204";
749 + uc1611 = <&display>, "compatible=ultrachip,uc1611";
750 + uc1701 = <&display>, "compatible=UltraChip,uc1701";
751 + upd161704 = <&display>, "compatible=nec,upd161704";
753 + width = <&display>, "width:0";
754 + height = <&display>, "height:0";
755 + regwidth = <&display>, "regwidth:0";
756 + buswidth = <&display>, "buswidth:0";
757 + debug = <&display>, "debug:0";
758 + rotate = <&display>, "rotate:0";
759 + bgr = <&display>, "bgr?";
760 + fps = <&display>, "fps:0";
761 + txbuflen = <&display>, "txbuflen:0";
762 + startbyte = <&display>, "startbyte:0";
763 + gamma = <&display>, "gamma";
765 + reset_pin = <&display>, "reset-gpios:0=", <&gpio>,
766 + <&display>, "reset-gpios:4",
767 + <&display>, "reset-gpios:8=1"; /* GPIO_ACTIVE_LOW */
768 + dc_pin = <&display>, "dc-gpios:0=", <&gpio>,
769 + <&display>, "dc-gpios:4",
770 + <&display>, "dc-gpios:8=0"; /* GPIO_ACTIVE_HIGH */
771 + led_pin = <&display>, "led-gpios:0=", <&gpio>,
772 + <&display>, "led-gpios:4",
773 + <&display>, "led-gpios:8=0"; /* GPIO_ACTIVE_HIGH */