projects / openwrt / staging / chunkeey.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
history | raw | HEAD
bcm27xx: add support for linux v5.15
[openwrt/staging/chunkeey.git] / target / linux / bcm27xx / patches-5.15 / 950-0521-media-i2c-Add-driver-for-IMX519-sensor.patch
1 From b47705e22313bb8621e66f4596581f671e986225 Mon Sep 17 00:00:00 2001
2 From: Lee Jackson <info@arducam.com>
3 Date: Fri, 27 Aug 2021 13:48:52 +0800
4 Subject: [PATCH] media: i2c: Add driver for IMX519 sensor
5
6 Adds a driver for the 16MPix IMX519 CSI2 sensor.
7 Whilst the sensor supports 2 or 4 CSI2 data lanes, this driver
8 currently only supports 2 lanes.
9
10 The following Bayer modes are currently available:
11
12 4656x3496 10-bit @ 10fps
13 3840x2160 10-bit (cropped) @ 21fps
14 2328x1748 10-bit (binned) @ 30fps
15 1920x1080 10-bit (cropped/binned) @ 60fps
16 1280x720 10-bit (cropped/binned) @ 120fps
17
18 Signed-off-by: Lee Jackson <info@arducam.com>
19 ---
20 drivers/media/i2c/Kconfig | 11 +
21 drivers/media/i2c/Makefile | 1 +
22 drivers/media/i2c/imx519.c | 2024 ++++++++++++++++++++++++++++++++++++
23 3 files changed, 2036 insertions(+)
24 create mode 100644 drivers/media/i2c/imx519.c
25
26 --- a/drivers/media/i2c/Kconfig
27 +++ b/drivers/media/i2c/Kconfig
28 @@ -894,6 +894,17 @@ config VIDEO_IMX412
29 To compile this driver as a module, choose M here: the
30 module will be called imx412.
31
32 +config VIDEO_IMX519
33 + tristate "Arducam IMX519 sensor support"
34 + depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API
35 + depends on MEDIA_CAMERA_SUPPORT
36 + help
37 + This is a Video4Linux2 sensor driver for the Arducam
38 + IMX519 camera.
39 +
40 + To compile this driver as a module, choose M here: the
41 + module will be called IMX519.
42 +
43 config VIDEO_OV02A10
44 tristate "OmniVision OV02A10 sensor support"
45 depends on VIDEO_V4L2 && I2C
46 --- a/drivers/media/i2c/Makefile
47 +++ b/drivers/media/i2c/Makefile
48 @@ -131,6 +131,7 @@ obj-$(CONFIG_VIDEO_IMX334) += imx334.o
49 obj-$(CONFIG_VIDEO_IMX335) += imx335.o
50 obj-$(CONFIG_VIDEO_IMX355) += imx355.o
51 obj-$(CONFIG_VIDEO_IMX412) += imx412.o
52 +obj-$(CONFIG_VIDEO_IMX519) += imx519.o
53 obj-$(CONFIG_VIDEO_MAX9286) += max9286.o
54 obj-$(CONFIG_VIDEO_MAX9271_LIB) += max9271.o
55 obj-$(CONFIG_VIDEO_RDACM20) += rdacm20.o
56 --- /dev/null
57 +++ b/drivers/media/i2c/imx519.c
58 @@ -0,0 +1,2024 @@
59 +// SPDX-License-Identifier: GPL-2.0
60 +/*
61 + * A V4L2 driver for Sony IMX519 cameras.
62 + * Copyright (C) 2021 Arducam Technology co., Ltd.
63 + *
64 + * Based on Sony IMX477 camera driver
65 + * Copyright (C) 2020 Raspberry Pi (Trading) Ltd
66 + */
67 +#include <asm/unaligned.h>
68 +#include <linux/clk.h>
69 +#include <linux/delay.h>
70 +#include <linux/gpio/consumer.h>
71 +#include <linux/i2c.h>
72 +#include <linux/module.h>
73 +#include <linux/of_device.h>
74 +#include <linux/pm_runtime.h>
75 +#include <linux/regulator/consumer.h>
76 +#include <media/v4l2-ctrls.h>
77 +#include <media/v4l2-device.h>
78 +#include <media/v4l2-event.h>
79 +#include <media/v4l2-fwnode.h>
80 +#include <media/v4l2-mediabus.h>
81 +
82 +#define IMX519_REG_VALUE_08BIT 1
83 +#define IMX519_REG_VALUE_16BIT 2
84 +
85 +/* Chip ID */
86 +#define IMX519_REG_CHIP_ID 0x0016
87 +#define IMX519_CHIP_ID 0x0519
88 +
89 +#define IMX519_REG_MODE_SELECT 0x0100
90 +#define IMX519_MODE_STANDBY 0x00
91 +#define IMX519_MODE_STREAMING 0x01
92 +
93 +#define IMX519_REG_ORIENTATION 0x101
94 +
95 +#define IMX519_XCLK_FREQ 24000000
96 +
97 +#define IMX519_DEFAULT_LINK_FREQ 493500000
98 +
99 +/* Pixel rate is fixed at 686MHz for all the modes */
100 +#define IMX519_PIXEL_RATE 686000000
101 +
102 +/* V_TIMING internal */
103 +#define IMX519_REG_FRAME_LENGTH 0x0340
104 +#define IMX519_FRAME_LENGTH_MAX 0xffdc
105 +
106 +/* Long exposure multiplier */
107 +#define IMX519_LONG_EXP_SHIFT_MAX 7
108 +#define IMX519_LONG_EXP_SHIFT_REG 0x3100
109 +
110 +/* Exposure control */
111 +#define IMX519_REG_EXPOSURE 0x0202
112 +#define IMX519_EXPOSURE_OFFSET 32
113 +#define IMX519_EXPOSURE_MIN 1
114 +#define IMX519_EXPOSURE_STEP 1
115 +#define IMX519_EXPOSURE_DEFAULT 0x3e8
116 +#define IMX519_EXPOSURE_MAX (IMX519_FRAME_LENGTH_MAX - \
117 + IMX519_EXPOSURE_OFFSET)
118 +
119 +/* Analog gain control */
120 +#define IMX519_REG_ANALOG_GAIN 0x0204
121 +#define IMX519_ANA_GAIN_MIN 0
122 +#define IMX519_ANA_GAIN_MAX 960
123 +#define IMX519_ANA_GAIN_STEP 1
124 +#define IMX519_ANA_GAIN_DEFAULT 0x0
125 +
126 +/* Digital gain control */
127 +#define IMX519_REG_DIGITAL_GAIN 0x020e
128 +#define IMX519_DGTL_GAIN_MIN 0x0100
129 +#define IMX519_DGTL_GAIN_MAX 0xffff
130 +#define IMX519_DGTL_GAIN_DEFAULT 0x0100
131 +#define IMX519_DGTL_GAIN_STEP 1
132 +
133 +/* Test Pattern Control */
134 +#define IMX519_REG_TEST_PATTERN 0x0600
135 +#define IMX519_TEST_PATTERN_DISABLE 0
136 +#define IMX519_TEST_PATTERN_SOLID_COLOR 1
137 +#define IMX519_TEST_PATTERN_COLOR_BARS 2
138 +#define IMX519_TEST_PATTERN_GREY_COLOR 3
139 +#define IMX519_TEST_PATTERN_PN9 4
140 +
141 +/* Test pattern colour components */
142 +#define IMX519_REG_TEST_PATTERN_R 0x0602
143 +#define IMX519_REG_TEST_PATTERN_GR 0x0604
144 +#define IMX519_REG_TEST_PATTERN_B 0x0606
145 +#define IMX519_REG_TEST_PATTERN_GB 0x0608
146 +#define IMX519_TEST_PATTERN_COLOUR_MIN 0
147 +#define IMX519_TEST_PATTERN_COLOUR_MAX 0x0fff
148 +#define IMX519_TEST_PATTERN_COLOUR_STEP 1
149 +#define IMX519_TEST_PATTERN_R_DEFAULT IMX519_TEST_PATTERN_COLOUR_MAX
150 +#define IMX519_TEST_PATTERN_GR_DEFAULT 0
151 +#define IMX519_TEST_PATTERN_B_DEFAULT 0
152 +#define IMX519_TEST_PATTERN_GB_DEFAULT 0
153 +
154 +/* IMX519 native and active pixel array size. */
155 +#define IMX519_NATIVE_WIDTH 4672U
156 +#define IMX519_NATIVE_HEIGHT 3648U
157 +#define IMX519_PIXEL_ARRAY_LEFT 8U
158 +#define IMX519_PIXEL_ARRAY_TOP 48U
159 +#define IMX519_PIXEL_ARRAY_WIDTH 4656U
160 +#define IMX519_PIXEL_ARRAY_HEIGHT 3496U
161 +
162 +struct imx519_reg {
163 + u16 address;
164 + u8 val;
165 +};
166 +
167 +struct imx519_reg_list {
168 + unsigned int num_of_regs;
169 + const struct imx519_reg *regs;
170 +};
171 +
172 +/* Mode : resolution and related config&values */
173 +struct imx519_mode {
174 + /* Frame width */
175 + unsigned int width;
176 +
177 + /* Frame height */
178 + unsigned int height;
179 +
180 + /* H-timing in pixels */
181 + unsigned int line_length_pix;
182 +
183 + /* Analog crop rectangle. */
184 + struct v4l2_rect crop;
185 +
186 + /* Highest possible framerate. */
187 + struct v4l2_fract timeperframe_min;
188 +
189 + /* Default framerate. */
190 + struct v4l2_fract timeperframe_default;
191 +
192 + /* Default register values */
193 + struct imx519_reg_list reg_list;
194 +};
195 +
196 +static const struct imx519_reg mode_common_regs[] = {
197 + {0x0136, 0x18},
198 + {0x0137, 0x00},
199 + {0x3c7e, 0x01},
200 + {0x3c7f, 0x07},
201 + {0x3020, 0x00},
202 + {0x3e35, 0x01},
203 + {0x3f7f, 0x01},
204 + {0x5609, 0x57},
205 + {0x5613, 0x51},
206 + {0x561f, 0x5e},
207 + {0x5623, 0xd2},
208 + {0x5637, 0x11},
209 + {0x5657, 0x11},
210 + {0x5659, 0x12},
211 + {0x5733, 0x60},
212 + {0x5905, 0x57},
213 + {0x590f, 0x51},
214 + {0x591b, 0x5e},
215 + {0x591f, 0xd2},
216 + {0x5933, 0x11},
217 + {0x5953, 0x11},
218 + {0x5955, 0x12},
219 + {0x5a2f, 0x60},
220 + {0x5a85, 0x57},
221 + {0x5a8f, 0x51},
222 + {0x5a9b, 0x5e},
223 + {0x5a9f, 0xd2},
224 + {0x5ab3, 0x11},
225 + {0x5ad3, 0x11},
226 + {0x5ad5, 0x12},
227 + {0x5baf, 0x60},
228 + {0x5c15, 0x2a},
229 + {0x5c17, 0x80},
230 + {0x5c19, 0x31},
231 + {0x5c1b, 0x87},
232 + {0x5c25, 0x25},
233 + {0x5c27, 0x7b},
234 + {0x5c29, 0x2a},
235 + {0x5c2b, 0x80},
236 + {0x5c2d, 0x31},
237 + {0x5c2f, 0x87},
238 + {0x5c35, 0x2b},
239 + {0x5c37, 0x81},
240 + {0x5c39, 0x31},
241 + {0x5c3b, 0x87},
242 + {0x5c45, 0x25},
243 + {0x5c47, 0x7b},
244 + {0x5c49, 0x2a},
245 + {0x5c4b, 0x80},
246 + {0x5c4d, 0x31},
247 + {0x5c4f, 0x87},
248 + {0x5c55, 0x2d},
249 + {0x5c57, 0x83},
250 + {0x5c59, 0x32},
251 + {0x5c5b, 0x88},
252 + {0x5c65, 0x29},
253 + {0x5c67, 0x7f},
254 + {0x5c69, 0x2e},
255 + {0x5c6b, 0x84},
256 + {0x5c6d, 0x32},
257 + {0x5c6f, 0x88},
258 + {0x5e69, 0x04},
259 + {0x5e9d, 0x00},
260 + {0x5f18, 0x10},
261 + {0x5f1a, 0x0e},
262 + {0x5f20, 0x12},
263 + {0x5f22, 0x10},
264 + {0x5f24, 0x0e},
265 + {0x5f28, 0x10},
266 + {0x5f2a, 0x0e},
267 + {0x5f30, 0x12},
268 + {0x5f32, 0x10},
269 + {0x5f34, 0x0e},
270 + {0x5f38, 0x0f},
271 + {0x5f39, 0x0d},
272 + {0x5f3c, 0x11},
273 + {0x5f3d, 0x0f},
274 + {0x5f3e, 0x0d},
275 + {0x5f61, 0x07},
276 + {0x5f64, 0x05},
277 + {0x5f67, 0x03},
278 + {0x5f6a, 0x03},
279 + {0x5f6d, 0x07},
280 + {0x5f70, 0x07},
281 + {0x5f73, 0x05},
282 + {0x5f76, 0x02},
283 + {0x5f79, 0x07},
284 + {0x5f7c, 0x07},
285 + {0x5f7f, 0x07},
286 + {0x5f82, 0x07},
287 + {0x5f85, 0x03},
288 + {0x5f88, 0x02},
289 + {0x5f8b, 0x01},
290 + {0x5f8e, 0x01},
291 + {0x5f91, 0x04},
292 + {0x5f94, 0x05},
293 + {0x5f97, 0x02},
294 + {0x5f9d, 0x07},
295 + {0x5fa0, 0x07},
296 + {0x5fa3, 0x07},
297 + {0x5fa6, 0x07},
298 + {0x5fa9, 0x03},
299 + {0x5fac, 0x01},
300 + {0x5faf, 0x01},
301 + {0x5fb5, 0x03},
302 + {0x5fb8, 0x02},
303 + {0x5fbb, 0x01},
304 + {0x5fc1, 0x07},
305 + {0x5fc4, 0x07},
306 + {0x5fc7, 0x07},
307 + {0x5fd1, 0x00},
308 + {0x6302, 0x79},
309 + {0x6305, 0x78},
310 + {0x6306, 0xa5},
311 + {0x6308, 0x03},
312 + {0x6309, 0x20},
313 + {0x630b, 0x0a},
314 + {0x630d, 0x48},
315 + {0x630f, 0x06},
316 + {0x6311, 0xa4},
317 + {0x6313, 0x03},
318 + {0x6314, 0x20},
319 + {0x6316, 0x0a},
320 + {0x6317, 0x31},
321 + {0x6318, 0x4a},
322 + {0x631a, 0x06},
323 + {0x631b, 0x40},
324 + {0x631c, 0xa4},
325 + {0x631e, 0x03},
326 + {0x631f, 0x20},
327 + {0x6321, 0x0a},
328 + {0x6323, 0x4a},
329 + {0x6328, 0x80},
330 + {0x6329, 0x01},
331 + {0x632a, 0x30},
332 + {0x632b, 0x02},
333 + {0x632c, 0x20},
334 + {0x632d, 0x02},
335 + {0x632e, 0x30},
336 + {0x6330, 0x60},
337 + {0x6332, 0x90},
338 + {0x6333, 0x01},
339 + {0x6334, 0x30},
340 + {0x6335, 0x02},
341 + {0x6336, 0x20},
342 + {0x6338, 0x80},
343 + {0x633a, 0xa0},
344 + {0x633b, 0x01},
345 + {0x633c, 0x60},
346 + {0x633d, 0x02},
347 + {0x633e, 0x60},
348 + {0x633f, 0x01},
349 + {0x6340, 0x30},
350 + {0x6341, 0x02},
351 + {0x6342, 0x20},
352 + {0x6343, 0x03},
353 + {0x6344, 0x80},
354 + {0x6345, 0x03},
355 + {0x6346, 0x90},
356 + {0x6348, 0xf0},
357 + {0x6349, 0x01},
358 + {0x634a, 0x20},
359 + {0x634b, 0x02},
360 + {0x634c, 0x10},
361 + {0x634d, 0x03},
362 + {0x634e, 0x60},
363 + {0x6350, 0xa0},
364 + {0x6351, 0x01},
365 + {0x6352, 0x60},
366 + {0x6353, 0x02},
367 + {0x6354, 0x50},
368 + {0x6355, 0x02},
369 + {0x6356, 0x60},
370 + {0x6357, 0x01},
371 + {0x6358, 0x30},
372 + {0x6359, 0x02},
373 + {0x635a, 0x30},
374 + {0x635b, 0x03},
375 + {0x635c, 0x90},
376 + {0x635f, 0x01},
377 + {0x6360, 0x10},
378 + {0x6361, 0x01},
379 + {0x6362, 0x40},
380 + {0x6363, 0x02},
381 + {0x6364, 0x50},
382 + {0x6368, 0x70},
383 + {0x636a, 0xa0},
384 + {0x636b, 0x01},
385 + {0x636c, 0x50},
386 + {0x637d, 0xe4},
387 + {0x637e, 0xb4},
388 + {0x638c, 0x8e},
389 + {0x638d, 0x38},
390 + {0x638e, 0xe3},
391 + {0x638f, 0x4c},
392 + {0x6390, 0x30},
393 + {0x6391, 0xc3},
394 + {0x6392, 0xae},
395 + {0x6393, 0xba},
396 + {0x6394, 0xeb},
397 + {0x6395, 0x6e},
398 + {0x6396, 0x34},
399 + {0x6397, 0xe3},
400 + {0x6398, 0xcf},
401 + {0x6399, 0x3c},
402 + {0x639a, 0xf3},
403 + {0x639b, 0x0c},
404 + {0x639c, 0x30},
405 + {0x639d, 0xc1},
406 + {0x63b9, 0xa3},
407 + {0x63ba, 0xfe},
408 + {0x7600, 0x01},
409 + {0x79a0, 0x01},
410 + {0x79a1, 0x01},
411 + {0x79a2, 0x01},
412 + {0x79a3, 0x01},
413 + {0x79a4, 0x01},
414 + {0x79a5, 0x20},
415 + {0x79a9, 0x00},
416 + {0x79aa, 0x01},
417 + {0x79ad, 0x00},
418 + {0x79af, 0x00},
419 + {0x8173, 0x01},
420 + {0x835c, 0x01},
421 + {0x8a74, 0x01},
422 + {0x8c1f, 0x00},
423 + {0x8c27, 0x00},
424 + {0x8c3b, 0x03},
425 + {0x9004, 0x0b},
426 + {0x920c, 0x6a},
427 + {0x920d, 0x22},
428 + {0x920e, 0x6a},
429 + {0x920f, 0x23},
430 + {0x9214, 0x6a},
431 + {0x9215, 0x20},
432 + {0x9216, 0x6a},
433 + {0x9217, 0x21},
434 + {0x9385, 0x3e},
435 + {0x9387, 0x1b},
436 + {0x938d, 0x4d},
437 + {0x938f, 0x43},
438 + {0x9391, 0x1b},
439 + {0x9395, 0x4d},
440 + {0x9397, 0x43},
441 + {0x9399, 0x1b},
442 + {0x939d, 0x3e},
443 + {0x939f, 0x2f},
444 + {0x93a5, 0x43},
445 + {0x93a7, 0x2f},
446 + {0x93a9, 0x2f},
447 + {0x93ad, 0x34},
448 + {0x93af, 0x2f},
449 + {0x93b5, 0x3e},
450 + {0x93b7, 0x2f},
451 + {0x93bd, 0x4d},
452 + {0x93bf, 0x43},
453 + {0x93c1, 0x2f},
454 + {0x93c5, 0x4d},
455 + {0x93c7, 0x43},
456 + {0x93c9, 0x2f},
457 + {0x974b, 0x02},
458 + {0x995c, 0x8c},
459 + {0x995d, 0x00},
460 + {0x995e, 0x00},
461 + {0x9963, 0x64},
462 + {0x9964, 0x50},
463 + {0xaa0a, 0x26},
464 + {0xae03, 0x04},
465 + {0xae04, 0x03},
466 + {0xae05, 0x03},
467 + {0xbc1c, 0x08},
468 + {0xbcf1, 0x02},
469 +};
470 +
471 +/* 16 mpix 10fps */
472 +static const struct imx519_reg mode_4656x3496_regs[] = {
473 + {0x0111, 0x02},
474 + {0x0112, 0x0a},
475 + {0x0113, 0x0a},
476 + {0x0114, 0x01},
477 + {0x0342, 0x42},
478 + {0x0343, 0x00},
479 + {0x0340, 0x0d},
480 + {0x0341, 0xf4},
481 + {0x0344, 0x00},
482 + {0x0345, 0x00},
483 + {0x0346, 0x00},
484 + {0x0347, 0x00},
485 + {0x0348, 0x12},
486 + {0x0349, 0x2f},
487 + {0x034a, 0x0d},
488 + {0x034b, 0xa7},
489 + {0x0220, 0x00},
490 + {0x0221, 0x11},
491 + {0x0222, 0x01},
492 + {0x0900, 0x00},
493 + {0x0901, 0x11},
494 + {0x0902, 0x0a},
495 + {0x3f4c, 0x01},
496 + {0x3f4d, 0x01},
497 + {0x4254, 0x7f},
498 + {0x0401, 0x00},
499 + {0x0404, 0x00},
500 + {0x0405, 0x10},
501 + {0x0408, 0x00},
502 + {0x0409, 0x00},
503 + {0x040a, 0x00},
504 + {0x040b, 0x00},
505 + {0x040c, 0x12},
506 + {0x040d, 0x30},
507 + {0x040e, 0x0d},
508 + {0x040f, 0xa8},
509 + {0x034c, 0x12},
510 + {0x034d, 0x30},
511 + {0x034e, 0x0d},
512 + {0x034f, 0xa8},
513 + {0x0301, 0x06},
514 + {0x0303, 0x04},
515 + {0x0305, 0x04},
516 + {0x0306, 0x01},
517 + {0x0307, 0x57},
518 + {0x0309, 0x0a},
519 + {0x030b, 0x02},
520 + {0x030d, 0x04},
521 + {0x030e, 0x01},
522 + {0x030f, 0x49},
523 + {0x0310, 0x01},
524 + {0x0820, 0x07},
525 + {0x0821, 0xb6},
526 + {0x0822, 0x00},
527 + {0x0823, 0x00},
528 + {0x3e20, 0x01},
529 + {0x3e37, 0x00},
530 + {0x3e3b, 0x00},
531 + {0x0106, 0x00},
532 + {0x0b00, 0x00},
533 + {0x3230, 0x00},
534 + {0x3f14, 0x01},
535 + {0x3f3c, 0x01},
536 + {0x3f0d, 0x0a},
537 + {0x3fbc, 0x00},
538 + {0x3c06, 0x00},
539 + {0x3c07, 0x48},
540 + {0x3c0a, 0x00},
541 + {0x3c0b, 0x00},
542 + {0x3f78, 0x00},
543 + {0x3f79, 0x40},
544 + {0x3f7c, 0x00},
545 + {0x3f7d, 0x00},
546 +};
547 +
548 +/* 4k 21fps mode */
549 +static const struct imx519_reg mode_3840x2160_regs[] = {
550 + {0x0111, 0x02},
551 + {0x0112, 0x0a},
552 + {0x0113, 0x0a},
553 + {0x0114, 0x01},
554 + {0x0342, 0x38},
555 + {0x0343, 0x70},
556 + {0x0340, 0x08},
557 + {0x0341, 0xd4},
558 + {0x0344, 0x01},
559 + {0x0345, 0x98},
560 + {0x0346, 0x02},
561 + {0x0347, 0xa0},
562 + {0x0348, 0x10},
563 + {0x0349, 0x97},
564 + {0x034a, 0x0b},
565 + {0x034b, 0x17},
566 + {0x0220, 0x00},
567 + {0x0221, 0x11},
568 + {0x0222, 0x01},
569 + {0x0900, 0x00},
570 + {0x0901, 0x11},
571 + {0x0902, 0x0a},
572 + {0x3f4c, 0x01},
573 + {0x3f4d, 0x01},
574 + {0x4254, 0x7f},
575 + {0x0401, 0x00},
576 + {0x0404, 0x00},
577 + {0x0405, 0x10},
578 + {0x0408, 0x00},
579 + {0x0409, 0x00},
580 + {0x040a, 0x00},
581 + {0x040b, 0x00},
582 + {0x040c, 0x0f},
583 + {0x040d, 0x00},
584 + {0x040e, 0x08},
585 + {0x040f, 0x70},
586 + {0x034c, 0x0f},
587 + {0x034d, 0x00},
588 + {0x034e, 0x08},
589 + {0x034f, 0x70},
590 + {0x0301, 0x06},
591 + {0x0303, 0x04},
592 + {0x0305, 0x04},
593 + {0x0306, 0x01},
594 + {0x0307, 0x57},
595 + {0x0309, 0x0a},
596 + {0x030b, 0x02},
597 + {0x030d, 0x04},
598 + {0x030e, 0x01},
599 + {0x030f, 0x49},
600 + {0x0310, 0x01},
601 + {0x0820, 0x07},
602 + {0x0821, 0xb6},
603 + {0x0822, 0x00},
604 + {0x0823, 0x00},
605 + {0x3e20, 0x01},
606 + {0x3e37, 0x00},
607 + {0x3e3b, 0x00},
608 + {0x0106, 0x00},
609 + {0x0b00, 0x00},
610 + {0x3230, 0x00},
611 + {0x3f14, 0x01},
612 + {0x3f3c, 0x01},
613 + {0x3f0d, 0x0a},
614 + {0x3fbc, 0x00},
615 + {0x3c06, 0x00},
616 + {0x3c07, 0x48},
617 + {0x3c0a, 0x00},
618 + {0x3c0b, 0x00},
619 + {0x3f78, 0x00},
620 + {0x3f79, 0x40},
621 + {0x3f7c, 0x00},
622 + {0x3f7d, 0x00},
623 +};
624 +
625 +/* 2x2 binned 30fps mode */
626 +static const struct imx519_reg mode_2328x1748_regs[] = {
627 + {0x0111, 0x02},
628 + {0x0112, 0x0a},
629 + {0x0113, 0x0a},
630 + {0x0114, 0x01},
631 + {0x0342, 0x24},
632 + {0x0343, 0x12},
633 + {0x0340, 0x09},
634 + {0x0341, 0xac},
635 + {0x0344, 0x00},
636 + {0x0345, 0x00},
637 + {0x0346, 0x00},
638 + {0x0347, 0x00},
639 + {0x0348, 0x12},
640 + {0x0349, 0x2f},
641 + {0x034a, 0x0d},
642 + {0x034b, 0xa7},
643 + {0x0220, 0x00},
644 + {0x0221, 0x11},
645 + {0x0222, 0x01},
646 + {0x0900, 0x01},
647 + {0x0901, 0x22},
648 + {0x0902, 0x0a},
649 + {0x3f4c, 0x01},
650 + {0x3f4d, 0x01},
651 + {0x4254, 0x7f},
652 + {0x0401, 0x00},
653 + {0x0404, 0x00},
654 + {0x0405, 0x10},
655 + {0x0408, 0x00},
656 + {0x0409, 0x00},
657 + {0x040a, 0x00},
658 + {0x040b, 0x00},
659 + {0x040c, 0x09},
660 + {0x040d, 0x18},
661 + {0x040e, 0x06},
662 + {0x040f, 0xd4},
663 + {0x034c, 0x09},
664 + {0x034d, 0x18},
665 + {0x034e, 0x06},
666 + {0x034f, 0xd4},
667 + {0x0301, 0x06},
668 + {0x0303, 0x04},
669 + {0x0305, 0x04},
670 + {0x0306, 0x01},
671 + {0x0307, 0x57},
672 + {0x0309, 0x0a},
673 + {0x030b, 0x02},
674 + {0x030d, 0x04},
675 + {0x030e, 0x01},
676 + {0x030f, 0x49},
677 + {0x0310, 0x01},
678 + {0x0820, 0x07},
679 + {0x0821, 0xb6},
680 + {0x0822, 0x00},
681 + {0x0823, 0x00},
682 + {0x3e20, 0x01},
683 + {0x3e37, 0x00},
684 + {0x3e3b, 0x00},
685 + {0x0106, 0x00},
686 + {0x0b00, 0x00},
687 + {0x3230, 0x00},
688 + {0x3f14, 0x01},
689 + {0x3f3c, 0x01},
690 + {0x3f0d, 0x0a},
691 + {0x3fbc, 0x00},
692 + {0x3c06, 0x00},
693 + {0x3c07, 0x48},
694 + {0x3c0a, 0x00},
695 + {0x3c0b, 0x00},
696 + {0x3f78, 0x00},
697 + {0x3f79, 0x40},
698 + {0x3f7c, 0x00},
699 + {0x3f7d, 0x00},
700 +};
701 +
702 +/* 1080p 60fps mode */
703 +static const struct imx519_reg mode_1920x1080_regs[] = {
704 + {0x0111, 0x02},
705 + {0x0112, 0x0a},
706 + {0x0113, 0x0a},
707 + {0x0114, 0x01},
708 + {0x0342, 0x25},
709 + {0x0343, 0xd9},
710 + {0x0340, 0x04},
711 + {0x0341, 0x9c},
712 + {0x0344, 0x01},
713 + {0x0345, 0x98},
714 + {0x0346, 0x02},
715 + {0x0347, 0xa2},
716 + {0x0348, 0x10},
717 + {0x0349, 0x97},
718 + {0x034a, 0x0b},
719 + {0x034b, 0x15},
720 + {0x0220, 0x00},
721 + {0x0221, 0x11},
722 + {0x0222, 0x01},
723 + {0x0900, 0x01},
724 + {0x0901, 0x22},
725 + {0x0902, 0x0a},
726 + {0x3f4c, 0x01},
727 + {0x3f4d, 0x01},
728 + {0x4254, 0x7f},
729 + {0x0401, 0x00},
730 + {0x0404, 0x00},
731 + {0x0405, 0x10},
732 + {0x0408, 0x00},
733 + {0x0409, 0x00},
734 + {0x040a, 0x00},
735 + {0x040b, 0x00},
736 + {0x040c, 0x07},
737 + {0x040d, 0x80},
738 + {0x040e, 0x04},
739 + {0x040f, 0x38},
740 + {0x034c, 0x07},
741 + {0x034d, 0x80},
742 + {0x034e, 0x04},
743 + {0x034f, 0x38},
744 + {0x0301, 0x06},
745 + {0x0303, 0x04},
746 + {0x0305, 0x04},
747 + {0x0306, 0x01},
748 + {0x0307, 0x57},
749 + {0x0309, 0x0a},
750 + {0x030b, 0x02},
751 + {0x030d, 0x04},
752 + {0x030e, 0x01},
753 + {0x030f, 0x49},
754 + {0x0310, 0x01},
755 + {0x0820, 0x07},
756 + {0x0821, 0xb6},
757 + {0x0822, 0x00},
758 + {0x0823, 0x00},
759 + {0x3e20, 0x01},
760 + {0x3e37, 0x00},
761 + {0x3e3b, 0x00},
762 + {0x0106, 0x00},
763 + {0x0b00, 0x00},
764 + {0x3230, 0x00},
765 + {0x3f14, 0x01},
766 + {0x3f3c, 0x01},
767 + {0x3f0d, 0x0a},
768 + {0x3fbc, 0x00},
769 + {0x3c06, 0x00},
770 + {0x3c07, 0x48},
771 + {0x3c0a, 0x00},
772 + {0x3c0b, 0x00},
773 + {0x3f78, 0x00},
774 + {0x3f79, 0x40},
775 + {0x3f7c, 0x00},
776 + {0x3f7d, 0x00},
777 +};
778 +
779 +/* 720p 120fps mode */
780 +static const struct imx519_reg mode_1280x720_regs[] = {
781 + {0x0111, 0x02},
782 + {0x0112, 0x0a},
783 + {0x0113, 0x0a},
784 + {0x0114, 0x01},
785 + {0x0342, 0x1b},
786 + {0x0343, 0x3b},
787 + {0x0340, 0x03},
788 + {0x0341, 0x34},
789 + {0x0344, 0x04},
790 + {0x0345, 0x18},
791 + {0x0346, 0x04},
792 + {0x0347, 0x12},
793 + {0x0348, 0x0e},
794 + {0x0349, 0x17},
795 + {0x034a, 0x09},
796 + {0x034b, 0xb6},
797 + {0x0220, 0x00},
798 + {0x0221, 0x11},
799 + {0x0222, 0x01},
800 + {0x0900, 0x01},
801 + {0x0901, 0x22},
802 + {0x0902, 0x0a},
803 + {0x3f4c, 0x01},
804 + {0x3f4d, 0x01},
805 + {0x4254, 0x7f},
806 + {0x0401, 0x00},
807 + {0x0404, 0x00},
808 + {0x0405, 0x10},
809 + {0x0408, 0x00},
810 + {0x0409, 0x00},
811 + {0x040a, 0x00},
812 + {0x040b, 0x00},
813 + {0x040c, 0x05},
814 + {0x040d, 0x00},
815 + {0x040e, 0x02},
816 + {0x040f, 0xd0},
817 + {0x034c, 0x05},
818 + {0x034d, 0x00},
819 + {0x034e, 0x02},
820 + {0x034f, 0xd0},
821 + {0x0301, 0x06},
822 + {0x0303, 0x04},
823 + {0x0305, 0x04},
824 + {0x0306, 0x01},
825 + {0x0307, 0x57},
826 + {0x0309, 0x0a},
827 + {0x030b, 0x02},
828 + {0x030d, 0x04},
829 + {0x030e, 0x01},
830 + {0x030f, 0x49},
831 + {0x0310, 0x01},
832 + {0x0820, 0x07},
833 + {0x0821, 0xb6},
834 + {0x0822, 0x00},
835 + {0x0823, 0x00},
836 + {0x3e20, 0x01},
837 + {0x3e37, 0x00},
838 + {0x3e3b, 0x00},
839 + {0x0106, 0x00},
840 + {0x0b00, 0x00},
841 + {0x3230, 0x00},
842 + {0x3f14, 0x01},
843 + {0x3f3c, 0x01},
844 + {0x3f0d, 0x0a},
845 + {0x3fbc, 0x00},
846 + {0x3c06, 0x00},
847 + {0x3c07, 0x48},
848 + {0x3c0a, 0x00},
849 + {0x3c0b, 0x00},
850 + {0x3f78, 0x00},
851 + {0x3f79, 0x40},
852 + {0x3f7c, 0x00},
853 + {0x3f7d, 0x00},
854 +};
855 +
856 +/* Mode configs */
857 +static const struct imx519_mode supported_modes_10bit[] = {
858 + {
859 + .width = 4656,
860 + .height = 3496,
861 + .line_length_pix = 0x4200,
862 + .crop = {
863 + .left = IMX519_PIXEL_ARRAY_LEFT,
864 + .top = IMX519_PIXEL_ARRAY_TOP,
865 + .width = 4656,
866 + .height = 3496,
867 + },
868 + .timeperframe_min = {
869 + .numerator = 100,
870 + .denominator = 1000
871 + },
872 + .timeperframe_default = {
873 + .numerator = 100,
874 + .denominator = 1000
875 + },
876 + .reg_list = {
877 + .num_of_regs = ARRAY_SIZE(mode_4656x3496_regs),
878 + .regs = mode_4656x3496_regs,
879 + }
880 + },
881 + {
882 + .width = 3840,
883 + .height = 2160,
884 + .line_length_pix = 0x3870,
885 + .crop = {
886 + .left = IMX519_PIXEL_ARRAY_LEFT + 408,
887 + .top = IMX519_PIXEL_ARRAY_TOP + 672,
888 + .width = 3840,
889 + .height = 2160,
890 + },
891 + .timeperframe_min = {
892 + .numerator = 100,
893 + .denominator = 2100
894 + },
895 + .timeperframe_default = {
896 + .numerator = 100,
897 + .denominator = 2100
898 + },
899 + .reg_list = {
900 + .num_of_regs = ARRAY_SIZE(mode_3840x2160_regs),
901 + .regs = mode_3840x2160_regs,
902 + }
903 + },
904 + {
905 + .width = 2328,
906 + .height = 1748,
907 + .line_length_pix = 0x2412,
908 + .crop = {
909 + .left = IMX519_PIXEL_ARRAY_LEFT,
910 + .top = IMX519_PIXEL_ARRAY_TOP,
911 + .width = 4656,
912 + .height = 3496,
913 + },
914 + .timeperframe_min = {
915 + .numerator = 100,
916 + .denominator = 3000
917 + },
918 + .timeperframe_default = {
919 + .numerator = 100,
920 + .denominator = 3000
921 + },
922 + .reg_list = {
923 + .num_of_regs = ARRAY_SIZE(mode_2328x1748_regs),
924 + .regs = mode_2328x1748_regs,
925 + }
926 + },
927 + {
928 + .width = 1920,
929 + .height = 1080,
930 + .line_length_pix = 0x25D9,
931 + .crop = {
932 + .left = IMX519_PIXEL_ARRAY_LEFT + 408,
933 + .top = IMX519_PIXEL_ARRAY_TOP + 674,
934 + .width = 3840,
935 + .height = 2160,
936 + },
937 + .timeperframe_min = {
938 + .numerator = 100,
939 + .denominator = 6000
940 + },
941 + .timeperframe_default = {
942 + .numerator = 100,
943 + .denominator = 6000
944 + },
945 + .reg_list = {
946 + .num_of_regs = ARRAY_SIZE(mode_1920x1080_regs),
947 + .regs = mode_1920x1080_regs,
948 + }
949 + },
950 + {
951 + .width = 1280,
952 + .height = 720,
953 + .line_length_pix = 0x1B3B,
954 + .crop = {
955 + .left = IMX519_PIXEL_ARRAY_LEFT + 1048,
956 + .top = IMX519_PIXEL_ARRAY_TOP + 1042,
957 + .width = 2560,
958 + .height = 1440,
959 + },
960 + .timeperframe_min = {
961 + .numerator = 100,
962 + .denominator = 12000
963 + },
964 + .timeperframe_default = {
965 + .numerator = 100,
966 + .denominator = 12000
967 + },
968 + .reg_list = {
969 + .num_of_regs = ARRAY_SIZE(mode_1280x720_regs),
970 + .regs = mode_1280x720_regs,
971 + }
972 + }
973 +};
974 +
975 +/*
976 + * The supported formats.
977 + * This table MUST contain 4 entries per format, to cover the various flip
978 + * combinations in the order
979 + * - no flip
980 + * - h flip
981 + * - v flip
982 + * - h&v flips
983 + */
984 +static const u32 codes[] = {
985 + /* 10-bit modes. */
986 + MEDIA_BUS_FMT_SRGGB10_1X10,
987 + MEDIA_BUS_FMT_SGRBG10_1X10,
988 + MEDIA_BUS_FMT_SGBRG10_1X10,
989 + MEDIA_BUS_FMT_SBGGR10_1X10,
990 +};
991 +
992 +static const char * const imx519_test_pattern_menu[] = {
993 + "Disabled",
994 + "Color Bars",
995 + "Solid Color",
996 + "Grey Color Bars",
997 + "PN9"
998 +};
999 +
1000 +static const int imx519_test_pattern_val[] = {
1001 + IMX519_TEST_PATTERN_DISABLE,
1002 + IMX519_TEST_PATTERN_COLOR_BARS,
1003 + IMX519_TEST_PATTERN_SOLID_COLOR,
1004 + IMX519_TEST_PATTERN_GREY_COLOR,
1005 + IMX519_TEST_PATTERN_PN9,
1006 +};
1007 +
1008 +/* regulator supplies */
1009 +static const char * const imx519_supply_name[] = {
1010 + /* Supplies can be enabled in any order */
1011 + "VANA", /* Analog (2.8V) supply */
1012 + "VDIG", /* Digital Core (1.05V) supply */
1013 + "VDDL", /* IF (1.8V) supply */
1014 +};
1015 +
1016 +#define IMX519_NUM_SUPPLIES ARRAY_SIZE(imx519_supply_name)
1017 +
1018 +/*
1019 + * Initialisation delay between XCLR low->high and the moment when the sensor
1020 + * can start capture (i.e. can leave software standby), given by T7 in the
1021 + * datasheet is 8ms. This does include I2C setup time as well.
1022 + *
1023 + * Note, that delay between XCLR low->high and reading the CCI ID register (T6
1024 + * in the datasheet) is much smaller - 600us.
1025 + */
1026 +#define IMX519_XCLR_MIN_DELAY_US 8000
1027 +#define IMX519_XCLR_DELAY_RANGE_US 1000
1028 +
1029 +struct imx519 {
1030 + struct v4l2_subdev sd;
1031 + struct media_pad pad;
1032 +
1033 + unsigned int fmt_code;
1034 +
1035 + struct clk *xclk;
1036 +
1037 + struct gpio_desc *reset_gpio;
1038 + struct regulator_bulk_data supplies[IMX519_NUM_SUPPLIES];
1039 +
1040 + struct v4l2_ctrl_handler ctrl_handler;
1041 + /* V4L2 Controls */
1042 + struct v4l2_ctrl *pixel_rate;
1043 + struct v4l2_ctrl *exposure;
1044 + struct v4l2_ctrl *vflip;
1045 + struct v4l2_ctrl *hflip;
1046 + struct v4l2_ctrl *vblank;
1047 + struct v4l2_ctrl *hblank;
1048 +
1049 + /* Current mode */
1050 + const struct imx519_mode *mode;
1051 +
1052 + /*
1053 + * Mutex for serialized access:
1054 + * Protect sensor module set pad format and start/stop streaming safely.
1055 + */
1056 + struct mutex mutex;
1057 +
1058 + /* Streaming on/off */
1059 + bool streaming;
1060 +
1061 + /* Rewrite common registers on stream on? */
1062 + bool common_regs_written;
1063 +
1064 + /* Current long exposure factor in use. Set through V4L2_CID_VBLANK */
1065 + unsigned int long_exp_shift;
1066 +};
1067 +
1068 +static inline struct imx519 *to_imx519(struct v4l2_subdev *_sd)
1069 +{
1070 + return container_of(_sd, struct imx519, sd);
1071 +}
1072 +
1073 +/* Read registers up to 2 at a time */
1074 +static int imx519_read_reg(struct imx519 *imx519, u16 reg, u32 len, u32 *val)
1075 +{
1076 + struct i2c_client *client = v4l2_get_subdevdata(&imx519->sd);
1077 + struct i2c_msg msgs[2];
1078 + u8 addr_buf[2] = { reg >> 8, reg & 0xff };
1079 + u8 data_buf[4] = { 0, };
1080 + int ret;
1081 +
1082 + if (len > 4)
1083 + return -EINVAL;
1084 +
1085 + /* Write register address */
1086 + msgs[0].addr = client->addr;
1087 + msgs[0].flags = 0;
1088 + msgs[0].len = ARRAY_SIZE(addr_buf);
1089 + msgs[0].buf = addr_buf;
1090 +
1091 + /* Read data from register */
1092 + msgs[1].addr = client->addr;
1093 + msgs[1].flags = I2C_M_RD;
1094 + msgs[1].len = len;
1095 + msgs[1].buf = &data_buf[4 - len];
1096 +
1097 + ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
1098 + if (ret != ARRAY_SIZE(msgs))
1099 + return -EIO;
1100 +
1101 + *val = get_unaligned_be32(data_buf);
1102 +
1103 + return 0;
1104 +}
1105 +
1106 +/* Write registers up to 2 at a time */
1107 +static int imx519_write_reg(struct imx519 *imx519, u16 reg, u32 len, u32 val)
1108 +{
1109 + struct i2c_client *client = v4l2_get_subdevdata(&imx519->sd);
1110 + u8 buf[6];
1111 +
1112 + if (len > 4)
1113 + return -EINVAL;
1114 +
1115 + put_unaligned_be16(reg, buf);
1116 + put_unaligned_be32(val << (8 * (4 - len)), buf + 2);
1117 + if (i2c_master_send(client, buf, len + 2) != len + 2)
1118 + return -EIO;
1119 +
1120 + return 0;
1121 +}
1122 +
1123 +/* Write a list of registers */
1124 +static int imx519_write_regs(struct imx519 *imx519,
1125 + const struct imx519_reg *regs, u32 len)
1126 +{
1127 + struct i2c_client *client = v4l2_get_subdevdata(&imx519->sd);
1128 + unsigned int i;
1129 + int ret;
1130 +
1131 + for (i = 0; i < len; i++) {
1132 + ret = imx519_write_reg(imx519, regs[i].address, 1, regs[i].val);
1133 + if (ret) {
1134 + dev_err_ratelimited(&client->dev,
1135 + "Failed to write reg 0x%4.4x. error = %d\n",
1136 + regs[i].address, ret);
1137 +
1138 + return ret;
1139 + }
1140 + }
1141 +
1142 + return 0;
1143 +}
1144 +
1145 +/* Get bayer order based on flip setting. */
1146 +static u32 imx519_get_format_code(struct imx519 *imx519)
1147 +{
1148 + unsigned int i;
1149 +
1150 + lockdep_assert_held(&imx519->mutex);
1151 +
1152 + i = (imx519->vflip->val ? 2 : 0) |
1153 + (imx519->hflip->val ? 1 : 0);
1154 +
1155 + return codes[i];
1156 +}
1157 +
1158 +static int imx519_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
1159 +{
1160 + struct imx519 *imx519 = to_imx519(sd);
1161 + struct v4l2_mbus_framefmt *try_fmt_img =
1162 + v4l2_subdev_get_try_format(sd, fh->state, 0);
1163 + struct v4l2_rect *try_crop;
1164 +
1165 + mutex_lock(&imx519->mutex);
1166 +
1167 + /* Initialize try_fmt for the image pad */
1168 + try_fmt_img->width = supported_modes_10bit[0].width;
1169 + try_fmt_img->height = supported_modes_10bit[0].height;
1170 + try_fmt_img->code = imx519_get_format_code(imx519);
1171 + try_fmt_img->field = V4L2_FIELD_NONE;
1172 +
1173 + /* Initialize try_crop */
1174 + try_crop = v4l2_subdev_get_try_crop(sd, fh->state, 0);
1175 + try_crop->left = IMX519_PIXEL_ARRAY_LEFT;
1176 + try_crop->top = IMX519_PIXEL_ARRAY_TOP;
1177 + try_crop->width = IMX519_PIXEL_ARRAY_WIDTH;
1178 + try_crop->height = IMX519_PIXEL_ARRAY_HEIGHT;
1179 +
1180 + mutex_unlock(&imx519->mutex);
1181 +
1182 + return 0;
1183 +}
1184 +
1185 +static void imx519_adjust_exposure_range(struct imx519 *imx519)
1186 +{
1187 + int exposure_max, exposure_def;
1188 +
1189 + /* Honour the VBLANK limits when setting exposure. */
1190 + exposure_max = imx519->mode->height + imx519->vblank->val -
1191 + IMX519_EXPOSURE_OFFSET;
1192 + exposure_def = min(exposure_max, imx519->exposure->val);
1193 + __v4l2_ctrl_modify_range(imx519->exposure, imx519->exposure->minimum,
1194 + exposure_max, imx519->exposure->step,
1195 + exposure_def);
1196 +}
1197 +
1198 +static int imx519_set_frame_length(struct imx519 *imx519, unsigned int val)
1199 +{
1200 + int ret = 0;
1201 +
1202 + imx519->long_exp_shift = 0;
1203 +
1204 + while (val > IMX519_FRAME_LENGTH_MAX) {
1205 + imx519->long_exp_shift++;
1206 + val >>= 1;
1207 + }
1208 +
1209 + ret = imx519_write_reg(imx519, IMX519_REG_FRAME_LENGTH,
1210 + IMX519_REG_VALUE_16BIT, val);
1211 + if (ret)
1212 + return ret;
1213 +
1214 + return imx519_write_reg(imx519, IMX519_LONG_EXP_SHIFT_REG,
1215 + IMX519_REG_VALUE_08BIT, imx519->long_exp_shift);
1216 +}
1217 +
1218 +static int imx519_set_ctrl(struct v4l2_ctrl *ctrl)
1219 +{
1220 + struct imx519 *imx519 =
1221 + container_of(ctrl->handler, struct imx519, ctrl_handler);
1222 + struct i2c_client *client = v4l2_get_subdevdata(&imx519->sd);
1223 + int ret = 0;
1224 +
1225 + /*
1226 + * The VBLANK control may change the limits of usable exposure, so check
1227 + * and adjust if necessary.
1228 + */
1229 + if (ctrl->id == V4L2_CID_VBLANK)
1230 + imx519_adjust_exposure_range(imx519);
1231 +
1232 + /*
1233 + * Applying V4L2 control value only happens
1234 + * when power is up for streaming
1235 + */
1236 + if (pm_runtime_get_if_in_use(&client->dev) == 0)
1237 + return 0;
1238 +
1239 + switch (ctrl->id) {
1240 + case V4L2_CID_ANALOGUE_GAIN:
1241 + ret = imx519_write_reg(imx519, IMX519_REG_ANALOG_GAIN,
1242 + IMX519_REG_VALUE_16BIT, ctrl->val);
1243 + break;
1244 + case V4L2_CID_EXPOSURE:
1245 + ret = imx519_write_reg(imx519, IMX519_REG_EXPOSURE,
1246 + IMX519_REG_VALUE_16BIT, ctrl->val >>
1247 + imx519->long_exp_shift);
1248 + break;
1249 + case V4L2_CID_DIGITAL_GAIN:
1250 + ret = imx519_write_reg(imx519, IMX519_REG_DIGITAL_GAIN,
1251 + IMX519_REG_VALUE_16BIT, ctrl->val);
1252 + break;
1253 + case V4L2_CID_TEST_PATTERN:
1254 + ret = imx519_write_reg(imx519, IMX519_REG_TEST_PATTERN,
1255 + IMX519_REG_VALUE_16BIT,
1256 + imx519_test_pattern_val[ctrl->val]);
1257 + break;
1258 + case V4L2_CID_TEST_PATTERN_RED:
1259 + ret = imx519_write_reg(imx519, IMX519_REG_TEST_PATTERN_R,
1260 + IMX519_REG_VALUE_16BIT, ctrl->val);
1261 + break;
1262 + case V4L2_CID_TEST_PATTERN_GREENR:
1263 + ret = imx519_write_reg(imx519, IMX519_REG_TEST_PATTERN_GR,
1264 + IMX519_REG_VALUE_16BIT, ctrl->val);
1265 + break;
1266 + case V4L2_CID_TEST_PATTERN_BLUE:
1267 + ret = imx519_write_reg(imx519, IMX519_REG_TEST_PATTERN_B,
1268 + IMX519_REG_VALUE_16BIT, ctrl->val);
1269 + break;
1270 + case V4L2_CID_TEST_PATTERN_GREENB:
1271 + ret = imx519_write_reg(imx519, IMX519_REG_TEST_PATTERN_GB,
1272 + IMX519_REG_VALUE_16BIT, ctrl->val);
1273 + break;
1274 + case V4L2_CID_HFLIP:
1275 + case V4L2_CID_VFLIP:
1276 + ret = imx519_write_reg(imx519, IMX519_REG_ORIENTATION, 1,
1277 + imx519->hflip->val |
1278 + imx519->vflip->val << 1);
1279 + break;
1280 + case V4L2_CID_VBLANK:
1281 + ret = imx519_set_frame_length(imx519,
1282 + imx519->mode->height + ctrl->val);
1283 + break;
1284 + default:
1285 + dev_info(&client->dev,
1286 + "ctrl(id:0x%x,val:0x%x) is not handled\n",
1287 + ctrl->id, ctrl->val);
1288 + ret = -EINVAL;
1289 + break;
1290 + }
1291 +
1292 + pm_runtime_put(&client->dev);
1293 +
1294 + return ret;
1295 +}
1296 +
1297 +static const struct v4l2_ctrl_ops imx519_ctrl_ops = {
1298 + .s_ctrl = imx519_set_ctrl,
1299 +};
1300 +
1301 +static int imx519_enum_mbus_code(struct v4l2_subdev *sd,
1302 + struct v4l2_subdev_state *sd_state,
1303 + struct v4l2_subdev_mbus_code_enum *code)
1304 +{
1305 + struct imx519 *imx519 = to_imx519(sd);
1306 +
1307 + if (code->index > 0)
1308 + return -EINVAL;
1309 +
1310 + code->code = imx519_get_format_code(imx519);
1311 +
1312 + return 0;
1313 +}
1314 +
1315 +static int imx519_enum_frame_size(struct v4l2_subdev *sd,
1316 + struct v4l2_subdev_state *sd_state,
1317 + struct v4l2_subdev_frame_size_enum *fse)
1318 +{
1319 + struct imx519 *imx519 = to_imx519(sd);
1320 +
1321 + if (fse->index >= ARRAY_SIZE(supported_modes_10bit))
1322 + return -EINVAL;
1323 +
1324 + if (fse->code != imx519_get_format_code(imx519))
1325 + return -EINVAL;
1326 +
1327 + fse->min_width = supported_modes_10bit[fse->index].width;
1328 + fse->max_width = fse->min_width;
1329 + fse->min_height = supported_modes_10bit[fse->index].height;
1330 + fse->max_height = fse->min_height;
1331 +
1332 + return 0;
1333 +}
1334 +
1335 +static void imx519_reset_colorspace(struct v4l2_mbus_framefmt *fmt)
1336 +{
1337 + fmt->colorspace = V4L2_COLORSPACE_SRGB;
1338 + fmt->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(fmt->colorspace);
1339 + fmt->quantization = V4L2_MAP_QUANTIZATION_DEFAULT(true,
1340 + fmt->colorspace,
1341 + fmt->ycbcr_enc);
1342 + fmt->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(fmt->colorspace);
1343 +}
1344 +
1345 +static void imx519_update_image_pad_format(struct imx519 *imx519,
1346 + const struct imx519_mode *mode,
1347 + struct v4l2_subdev_format *fmt)
1348 +{
1349 + fmt->format.width = mode->width;
1350 + fmt->format.height = mode->height;
1351 + fmt->format.field = V4L2_FIELD_NONE;
1352 + imx519_reset_colorspace(&fmt->format);
1353 +}
1354 +
1355 +static int imx519_get_pad_format(struct v4l2_subdev *sd,
1356 + struct v4l2_subdev_state *sd_state,
1357 + struct v4l2_subdev_format *fmt)
1358 +{
1359 + struct imx519 *imx519 = to_imx519(sd);
1360 +
1361 + if (fmt->pad != 0)
1362 + return -EINVAL;
1363 +
1364 + mutex_lock(&imx519->mutex);
1365 +
1366 + if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
1367 + struct v4l2_mbus_framefmt *try_fmt =
1368 + v4l2_subdev_get_try_format(&imx519->sd, sd_state,
1369 + fmt->pad);
1370 + /* update the code which could change due to vflip or hflip: */
1371 + try_fmt->code = imx519_get_format_code(imx519);
1372 + fmt->format = *try_fmt;
1373 + } else {
1374 + imx519_update_image_pad_format(imx519, imx519->mode,
1375 + fmt);
1376 + fmt->format.code = imx519_get_format_code(imx519);
1377 + }
1378 +
1379 + mutex_unlock(&imx519->mutex);
1380 + return 0;
1381 +}
1382 +
1383 +static
1384 +unsigned int imx519_get_frame_length(const struct imx519_mode *mode,
1385 + const struct v4l2_fract *timeperframe)
1386 +{
1387 + u64 frame_length;
1388 +
1389 + frame_length = (u64)timeperframe->numerator * IMX519_PIXEL_RATE;
1390 + do_div(frame_length,
1391 + (u64)timeperframe->denominator * mode->line_length_pix);
1392 +
1393 + if (WARN_ON(frame_length > IMX519_FRAME_LENGTH_MAX))
1394 + frame_length = IMX519_FRAME_LENGTH_MAX;
1395 +
1396 + return max_t(unsigned int, frame_length, mode->height);
1397 +}
1398 +
1399 +static void imx519_set_framing_limits(struct imx519 *imx519)
1400 +{
1401 + unsigned int frm_length_min, frm_length_default, hblank;
1402 + const struct imx519_mode *mode = imx519->mode;
1403 +
1404 + frm_length_min = imx519_get_frame_length(mode, &mode->timeperframe_min);
1405 + frm_length_default =
1406 + imx519_get_frame_length(mode, &mode->timeperframe_default);
1407 +
1408 + /* Default to no long exposure multiplier. */
1409 + imx519->long_exp_shift = 0;
1410 +
1411 + /* Update limits and set FPS to default */
1412 + __v4l2_ctrl_modify_range(imx519->vblank, frm_length_min - mode->height,
1413 + ((1 << IMX519_LONG_EXP_SHIFT_MAX) *
1414 + IMX519_FRAME_LENGTH_MAX) - mode->height,
1415 + 1, frm_length_default - mode->height);
1416 +
1417 + /* Setting this will adjust the exposure limits as well. */
1418 + __v4l2_ctrl_s_ctrl(imx519->vblank, frm_length_default - mode->height);
1419 +
1420 + /*
1421 + * Currently PPL is fixed to the mode specified value, so hblank
1422 + * depends on mode->width only, and is not changeable in any
1423 + * way other than changing the mode.
1424 + */
1425 + hblank = mode->line_length_pix - mode->width;
1426 + __v4l2_ctrl_modify_range(imx519->hblank, hblank, hblank, 1, hblank);
1427 +}
1428 +
1429 +static int imx519_set_pad_format(struct v4l2_subdev *sd,
1430 + struct v4l2_subdev_state *sd_state,
1431 + struct v4l2_subdev_format *fmt)
1432 +{
1433 + struct v4l2_mbus_framefmt *framefmt;
1434 + const struct imx519_mode *mode;
1435 + struct imx519 *imx519 = to_imx519(sd);
1436 +
1437 + if (fmt->pad != 0)
1438 + return -EINVAL;
1439 +
1440 + mutex_lock(&imx519->mutex);
1441 +
1442 + /* Bayer order varies with flips */
1443 + fmt->format.code = imx519_get_format_code(imx519);
1444 +
1445 + mode = v4l2_find_nearest_size(supported_modes_10bit,
1446 + ARRAY_SIZE(supported_modes_10bit),
1447 + width, height,
1448 + fmt->format.width,
1449 + fmt->format.height);
1450 + imx519_update_image_pad_format(imx519, mode, fmt);
1451 + if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
1452 + framefmt = v4l2_subdev_get_try_format(sd, sd_state,
1453 + fmt->pad);
1454 + *framefmt = fmt->format;
1455 + } else {
1456 + imx519->mode = mode;
1457 + imx519->fmt_code = fmt->format.code;
1458 + imx519_set_framing_limits(imx519);
1459 + }
1460 +
1461 + mutex_unlock(&imx519->mutex);
1462 +
1463 + return 0;
1464 +}
1465 +
1466 +static const struct v4l2_rect *
1467 +__imx519_get_pad_crop(struct imx519 *imx519, struct v4l2_subdev_state *sd_state,
1468 + unsigned int pad, enum v4l2_subdev_format_whence which)
1469 +{
1470 + switch (which) {
1471 + case V4L2_SUBDEV_FORMAT_TRY:
1472 + return v4l2_subdev_get_try_crop(&imx519->sd, sd_state, pad);
1473 + case V4L2_SUBDEV_FORMAT_ACTIVE:
1474 + return &imx519->mode->crop;
1475 + }
1476 +
1477 + return NULL;
1478 +}
1479 +
1480 +static int imx519_get_selection(struct v4l2_subdev *sd,
1481 + struct v4l2_subdev_state *sd_state,
1482 + struct v4l2_subdev_selection *sel)
1483 +{
1484 + switch (sel->target) {
1485 + case V4L2_SEL_TGT_CROP: {
1486 + struct imx519 *imx519 = to_imx519(sd);
1487 +
1488 + mutex_lock(&imx519->mutex);
1489 + sel->r = *__imx519_get_pad_crop(imx519, sd_state, sel->pad,
1490 + sel->which);
1491 + mutex_unlock(&imx519->mutex);
1492 +
1493 + return 0;
1494 + }
1495 +
1496 + case V4L2_SEL_TGT_NATIVE_SIZE:
1497 + sel->r.left = 0;
1498 + sel->r.top = 0;
1499 + sel->r.width = IMX519_NATIVE_WIDTH;
1500 + sel->r.height = IMX519_NATIVE_HEIGHT;
1501 +
1502 + return 0;
1503 +
1504 + case V4L2_SEL_TGT_CROP_DEFAULT:
1505 + case V4L2_SEL_TGT_CROP_BOUNDS:
1506 + sel->r.left = IMX519_PIXEL_ARRAY_LEFT;
1507 + sel->r.top = IMX519_PIXEL_ARRAY_TOP;
1508 + sel->r.width = IMX519_PIXEL_ARRAY_WIDTH;
1509 + sel->r.height = IMX519_PIXEL_ARRAY_HEIGHT;
1510 +
1511 + return 0;
1512 + }
1513 +
1514 + return -EINVAL;
1515 +}
1516 +
1517 +/* Start streaming */
1518 +static int imx519_start_streaming(struct imx519 *imx519)
1519 +{
1520 + struct i2c_client *client = v4l2_get_subdevdata(&imx519->sd);
1521 + const struct imx519_reg_list *reg_list;
1522 + int ret;
1523 +
1524 + if (!imx519->common_regs_written) {
1525 + ret = imx519_write_regs(imx519, mode_common_regs,
1526 + ARRAY_SIZE(mode_common_regs));
1527 +
1528 + if (ret) {
1529 + dev_err(&client->dev, "%s failed to set common settings\n",
1530 + __func__);
1531 + return ret;
1532 + }
1533 + imx519->common_regs_written = true;
1534 + }
1535 +
1536 + /* Apply default values of current mode */
1537 + reg_list = &imx519->mode->reg_list;
1538 + ret = imx519_write_regs(imx519, reg_list->regs, reg_list->num_of_regs);
1539 + if (ret) {
1540 + dev_err(&client->dev, "%s failed to set mode\n", __func__);
1541 + return ret;
1542 + }
1543 +
1544 + /* Apply customized values from user */
1545 + ret = __v4l2_ctrl_handler_setup(imx519->sd.ctrl_handler);
1546 + if (ret)
1547 + return ret;
1548 +
1549 + /* set stream on register */
1550 + return imx519_write_reg(imx519, IMX519_REG_MODE_SELECT,
1551 + IMX519_REG_VALUE_08BIT, IMX519_MODE_STREAMING);
1552 +}
1553 +
1554 +/* Stop streaming */
1555 +static void imx519_stop_streaming(struct imx519 *imx519)
1556 +{
1557 + struct i2c_client *client = v4l2_get_subdevdata(&imx519->sd);
1558 + int ret;
1559 +
1560 + /* set stream off register */
1561 + ret = imx519_write_reg(imx519, IMX519_REG_MODE_SELECT,
1562 + IMX519_REG_VALUE_08BIT, IMX519_MODE_STANDBY);
1563 + if (ret)
1564 + dev_err(&client->dev, "%s failed to set stream\n", __func__);
1565 +}
1566 +
1567 +static int imx519_set_stream(struct v4l2_subdev *sd, int enable)
1568 +{
1569 + struct imx519 *imx519 = to_imx519(sd);
1570 + struct i2c_client *client = v4l2_get_subdevdata(sd);
1571 + int ret = 0;
1572 +
1573 + mutex_lock(&imx519->mutex);
1574 + if (imx519->streaming == enable) {
1575 + mutex_unlock(&imx519->mutex);
1576 + return 0;
1577 + }
1578 +
1579 + if (enable) {
1580 + ret = pm_runtime_get_sync(&client->dev);
1581 + if (ret < 0) {
1582 + pm_runtime_put_noidle(&client->dev);
1583 + goto err_unlock;
1584 + }
1585 +
1586 + /*
1587 + * Apply default & customized values
1588 + * and then start streaming.
1589 + */
1590 + ret = imx519_start_streaming(imx519);
1591 + if (ret)
1592 + goto err_rpm_put;
1593 + } else {
1594 + imx519_stop_streaming(imx519);
1595 + pm_runtime_put(&client->dev);
1596 + }
1597 +
1598 + imx519->streaming = enable;
1599 +
1600 + /* vflip and hflip cannot change during streaming */
1601 + __v4l2_ctrl_grab(imx519->vflip, enable);
1602 + __v4l2_ctrl_grab(imx519->hflip, enable);
1603 +
1604 + mutex_unlock(&imx519->mutex);
1605 +
1606 + return ret;
1607 +
1608 +err_rpm_put:
1609 + pm_runtime_put(&client->dev);
1610 +err_unlock:
1611 + mutex_unlock(&imx519->mutex);
1612 +
1613 + return ret;
1614 +}
1615 +
1616 +/* Power/clock management functions */
1617 +static int imx519_power_on(struct device *dev)
1618 +{
1619 + struct i2c_client *client = to_i2c_client(dev);
1620 + struct v4l2_subdev *sd = i2c_get_clientdata(client);
1621 + struct imx519 *imx519 = to_imx519(sd);
1622 + int ret;
1623 +
1624 + ret = regulator_bulk_enable(IMX519_NUM_SUPPLIES,
1625 + imx519->supplies);
1626 + if (ret) {
1627 + dev_err(&client->dev, "%s: failed to enable regulators\n",
1628 + __func__);
1629 + return ret;
1630 + }
1631 +
1632 + ret = clk_prepare_enable(imx519->xclk);
1633 + if (ret) {
1634 + dev_err(&client->dev, "%s: failed to enable clock\n",
1635 + __func__);
1636 + goto reg_off;
1637 + }
1638 +
1639 + gpiod_set_value_cansleep(imx519->reset_gpio, 1);
1640 + usleep_range(IMX519_XCLR_MIN_DELAY_US,
1641 + IMX519_XCLR_MIN_DELAY_US + IMX519_XCLR_DELAY_RANGE_US);
1642 +
1643 + return 0;
1644 +
1645 +reg_off:
1646 + regulator_bulk_disable(IMX519_NUM_SUPPLIES, imx519->supplies);
1647 + return ret;
1648 +}
1649 +
1650 +static int imx519_power_off(struct device *dev)
1651 +{
1652 + struct i2c_client *client = to_i2c_client(dev);
1653 + struct v4l2_subdev *sd = i2c_get_clientdata(client);
1654 + struct imx519 *imx519 = to_imx519(sd);
1655 +
1656 + gpiod_set_value_cansleep(imx519->reset_gpio, 0);
1657 + regulator_bulk_disable(IMX519_NUM_SUPPLIES, imx519->supplies);
1658 + clk_disable_unprepare(imx519->xclk);
1659 +
1660 + /* Force reprogramming of the common registers when powered up again. */
1661 + imx519->common_regs_written = false;
1662 +
1663 + return 0;
1664 +}
1665 +
1666 +static int __maybe_unused imx519_suspend(struct device *dev)
1667 +{
1668 + struct i2c_client *client = to_i2c_client(dev);
1669 + struct v4l2_subdev *sd = i2c_get_clientdata(client);
1670 + struct imx519 *imx519 = to_imx519(sd);
1671 +
1672 + if (imx519->streaming)
1673 + imx519_stop_streaming(imx519);
1674 +
1675 + return 0;
1676 +}
1677 +
1678 +static int __maybe_unused imx519_resume(struct device *dev)
1679 +{
1680 + struct i2c_client *client = to_i2c_client(dev);
1681 + struct v4l2_subdev *sd = i2c_get_clientdata(client);
1682 + struct imx519 *imx519 = to_imx519(sd);
1683 + int ret;
1684 +
1685 + if (imx519->streaming) {
1686 + ret = imx519_start_streaming(imx519);
1687 + if (ret)
1688 + goto error;
1689 + }
1690 +
1691 + return 0;
1692 +
1693 +error:
1694 + imx519_stop_streaming(imx519);
1695 + imx519->streaming = 0;
1696 + return ret;
1697 +}
1698 +
1699 +static int imx519_get_regulators(struct imx519 *imx519)
1700 +{
1701 + struct i2c_client *client = v4l2_get_subdevdata(&imx519->sd);
1702 + unsigned int i;
1703 +
1704 + for (i = 0; i < IMX519_NUM_SUPPLIES; i++)
1705 + imx519->supplies[i].supply = imx519_supply_name[i];
1706 +
1707 + return devm_regulator_bulk_get(&client->dev,
1708 + IMX519_NUM_SUPPLIES,
1709 + imx519->supplies);
1710 +}
1711 +
1712 +/* Verify chip ID */
1713 +static int imx519_identify_module(struct imx519 *imx519, u32 expected_id)
1714 +{
1715 + struct i2c_client *client = v4l2_get_subdevdata(&imx519->sd);
1716 + int ret;
1717 + u32 val;
1718 +
1719 + ret = imx519_read_reg(imx519, IMX519_REG_CHIP_ID,
1720 + IMX519_REG_VALUE_16BIT, &val);
1721 + if (ret) {
1722 + dev_err(&client->dev, "failed to read chip id %x, with error %d\n",
1723 + expected_id, ret);
1724 + return ret;
1725 + }
1726 +
1727 + if (val != expected_id) {
1728 + dev_err(&client->dev, "chip id mismatch: %x!=%x\n",
1729 + expected_id, val);
1730 + return -EIO;
1731 + }
1732 +
1733 + dev_info(&client->dev, "Device found is imx%x\n", val);
1734 +
1735 + return 0;
1736 +}
1737 +
1738 +static const struct v4l2_subdev_core_ops imx519_core_ops = {
1739 + .subscribe_event = v4l2_ctrl_subdev_subscribe_event,
1740 + .unsubscribe_event = v4l2_event_subdev_unsubscribe,
1741 +};
1742 +
1743 +static const struct v4l2_subdev_video_ops imx519_video_ops = {
1744 + .s_stream = imx519_set_stream,
1745 +};
1746 +
1747 +static const struct v4l2_subdev_pad_ops imx519_pad_ops = {
1748 + .enum_mbus_code = imx519_enum_mbus_code,
1749 + .get_fmt = imx519_get_pad_format,
1750 + .set_fmt = imx519_set_pad_format,
1751 + .get_selection = imx519_get_selection,
1752 + .enum_frame_size = imx519_enum_frame_size,
1753 +};
1754 +
1755 +static const struct v4l2_subdev_ops imx519_subdev_ops = {
1756 + .core = &imx519_core_ops,
1757 + .video = &imx519_video_ops,
1758 + .pad = &imx519_pad_ops,
1759 +};
1760 +
1761 +static const struct v4l2_subdev_internal_ops imx519_internal_ops = {
1762 + .open = imx519_open,
1763 +};
1764 +
1765 +/* Initialize control handlers */
1766 +static int imx519_init_controls(struct imx519 *imx519)
1767 +{
1768 + struct v4l2_ctrl_handler *ctrl_hdlr;
1769 + struct i2c_client *client = v4l2_get_subdevdata(&imx519->sd);
1770 + struct v4l2_fwnode_device_properties props;
1771 + unsigned int i;
1772 + int ret;
1773 +
1774 + ctrl_hdlr = &imx519->ctrl_handler;
1775 + ret = v4l2_ctrl_handler_init(ctrl_hdlr, 16);
1776 + if (ret)
1777 + return ret;
1778 +
1779 + mutex_init(&imx519->mutex);
1780 + ctrl_hdlr->lock = &imx519->mutex;
1781 +
1782 + /* By default, PIXEL_RATE is read only */
1783 + imx519->pixel_rate = v4l2_ctrl_new_std(ctrl_hdlr, &imx519_ctrl_ops,
1784 + V4L2_CID_PIXEL_RATE,
1785 + IMX519_PIXEL_RATE,
1786 + IMX519_PIXEL_RATE, 1,
1787 + IMX519_PIXEL_RATE);
1788 +
1789 + /*
1790 + * Create the controls here, but mode specific limits are setup
1791 + * in the imx519_set_framing_limits() call below.
1792 + */
1793 + imx519->vblank = v4l2_ctrl_new_std(ctrl_hdlr, &imx519_ctrl_ops,
1794 + V4L2_CID_VBLANK, 0, 0xffff, 1, 0);
1795 + imx519->hblank = v4l2_ctrl_new_std(ctrl_hdlr, &imx519_ctrl_ops,
1796 + V4L2_CID_HBLANK, 0, 0xffff, 1, 0);
1797 +
1798 + /* HBLANK is read-only for now, but does change with mode. */
1799 + if (imx519->hblank)
1800 + imx519->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1801 +
1802 + imx519->exposure = v4l2_ctrl_new_std(ctrl_hdlr, &imx519_ctrl_ops,
1803 + V4L2_CID_EXPOSURE,
1804 + IMX519_EXPOSURE_MIN,
1805 + IMX519_EXPOSURE_MAX,
1806 + IMX519_EXPOSURE_STEP,
1807 + IMX519_EXPOSURE_DEFAULT);
1808 +
1809 + v4l2_ctrl_new_std(ctrl_hdlr, &imx519_ctrl_ops, V4L2_CID_ANALOGUE_GAIN,
1810 + IMX519_ANA_GAIN_MIN, IMX519_ANA_GAIN_MAX,
1811 + IMX519_ANA_GAIN_STEP, IMX519_ANA_GAIN_DEFAULT);
1812 +
1813 + v4l2_ctrl_new_std(ctrl_hdlr, &imx519_ctrl_ops, V4L2_CID_DIGITAL_GAIN,
1814 + IMX519_DGTL_GAIN_MIN, IMX519_DGTL_GAIN_MAX,
1815 + IMX519_DGTL_GAIN_STEP, IMX519_DGTL_GAIN_DEFAULT);
1816 +
1817 + imx519->hflip = v4l2_ctrl_new_std(ctrl_hdlr, &imx519_ctrl_ops,
1818 + V4L2_CID_HFLIP, 0, 1, 1, 0);
1819 + if (imx519->hflip)
1820 + imx519->hflip->flags |= V4L2_CTRL_FLAG_MODIFY_LAYOUT;
1821 +
1822 + imx519->vflip = v4l2_ctrl_new_std(ctrl_hdlr, &imx519_ctrl_ops,
1823 + V4L2_CID_VFLIP, 0, 1, 1, 0);
1824 + if (imx519->vflip)
1825 + imx519->vflip->flags |= V4L2_CTRL_FLAG_MODIFY_LAYOUT;
1826 +
1827 + v4l2_ctrl_new_std_menu_items(ctrl_hdlr, &imx519_ctrl_ops,
1828 + V4L2_CID_TEST_PATTERN,
1829 + ARRAY_SIZE(imx519_test_pattern_menu) - 1,
1830 + 0, 0, imx519_test_pattern_menu);
1831 + for (i = 0; i < 4; i++) {
1832 + /*
1833 + * The assumption is that
1834 + * V4L2_CID_TEST_PATTERN_GREENR == V4L2_CID_TEST_PATTERN_RED + 1
1835 + * V4L2_CID_TEST_PATTERN_BLUE == V4L2_CID_TEST_PATTERN_RED + 2
1836 + * V4L2_CID_TEST_PATTERN_GREENB == V4L2_CID_TEST_PATTERN_RED + 3
1837 + */
1838 + v4l2_ctrl_new_std(ctrl_hdlr, &imx519_ctrl_ops,
1839 + V4L2_CID_TEST_PATTERN_RED + i,
1840 + IMX519_TEST_PATTERN_COLOUR_MIN,
1841 + IMX519_TEST_PATTERN_COLOUR_MAX,
1842 + IMX519_TEST_PATTERN_COLOUR_STEP,
1843 + IMX519_TEST_PATTERN_COLOUR_MAX);
1844 + /* The "Solid color" pattern is white by default */
1845 + }
1846 +
1847 + if (ctrl_hdlr->error) {
1848 + ret = ctrl_hdlr->error;
1849 + dev_err(&client->dev, "%s control init failed (%d)\n",
1850 + __func__, ret);
1851 + goto error;
1852 + }
1853 +
1854 + ret = v4l2_fwnode_device_parse(&client->dev, &props);
1855 + if (ret)
1856 + goto error;
1857 +
1858 + ret = v4l2_ctrl_new_fwnode_properties(ctrl_hdlr, &imx519_ctrl_ops,
1859 + &props);
1860 + if (ret)
1861 + goto error;
1862 +
1863 + imx519->sd.ctrl_handler = ctrl_hdlr;
1864 +
1865 + /* Setup exposure and frame/line length limits. */
1866 + imx519_set_framing_limits(imx519);
1867 +
1868 + return 0;
1869 +
1870 +error:
1871 + v4l2_ctrl_handler_free(ctrl_hdlr);
1872 + mutex_destroy(&imx519->mutex);
1873 +
1874 + return ret;
1875 +}
1876 +
1877 +static void imx519_free_controls(struct imx519 *imx519)
1878 +{
1879 + v4l2_ctrl_handler_free(imx519->sd.ctrl_handler);
1880 + mutex_destroy(&imx519->mutex);
1881 +}
1882 +
1883 +static int imx519_check_hwcfg(struct device *dev)
1884 +{
1885 + struct fwnode_handle *endpoint;
1886 + struct v4l2_fwnode_endpoint ep_cfg = {
1887 + .bus_type = V4L2_MBUS_CSI2_DPHY
1888 + };
1889 + int ret = -EINVAL;
1890 +
1891 + endpoint = fwnode_graph_get_next_endpoint(dev_fwnode(dev), NULL);
1892 + if (!endpoint) {
1893 + dev_err(dev, "endpoint node not found\n");
1894 + return -EINVAL;
1895 + }
1896 +
1897 + if (v4l2_fwnode_endpoint_alloc_parse(endpoint, &ep_cfg)) {
1898 + dev_err(dev, "could not parse endpoint\n");
1899 + goto error_out;
1900 + }
1901 +
1902 + /* Check the number of MIPI CSI2 data lanes */
1903 + if (ep_cfg.bus.mipi_csi2.num_data_lanes != 2) {
1904 + dev_err(dev, "only 2 data lanes are currently supported\n");
1905 + goto error_out;
1906 + }
1907 +
1908 + /* Check the link frequency set in device tree */
1909 + if (!ep_cfg.nr_of_link_frequencies) {
1910 + dev_err(dev, "link-frequency property not found in DT\n");
1911 + goto error_out;
1912 + }
1913 +
1914 + if (ep_cfg.nr_of_link_frequencies != 1 ||
1915 + ep_cfg.link_frequencies[0] != IMX519_DEFAULT_LINK_FREQ) {
1916 + dev_err(dev, "Link frequency not supported: %lld\n",
1917 + ep_cfg.link_frequencies[0]);
1918 + goto error_out;
1919 + }
1920 +
1921 + ret = 0;
1922 +
1923 +error_out:
1924 + v4l2_fwnode_endpoint_free(&ep_cfg);
1925 + fwnode_handle_put(endpoint);
1926 +
1927 + return ret;
1928 +}
1929 +
1930 +static const struct of_device_id imx519_dt_ids[] = {
1931 + { .compatible = "sony,imx519"},
1932 + { /* sentinel */ }
1933 +};
1934 +
1935 +static int imx519_probe(struct i2c_client *client)
1936 +{
1937 + struct device *dev = &client->dev;
1938 + struct imx519 *imx519;
1939 + const struct of_device_id *match;
1940 + u32 xclk_freq;
1941 + int ret;
1942 +
1943 + imx519 = devm_kzalloc(&client->dev, sizeof(*imx519), GFP_KERNEL);
1944 + if (!imx519)
1945 + return -ENOMEM;
1946 +
1947 + v4l2_i2c_subdev_init(&imx519->sd, client, &imx519_subdev_ops);
1948 +
1949 + match = of_match_device(imx519_dt_ids, dev);
1950 + if (!match)
1951 + return -ENODEV;
1952 +
1953 + /* Check the hardware configuration in device tree */
1954 + if (imx519_check_hwcfg(dev))
1955 + return -EINVAL;
1956 +
1957 + /* Get system clock (xclk) */
1958 + imx519->xclk = devm_clk_get(dev, NULL);
1959 + if (IS_ERR(imx519->xclk)) {
1960 + dev_err(dev, "failed to get xclk\n");
1961 + return PTR_ERR(imx519->xclk);
1962 + }
1963 +
1964 + xclk_freq = clk_get_rate(imx519->xclk);
1965 + if (xclk_freq != IMX519_XCLK_FREQ) {
1966 + dev_err(dev, "xclk frequency not supported: %d Hz\n",
1967 + xclk_freq);
1968 + return -EINVAL;
1969 + }
1970 +
1971 + ret = imx519_get_regulators(imx519);
1972 + if (ret) {
1973 + dev_err(dev, "failed to get regulators\n");
1974 + return ret;
1975 + }
1976 +
1977 + /* Request optional enable pin */
1978 + imx519->reset_gpio = devm_gpiod_get_optional(dev, "reset",
1979 + GPIOD_OUT_HIGH);
1980 +
1981 + /*
1982 + * The sensor must be powered for imx519_identify_module()
1983 + * to be able to read the CHIP_ID register
1984 + */
1985 + ret = imx519_power_on(dev);
1986 + if (ret)
1987 + return ret;
1988 +
1989 + ret = imx519_identify_module(imx519, IMX519_CHIP_ID);
1990 + if (ret)
1991 + goto error_power_off;
1992 +
1993 + /* Set default mode to max resolution */
1994 + imx519->mode = &supported_modes_10bit[0];
1995 + imx519->fmt_code = MEDIA_BUS_FMT_SRGGB10_1X10;
1996 +
1997 + /* Enable runtime PM and turn off the device */
1998 + pm_runtime_set_active(dev);
1999 + pm_runtime_enable(dev);
2000 + pm_runtime_idle(dev);
2001 +
2002 + /* This needs the pm runtime to be registered. */
2003 + ret = imx519_init_controls(imx519);
2004 + if (ret)
2005 + goto error_power_off;
2006 +
2007 + /* Initialize subdev */
2008 + imx519->sd.internal_ops = &imx519_internal_ops;
2009 + imx519->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE |
2010 + V4L2_SUBDEV_FL_HAS_EVENTS;
2011 + imx519->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
2012 +
2013 + /* Initialize source pads */
2014 + imx519->pad.flags = MEDIA_PAD_FL_SOURCE;
2015 +
2016 + ret = media_entity_pads_init(&imx519->sd.entity, 1, &imx519->pad);
2017 + if (ret) {
2018 + dev_err(dev, "failed to init entity pads: %d\n", ret);
2019 + goto error_handler_free;
2020 + }
2021 +
2022 + ret = v4l2_async_register_subdev_sensor(&imx519->sd);
2023 + if (ret < 0) {
2024 + dev_err(dev, "failed to register sensor sub-device: %d\n", ret);
2025 + goto error_media_entity;
2026 + }
2027 +
2028 + return 0;
2029 +
2030 +error_media_entity:
2031 + media_entity_cleanup(&imx519->sd.entity);
2032 +
2033 +error_handler_free:
2034 + imx519_free_controls(imx519);
2035 +
2036 +error_power_off:
2037 + pm_runtime_disable(&client->dev);
2038 + pm_runtime_set_suspended(&client->dev);
2039 + imx519_power_off(&client->dev);
2040 +
2041 + return ret;
2042 +}
2043 +
2044 +static int imx519_remove(struct i2c_client *client)
2045 +{
2046 + struct v4l2_subdev *sd = i2c_get_clientdata(client);
2047 + struct imx519 *imx519 = to_imx519(sd);
2048 +
2049 + v4l2_async_unregister_subdev(sd);
2050 + media_entity_cleanup(&sd->entity);
2051 + imx519_free_controls(imx519);
2052 +
2053 + pm_runtime_disable(&client->dev);
2054 + if (!pm_runtime_status_suspended(&client->dev))
2055 + imx519_power_off(&client->dev);
2056 + pm_runtime_set_suspended(&client->dev);
2057 +
2058 + return 0;
2059 +}
2060 +
2061 +MODULE_DEVICE_TABLE(of, imx519_dt_ids);
2062 +
2063 +static const struct dev_pm_ops imx519_pm_ops = {
2064 + SET_SYSTEM_SLEEP_PM_OPS(imx519_suspend, imx519_resume)
2065 + SET_RUNTIME_PM_OPS(imx519_power_off, imx519_power_on, NULL)
2066 +};
2067 +
2068 +static struct i2c_driver imx519_i2c_driver = {
2069 + .driver = {
2070 + .name = "imx519",
2071 + .of_match_table = imx519_dt_ids,
2072 + .pm = &imx519_pm_ops,
2073 + },
2074 + .probe_new = imx519_probe,
2075 + .remove = imx519_remove,
2076 +};
2077 +
2078 +module_i2c_driver(imx519_i2c_driver);
2079 +
2080 +MODULE_AUTHOR("Lee Jackson <info@arducam.com>");
2081 +MODULE_DESCRIPTION("Sony IMX519 sensor driver");
2082 +MODULE_LICENSE("GPL v2");
Staging tree of Christian Lamparter