uclient: update to Git HEAD (2024-04-18)
[openwrt/staging/nbd.git] / package / boot / uboot-mvebu / patches / 0003-arm-mvebu-eDPU-support-new-board-revision.patch
1 From 83c00ee665b8dde813458b2b07cf97ce8409248d Mon Sep 17 00:00:00 2001
2 From: Robert Marko <robert.marko@sartura.hr>
3 Date: Fri, 4 Aug 2023 22:39:06 +0200
4 Subject: [PATCH 3/3] arm: mvebu: eDPU: support new board revision
5
6 There is a new eDPU revision that uses Marvell 88E6361 switch onboard.
7 We can rely on detecting the switch to enable and fixup the Linux DTS
8 so a single DTS can be used.
9
10 There is currently no support for the 88E6361 switch and thus no working
11 networking in U-Boot, so we disable both ports.
12
13 Signed-off-by: Robert Marko <robert.marko@sartura.hr>
14 ---
15 arch/arm/dts/armada-3720-eDPU-u-boot.dtsi | 13 ++-
16 arch/arm/dts/armada-3720-eDPU.dts | 47 ++++++++
17 board/Marvell/mvebu_armada-37xx/board.c | 125 ++++++++++++++++++++++
18 configs/eDPU_defconfig | 2 +
19 4 files changed, 182 insertions(+), 5 deletions(-)
20
21 --- a/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi
22 +++ b/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi
23 @@ -32,14 +32,17 @@
24 bootph-all;
25 };
26
27 -&eth0 {
28 - /* G.hn does not work without additional configuration */
29 - status = "disabled";
30 -};
31 -
32 &eth1 {
33 fixed-link {
34 speed = <1000>;
35 full-duplex;
36 };
37 };
38 +
39 +/*
40 + * eDPU v2 has a MV88E6361 switch on the MDIO bus and U-boot is used
41 + * to patch the Linux DTS if its found so enable MDIO by default.
42 + */
43 +&mdio {
44 + status = "okay";
45 +};
46 --- a/arch/arm/dts/armada-3720-eDPU.dts
47 +++ b/arch/arm/dts/armada-3720-eDPU.dts
48 @@ -12,3 +12,50 @@
49 &eth0 {
50 phy-mode = "2500base-x";
51 };
52 +
53 +/*
54 + * External MV88E6361 switch is only available on v2 of the board.
55 + * U-Boot will enable the MDIO bus and switch nodes.
56 + */
57 +&mdio {
58 + status = "disabled";
59 + pinctrl-names = "default";
60 + pinctrl-0 = <&smi_pins>;
61 +
62 + /* Actual device is MV88E6361 */
63 + switch: switch@0 {
64 + compatible = "marvell,mv88e6190";
65 + #address-cells = <1>;
66 + #size-cells = <0>;
67 + reg = <0>;
68 + status = "disabled";
69 +
70 + ports {
71 + #address-cells = <1>;
72 + #size-cells = <0>;
73 +
74 + port@0 {
75 + reg = <0>;
76 + label = "cpu";
77 + phy-mode = "2500base-x";
78 + managed = "in-band-status";
79 + ethernet = <&eth0>;
80 + };
81 +
82 + port@9 {
83 + reg = <9>;
84 + label = "downlink";
85 + phy-mode = "2500base-x";
86 + managed = "in-band-status";
87 + };
88 +
89 + port@a {
90 + reg = <10>;
91 + label = "uplink";
92 + phy-mode = "2500base-x";
93 + managed = "in-band-status";
94 + sfp = <&sfp_eth1>;
95 + };
96 + };
97 + };
98 +};
99 --- a/board/Marvell/mvebu_armada-37xx/board.c
100 +++ b/board/Marvell/mvebu_armada-37xx/board.c
101 @@ -13,6 +13,7 @@
102 #include <mmc.h>
103 #include <miiphy.h>
104 #include <phy.h>
105 +#include <fdt_support.h>
106 #include <asm/global_data.h>
107 #include <asm/io.h>
108 #include <asm/arch/cpu.h>
109 @@ -49,6 +50,7 @@ DECLARE_GLOBAL_DATA_PTR;
110 /* Single-chip mode */
111 /* Switch Port Registers */
112 #define MVEBU_SW_LINK_CTRL_REG (1)
113 +#define MVEBU_SW_PORT_SWITCH_ID (3)
114 #define MVEBU_SW_PORT_CTRL_REG (4)
115 #define MVEBU_SW_PORT_BASE_VLAN (6)
116
117 @@ -56,6 +58,8 @@ DECLARE_GLOBAL_DATA_PTR;
118 #define MVEBU_G2_SMI_PHY_CMD_REG (24)
119 #define MVEBU_G2_SMI_PHY_DATA_REG (25)
120
121 +#define SWITCH_88E6361_PRODUCT_NUMBER 0x2610
122 +
123 /*
124 * Memory Controller Registers
125 *
126 @@ -72,6 +76,27 @@ DECLARE_GLOBAL_DATA_PTR;
127 #define A3700_MC_CTRL2_SDRAM_TYPE_DDR3 2
128 #define A3700_MC_CTRL2_SDRAM_TYPE_DDR4 3
129
130 +static bool is_edpu_plus(void)
131 +{
132 + struct udevice *bus;
133 + ofnode node;
134 + int val;
135 +
136 + node = ofnode_by_compatible(ofnode_null(), "marvell,orion-mdio");
137 + if (!ofnode_valid(node) ||
138 + uclass_get_device_by_ofnode(UCLASS_MDIO, node, &bus) ||
139 + device_probe(bus)) {
140 + printf("Cannot find MDIO bus\n");
141 + return -ENODEV;
142 + }
143 +
144 + val = dm_mdio_read(bus, 0x0, MDIO_DEVAD_NONE, MVEBU_SW_PORT_SWITCH_ID);
145 + if (val == SWITCH_88E6361_PRODUCT_NUMBER)
146 + return true;
147 + else
148 + return false;
149 +}
150 +
151 int board_early_init_f(void)
152 {
153 return 0;
154 @@ -353,6 +378,41 @@ static int espressobin_last_stage_init(v
155 return 0;
156 }
157
158 +static int edpu_plus_last_stage_init(void)
159 +{
160 + struct udevice *dev;
161 + int ret;
162 +
163 + if (is_edpu_plus()) {
164 + ret = uclass_get_device_by_name(UCLASS_ETH,
165 + "ethernet@40000",
166 + &dev);
167 + if (!ret) {
168 + device_remove(dev, DM_REMOVE_NORMAL);
169 + device_unbind(dev);
170 + }
171 +
172 + /* Currently no networking support on the eDPU+ board */
173 + ret = uclass_get_device_by_name(UCLASS_ETH,
174 + "ethernet@30000",
175 + &dev);
176 + if (!ret) {
177 + device_remove(dev, DM_REMOVE_NORMAL);
178 + device_unbind(dev);
179 + }
180 + } else {
181 + ret = uclass_get_device_by_name(UCLASS_ETH,
182 + "ethernet@30000",
183 + &dev);
184 + if (!ret) {
185 + device_remove(dev, DM_REMOVE_NORMAL);
186 + device_unbind(dev);
187 + }
188 + }
189 +
190 + return 0;
191 +}
192 +
193 /* Bring-up board-specific network stuff */
194 int last_stage_init(void)
195 {
196 @@ -360,6 +420,9 @@ int last_stage_init(void)
197 if (of_machine_is_compatible("globalscale,espressobin"))
198 return espressobin_last_stage_init();
199
200 + if (of_machine_is_compatible("methode,edpu"))
201 + return edpu_plus_last_stage_init();
202 +
203 return 0;
204 }
205 #endif
206 @@ -460,12 +523,74 @@ static int espressobin_fdt_setup(void *b
207 return 0;
208 }
209
210 +static int edpu_plus_fdt_setup(void *blob)
211 +{
212 + const char *ports[] = { "downlink", "uplink" };
213 + uint8_t mac[ETH_ALEN];
214 + const char *path;
215 + int i, ret;
216 +
217 + if (is_edpu_plus()) {
218 + ret = fdt_set_status_by_compatible(blob,
219 + "marvell,orion-mdio",
220 + FDT_STATUS_OKAY);
221 + if (ret)
222 + printf("Failed to enable MDIO!\n");
223 +
224 + ret = fdt_set_status_by_alias(blob,
225 + "ethernet1",
226 + FDT_STATUS_DISABLED);
227 + if (ret)
228 + printf("Failed to disable ethernet1!\n");
229 +
230 + path = fdt_get_alias(blob, "ethernet0");
231 + if (path)
232 + do_fixup_by_path_string(blob, path, "phy-mode", "2500base-x");
233 + else
234 + printf("Failed to update ethernet0 phy-mode to 2500base-x!\n");
235 +
236 + ret = fdt_set_status_by_compatible(blob,
237 + "marvell,mv88e6190",
238 + FDT_STATUS_OKAY);
239 + if (ret)
240 + printf("Failed to enable MV88E6361!\n");
241 +
242 + /*
243 + * MAC-s for Uplink and Downlink ports are stored under
244 + * non standard variable names, so lets manually fixup the
245 + * switch port nodes to have the desired MAC-s.
246 + */
247 + for (i = 0; i < 2; i++) {
248 + if (eth_env_get_enetaddr(ports[i], mac)) {
249 + do_fixup_by_prop(blob,
250 + "label",
251 + ports[i],
252 + strlen(ports[i]) + 1,
253 + "mac-address",
254 + mac, ARP_HLEN, 1);
255 +
256 + do_fixup_by_prop(blob,
257 + "label",
258 + ports[i],
259 + strlen(ports[i]) + 1,
260 + "local-mac-address",
261 + mac, ARP_HLEN, 1);
262 + }
263 + }
264 + }
265 +
266 + return 0;
267 +}
268 +
269 int ft_board_setup(void *blob, struct bd_info *bd)
270 {
271 #ifdef CONFIG_ENV_IS_IN_SPI_FLASH
272 if (of_machine_is_compatible("globalscale,espressobin"))
273 return espressobin_fdt_setup(blob);
274 #endif
275 + if (of_machine_is_compatible("methode,edpu"))
276 + return edpu_plus_fdt_setup(blob);
277 +
278 return 0;
279 }
280 #endif
281 --- a/configs/eDPU_defconfig
282 +++ b/configs/eDPU_defconfig
283 @@ -17,12 +17,14 @@ CONFIG_DEBUG_UART=y
284 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
285 CONFIG_FIT=y
286 CONFIG_FIT_VERBOSE=y
287 +CONFIG_OF_BOARD_SETUP=y
288 CONFIG_DISTRO_DEFAULTS=y
289 CONFIG_USE_PREBOOT=y
290 # CONFIG_DISPLAY_CPUINFO is not set
291 # CONFIG_DISPLAY_BOARDINFO is not set
292 CONFIG_DISPLAY_BOARDINFO_LATE=y
293 CONFIG_BOARD_EARLY_INIT_F=y
294 +CONFIG_LAST_STAGE_INIT=y
295 CONFIG_SYS_MAXARGS=32
296 CONFIG_SYS_PBSIZE=1048
297 # CONFIG_CMD_ELF is not set