2 * Copyright (C) 2016-2017 Socionext Inc.
3 * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
5 * SPDX-License-Identifier: GPL-2.0+
12 #include "../sg-regs.h"
13 #include "../soc-info.h"
14 #include "boot-device.h"
16 static struct boot_device_info boot_device_table
[] = {
17 {BOOT_DEVICE_NAND
, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 4)"},
18 {BOOT_DEVICE_NAND
, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 4)"},
19 {BOOT_DEVICE_NAND
, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 5)"},
20 {BOOT_DEVICE_NAND
, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 5)"},
21 {BOOT_DEVICE_NAND
, "NAND (Mirror 8, ECC 8, EraseSize 256KB, Addr 5)"},
22 {BOOT_DEVICE_NAND
, "NAND (Mirror 8, ECC 16, EraseSize 256KB, Addr 5)"},
23 {BOOT_DEVICE_NAND
, "NAND (Mirror 8, ECC 8, EraseSize 512KB, Addr 5)"},
24 {BOOT_DEVICE_NAND
, "NAND (Mirror 8, ECC 16, EraseSize 512KB, Addr 5)"},
25 {BOOT_DEVICE_NAND
, "NAND (Mirror 1, ECC 8, EraseSize 128KB, Addr 4)"},
26 {BOOT_DEVICE_NAND
, "NAND (Mirror 1, ECC 16, EraseSize 128KB, Addr 4)"},
27 {BOOT_DEVICE_NAND
, "NAND (Mirror 1, ECC 8, EraseSize 128KB, Addr 5)"},
28 {BOOT_DEVICE_NAND
, "NAND (Mirror 1, ECC 16, EraseSize 128KB, Addr 5)"},
29 {BOOT_DEVICE_NAND
, "NAND (Mirror 1, ECC 8, EraseSize 256KB, Addr 5)"},
30 {BOOT_DEVICE_NAND
, "NAND (Mirror 1, ECC 16, EraseSize 256KB, Addr 5)"},
31 {BOOT_DEVICE_NAND
, "NAND (Mirror 1, ECC 8, EraseSize 512KB, Addr 5)"},
32 {BOOT_DEVICE_NAND
, "NAND (Mirror 1, ECC 16, EraseSize 512KB, Addr 5)"},
33 {BOOT_DEVICE_NAND
, "NAND (Mirror 8, ECC 8, ONFI, Addr 4)"},
34 {BOOT_DEVICE_NAND
, "NAND (Mirror 8, ECC 16, ONFI, Addr 4)"},
35 {BOOT_DEVICE_NAND
, "NAND (Mirror 8, ECC 8, ONFI, Addr 5)"},
36 {BOOT_DEVICE_NAND
, "NAND (Mirror 8, ECC 16, ONFI, Addr 5)"},
37 {BOOT_DEVICE_NAND
, "NAND (Mirror 1, ECC 8, ONFI Addr 4)"},
38 {BOOT_DEVICE_NAND
, "NAND (Mirror 1, ECC 16, ONFI Addr 4)"},
39 {BOOT_DEVICE_NAND
, "NAND (Mirror 1, ECC 8, ONFI Addr 5)"},
40 {BOOT_DEVICE_NAND
, "NAND (Mirror 1, ECC 16, ONFI Addr 5)"},
41 {BOOT_DEVICE_MMC1
, "eMMC (Legacy, 4bit, 1.8V, Training Off)"},
42 {BOOT_DEVICE_MMC1
, "eMMC (Legacy, 4bit, 1.8V, Training On)"},
43 {BOOT_DEVICE_MMC1
, "eMMC (Legacy, 8bit, 1.8V, Training Off)"},
44 {BOOT_DEVICE_MMC1
, "eMMC (Legacy, 8bit, 1.8V, Training On)"},
45 {BOOT_DEVICE_MMC1
, "eMMC (High Speed SDR, 8bit, 1.8V, Training Off)"},
46 {BOOT_DEVICE_MMC1
, "eMMC (High Speed SDR, 8bit, 1.8V, Training On)"},
47 {BOOT_DEVICE_MMC1
, "eMMC (Legacy, 4bit, 1.8V, Training Off)"},
48 {BOOT_DEVICE_NOR
, "NOR (XECS1)"},
51 static int get_boot_mode_sel(void)
53 return (readl(SG_PINMON0
) >> 1) & 0x1f;
56 u32
uniphier_ld20_boot_device(void)
61 switch (uniphier_get_soc_id()) {
62 #if defined(CONFIG_ARCH_UNIPHIER_LD11)
63 case UNIPHIER_LD11_ID
:
64 usb_boot_mask
= 0x00000080;
67 #if defined(CONFIG_ARCH_UNIPHIER_LD20)
68 case UNIPHIER_LD20_ID
:
69 usb_boot_mask
= 0x00000780;
76 if (~readl(SG_PINMON0
) & usb_boot_mask
)
77 return BOOT_DEVICE_USB
;
79 boot_mode
= get_boot_mode_sel();
81 return boot_device_table
[boot_mode
].type
;
84 void uniphier_ld20_boot_mode_show(void)
88 mode_sel
= get_boot_mode_sel();
90 puts("Boot Mode Pin:\n");
92 for (i
= 0; i
< ARRAY_SIZE(boot_device_table
); i
++)
93 printf(" %c %02x %s\n", i
== mode_sel
? '*' : ' ', i
,
94 boot_device_table
[i
].info
);