arch/arm/mach-rockchip/Kconfig

   1 if ARCH_ROCKCHIP
   2
   3 config ROCKCHIP_RK3036
   4         bool "Support Rockchip RK3036"
   5         select CPU_V7A
   6         select SUPPORT_SPL
   7         select SPL
   8         imply USB_FUNCTION_ROCKUSB
   9         imply CMD_ROCKUSB
  10         help
  11           The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7
  12           including NEON and GPU, Mali-400 graphics, several DDR3 options
  13           and video codec support. Peripherals include Gigabit Ethernet,
  14           USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
  15
  16 config ROCKCHIP_RK3128
  17         bool "Support Rockchip RK3128"
  18         select CPU_V7A
  19         help
  20           The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7
  21           including NEON and GPU, Mali-400 graphics, several DDR3 options
  22           and video codec support. Peripherals include Gigabit Ethernet,
  23           USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
  24
  25 config ROCKCHIP_RK3188
  26         bool "Support Rockchip RK3188"
  27         select CPU_V7A
  28         select SPL_BOARD_INIT if SPL
  29         select SUPPORT_SPL
  30         select SPL
  31         select SPL_CLK
  32         select SPL_REGMAP
  33         select SPL_SYSCON
  34         select SPL_RAM
  35         select SPL_DRIVERS_MISC_SUPPORT
  36         select SPL_ROCKCHIP_EARLYRETURN_TO_BROM
  37         select BOARD_LATE_INIT
  38         select ROCKCHIP_BROM_HELPER
  39         help
  40           The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9
  41           including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two
  42           video interfaces, several memory options and video codec support.
  43           Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S,
  44           UART, SPI, I2C and PWMs.
  45
  46 config ROCKCHIP_RK322X
  47         bool "Support Rockchip RK3228/RK3229"
  48         select CPU_V7A
  49         select SUPPORT_SPL
  50         select SUPPORT_TPL
  51         select SPL
  52         select SPL_DM
  53         select SPL_OF_LIBFDT
  54         select TPL
  55         select TPL_DM
  56         select TPL_OF_LIBFDT
  57         select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
  58         select TPL_NEEDS_SEPARATE_STACK if TPL
  59         select SPL_DRIVERS_MISC_SUPPORT
  60         imply SPL_SERIAL_SUPPORT
  61         imply TPL_SERIAL_SUPPORT
  62         select ROCKCHIP_BROM_HELPER
  63         select TPL_LIBCOMMON_SUPPORT
  64         select TPL_LIBGENERIC_SUPPORT
  65         help
  66           The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7
  67           including NEON and GPU, Mali-400 graphics, several DDR3 options
  68           and video codec support. Peripherals include Gigabit Ethernet,
  69           USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
  70
  71 if ROCKCHIP_RK322X
  72
  73 config TPL_TEXT_BASE
  74         default 0x10081000
  75
  76 config TPL_MAX_SIZE
  77         default 28672
  78
  79 config TPL_STACK
  80         default 0x10088000
  81
  82 endif
  83
  84 config ROCKCHIP_RK3288
  85         bool "Support Rockchip RK3288"
  86         select CPU_V7A
  87         select SPL_BOARD_INIT if SPL
  88         select SUPPORT_SPL
  89         select SPL
  90         select SUPPORT_TPL
  91         imply TPL_BOOTROM_SUPPORT
  92         imply TPL_CLK
  93         imply TPL_DM
  94         imply TPL_DRIVERS_MISC_SUPPORT
  95         imply TPL_LIBCOMMON_SUPPORT
  96         imply TPL_LIBGENERIC_SUPPORT
  97         imply TPL_NEEDS_SEPARATE_TEXT_BASE
  98         imply TPL_OF_CONTROL
  99         imply TPL_OF_PLATDATA
 100         imply TPL_RAM
 101         imply TPL_REGMAP
 102         imply TPL_SERIAL_SUPPORT
 103         imply TPL_SYSCON
 104         imply USB_FUNCTION_ROCKUSB
 105         imply CMD_ROCKUSB
 106         help
 107           The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17
 108           including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
 109           video interfaces supporting HDMI and eDP, several DDR3 options
 110           and video codec support. Peripherals include Gigabit Ethernet,
 111           USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
 112
 113 if ROCKCHIP_RK3288
 114
 115 config TPL_TEXT_BASE
 116         default 0xff704000
 117
 118 config TPL_MAX_SIZE
 119         default 32768
 120
 121 endif
 122
 123 config ROCKCHIP_RK3328
 124         bool "Support Rockchip RK3328"
 125         select ARM64
 126         select SUPPORT_SPL
 127         select SPL
 128         imply SPL_SERIAL_SUPPORT
 129         imply SPL_SEPARATE_BSS
 130         select ENABLE_ARM_SOC_BOOT0_HOOK
 131         select DEBUG_UART_BOARD_INIT
 132         select SYS_NS16550
 133         help
 134           The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53.
 135           including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
 136           video interfaces supporting HDMI and eDP, several DDR3 options
 137           and video codec support. Peripherals include Gigabit Ethernet,
 138           USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
 139
 140 config ROCKCHIP_RK3368
 141         bool "Support Rockchip RK3368"
 142         select ARM64
 143         select SUPPORT_SPL
 144         select SUPPORT_TPL
 145         select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
 146         select TPL_NEEDS_SEPARATE_STACK if TPL
 147         imply SPL_SEPARATE_BSS
 148         imply SPL_SERIAL_SUPPORT
 149         imply TPL_SERIAL_SUPPORT
 150         help
 151           The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised
 152           into a big and little cluster with 4 cores each) Cortex-A53 including
 153           AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache
 154           (for the little cluster), PowerVR G6110 based graphics, one video
 155           output processor supporting LVDS/HDMI/eDP, several DDR3 options and
 156           video codec support.
 157
 158           On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO,
 159           I2S, UARTs, SPI, I2C and PWMs.
 160
 161 if ROCKCHIP_RK3368
 162
 163 config TPL_TEXT_BASE
 164         default 0xff8c1000
 165
 166 config TPL_MAX_SIZE
 167         default 28672
 168
 169 config TPL_STACK
 170         default 0xff8cffff
 171
 172 endif
 173
 174 config ROCKCHIP_RK3399
 175         bool "Support Rockchip RK3399"
 176         select ARM64
 177         select SUPPORT_SPL
 178         select SUPPORT_TPL
 179         select SPL
 180         select SPL_ATF
 181         select SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF
 182         select SPL_BOARD_INIT if SPL
 183         select SPL_LOAD_FIT
 184         select SPL_CLK if SPL
 185         select SPL_PINCTRL if SPL
 186         select SPL_RAM if SPL
 187         select SPL_REGMAP if SPL
 188         select SPL_SYSCON if SPL
 189         select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL
 190         select TPL_NEEDS_SEPARATE_STACK if TPL
 191         select SPL_SEPARATE_BSS
 192         select SPL_SERIAL_SUPPORT
 193         select SPL_DRIVERS_MISC_SUPPORT
 194         select CLK
 195         select FIT
 196         select PINCTRL
 197         select RAM
 198         select REGMAP
 199         select SYSCON
 200         select DM_PMIC
 201         select DM_REGULATOR_FIXED
 202         select BOARD_LATE_INIT
 203         select ROCKCHIP_BROM_HELPER
 204         imply TPL_SERIAL_SUPPORT
 205         imply TPL_LIBCOMMON_SUPPORT
 206         imply TPL_LIBGENERIC_SUPPORT
 207         imply TPL_SYS_MALLOC_SIMPLE
 208         imply TPL_BOARD_INIT
 209         imply TPL_BOOTROM_SUPPORT
 210         imply TPL_DRIVERS_MISC_SUPPORT
 211         imply TPL_OF_CONTROL
 212         imply TPL_DM
 213         imply TPL_REGMAP
 214         imply TPL_SYSCON
 215         imply TPL_RAM
 216         imply TPL_CLK
 217         imply TPL_TINY_MEMSET
 218         help
 219           The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
 220           and quad-core Cortex-A53.
 221           including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
 222           video interfaces supporting HDMI and eDP, several DDR3 options
 223           and video codec support. Peripherals include Gigabit Ethernet,
 224           USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
 225
 226 if ROCKCHIP_RK3399
 227
 228 config TPL_LDSCRIPT
 229         default "arch/arm/mach-rockchip/u-boot-tpl-v8.lds"
 230
 231 config TPL_TEXT_BASE
 232         default 0xff8c2000
 233
 234 config TPL_MAX_SIZE
 235         default 188416
 236
 237 config TPL_STACK
 238         default 0xff8effff
 239
 240 endif
 241
 242 config ROCKCHIP_RV1108
 243         bool "Support Rockchip RV1108"
 244         select CPU_V7A
 245         help
 246           The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
 247           and a DSP.
 248
 249 config ROCKCHIP_USB_UART
 250         bool "Route uart output to usb pins"
 251         help
 252           Rockchip SoCs have the ability to route the signals of the debug
 253           uart through the d+ and d- pins of a specific usb phy to enable
 254           some form of closed-case debugging. With this option supported
 255           SoCs will enable this routing as a debug measure.
 256
 257 config SPL_ROCKCHIP_BACK_TO_BROM
 258         bool "SPL returns to bootrom"
 259         default y if ROCKCHIP_RK3036
 260         select ROCKCHIP_BROM_HELPER
 261         depends on SPL
 262         help
 263           Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
 264           SPL will return to the boot rom, which will then load the U-Boot
 265           binary to keep going on.
 266
 267 config TPL_ROCKCHIP_BACK_TO_BROM
 268         bool "TPL returns to bootrom"
 269         default y
 270         select ROCKCHIP_BROM_HELPER
 271         depends on TPL
 272         help
 273           Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
 274           SPL will return to the boot rom, which will then load the U-Boot
 275           binary to keep going on.
 276
 277 config ROCKCHIP_BOOT_MODE_REG
 278         hex "Rockchip boot mode flag register address"
 279         default 0x200081c8 if ROCKCHIP_RK3036
 280         default 0x20004040 if ROCKCHIP_RK3188
 281         default 0x110005c8 if ROCKCHIP_RK322X
 282         default 0xff730094 if ROCKCHIP_RK3288
 283         default 0xff738200 if ROCKCHIP_RK3368
 284         default 0xff320300 if ROCKCHIP_RK3399
 285         default 0x10300580 if ROCKCHIP_RV1108
 286         default 0
 287         help
 288           The Soc will enter to different boot mode(defined in asm/arch-rockchip/boot_mode.h)
 289           according to the value from this register.
 290
 291 config ROCKCHIP_SPL_RESERVE_IRAM
 292         hex "Size of IRAM reserved in SPL"
 293         default 0
 294         help
 295           SPL may need reserve memory for firmware loaded by SPL, whose load
 296           address is in IRAM and may overlay with SPL text area if not
 297           reserved.
 298
 299 config ROCKCHIP_BROM_HELPER
 300         bool
 301
 302 config SPL_ROCKCHIP_EARLYRETURN_TO_BROM
 303         bool "SPL requires early-return (for RK3188-style BROM) to BROM"
 304         depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK
 305         help
 306           Some Rockchip BROM variants (e.g. on the RK3188) load the
 307           first stage in segments and enter multiple times. E.g. on
 308           the RK3188, the first 1KB of the first stage are loaded
 309           first and entered; after returning to the BROM, the
 310           remainder of the first stage is loaded, but the BROM
 311           re-enters at the same address/to the same code as previously.
 312
 313           This enables support code in the BOOT0 hook for the SPL stage
 314           to allow multiple entries.
 315
 316 config TPL_ROCKCHIP_EARLYRETURN_TO_BROM
 317         bool "TPL requires early-return (for RK3188-style BROM) to BROM"
 318         depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK
 319         help
 320           Some Rockchip BROM variants (e.g. on the RK3188) load the
 321           first stage in segments and enter multiple times. E.g. on
 322           the RK3188, the first 1KB of the first stage are loaded
 323           first and entered; after returning to the BROM, the
 324           remainder of the first stage is loaded, but the BROM
 325           re-enters at the same address/to the same code as previously.
 326
 327           This enables support code in the BOOT0 hook for the TPL stage
 328           to allow multiple entries.
 329
 330 config SPL_MMC_SUPPORT
 331         default y if !SPL_ROCKCHIP_BACK_TO_BROM
 332
 333 source "arch/arm/mach-rockchip/rk3036/Kconfig"
 334 source "arch/arm/mach-rockchip/rk3128/Kconfig"
 335 source "arch/arm/mach-rockchip/rk3188/Kconfig"
 336 source "arch/arm/mach-rockchip/rk322x/Kconfig"
 337 source "arch/arm/mach-rockchip/rk3288/Kconfig"
 338 source "arch/arm/mach-rockchip/rk3328/Kconfig"
 339 source "arch/arm/mach-rockchip/rk3368/Kconfig"
 340 source "arch/arm/mach-rockchip/rk3399/Kconfig"
 341 source "arch/arm/mach-rockchip/rv1108/Kconfig"
 342 endif