arch/arm/mach-rockchip/Kconfig

   1 if ARCH_ROCKCHIP
   2
   3 config ROCKCHIP_RK3036
   4         bool "Support Rockchip RK3036"
   5         select CPU_V7A
   6         select SUPPORT_SPL
   7         select SPL
   8         imply USB_FUNCTION_ROCKUSB
   9         imply CMD_ROCKUSB
  10         help
  11           The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7
  12           including NEON and GPU, Mali-400 graphics, several DDR3 options
  13           and video codec support. Peripherals include Gigabit Ethernet,
  14           USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
  15
  16 config ROCKCHIP_RK3128
  17         bool "Support Rockchip RK3128"
  18         select CPU_V7A
  19         help
  20           The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7
  21           including NEON and GPU, Mali-400 graphics, several DDR3 options
  22           and video codec support. Peripherals include Gigabit Ethernet,
  23           USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
  24
  25 config ROCKCHIP_RK3188
  26         bool "Support Rockchip RK3188"
  27         select CPU_V7A
  28         select SPL_BOARD_INIT if SPL
  29         select SUPPORT_SPL
  30         select SPL
  31         select SPL_CLK
  32         select SPL_REGMAP
  33         select SPL_SYSCON
  34         select SPL_RAM
  35         select SPL_DRIVERS_MISC_SUPPORT
  36         select SPL_ROCKCHIP_EARLYRETURN_TO_BROM
  37         select BOARD_LATE_INIT
  38         select ROCKCHIP_BROM_HELPER
  39         help
  40           The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9
  41           including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two
  42           video interfaces, several memory options and video codec support.
  43           Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S,
  44           UART, SPI, I2C and PWMs.
  45
  46 config ROCKCHIP_RK322X
  47         bool "Support Rockchip RK3228/RK3229"
  48         select CPU_V7A
  49         select SUPPORT_SPL
  50         select SUPPORT_TPL
  51         select SPL
  52         select SPL_DM
  53         select SPL_OF_LIBFDT
  54         select TPL
  55         select TPL_DM
  56         select TPL_OF_LIBFDT
  57         select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
  58         select TPL_NEEDS_SEPARATE_STACK if TPL
  59         select SPL_DRIVERS_MISC_SUPPORT
  60         imply SPL_SERIAL_SUPPORT
  61         imply TPL_SERIAL_SUPPORT
  62         select ROCKCHIP_BROM_HELPER
  63         select TPL_LIBCOMMON_SUPPORT
  64         select TPL_LIBGENERIC_SUPPORT
  65         help
  66           The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7
  67           including NEON and GPU, Mali-400 graphics, several DDR3 options
  68           and video codec support. Peripherals include Gigabit Ethernet,
  69           USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
  70
  71 if ROCKCHIP_RK322X
  72
  73 config TPL_TEXT_BASE
  74         default 0x10081000
  75
  76 config TPL_MAX_SIZE
  77         default 28672
  78
  79 config TPL_STACK
  80         default 0x10088000
  81
  82 endif
  83
  84 config ROCKCHIP_RK3288
  85         bool "Support Rockchip RK3288"
  86         select CPU_V7A
  87         select SPL_BOARD_INIT if SPL
  88         select SUPPORT_SPL
  89         select SPL
  90         select SUPPORT_TPL
  91         imply TPL_BOOTROM_SUPPORT
  92         imply TPL_CLK
  93         imply TPL_DM
  94         imply TPL_DRIVERS_MISC_SUPPORT
  95         imply TPL_LIBCOMMON_SUPPORT
  96         imply TPL_LIBGENERIC_SUPPORT
  97         imply TPL_NEEDS_SEPARATE_TEXT_BASE
  98         imply TPL_NEEDS_SEPARATE_STACK
  99         imply TPL_OF_CONTROL
 100         imply TPL_OF_PLATDATA
 101         imply TPL_RAM
 102         imply TPL_REGMAP
 103         imply TPL_SERIAL_SUPPORT
 104         imply TPL_SYSCON
 105         imply USB_FUNCTION_ROCKUSB
 106         imply CMD_ROCKUSB
 107         help
 108           The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17
 109           including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
 110           video interfaces supporting HDMI and eDP, several DDR3 options
 111           and video codec support. Peripherals include Gigabit Ethernet,
 112           USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
 113
 114 if ROCKCHIP_RK3288
 115
 116 config TPL_TEXT_BASE
 117         default 0xff704000
 118
 119 config TPL_MAX_SIZE
 120         default 32768
 121
 122 config TPL_STACK
 123         default 0xff718000
 124
 125 endif
 126
 127 config ROCKCHIP_RK3328
 128         bool "Support Rockchip RK3328"
 129         select ARM64
 130         select SUPPORT_SPL
 131         select SPL
 132         imply SPL_SERIAL_SUPPORT
 133         imply SPL_SEPARATE_BSS
 134         select ENABLE_ARM_SOC_BOOT0_HOOK
 135         select DEBUG_UART_BOARD_INIT
 136         select SYS_NS16550
 137         help
 138           The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53.
 139           including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
 140           video interfaces supporting HDMI and eDP, several DDR3 options
 141           and video codec support. Peripherals include Gigabit Ethernet,
 142           USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
 143
 144 config ROCKCHIP_RK3368
 145         bool "Support Rockchip RK3368"
 146         select ARM64
 147         select SUPPORT_SPL
 148         select SUPPORT_TPL
 149         select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
 150         select TPL_NEEDS_SEPARATE_STACK if TPL
 151         imply SPL_SEPARATE_BSS
 152         imply SPL_SERIAL_SUPPORT
 153         imply TPL_SERIAL_SUPPORT
 154         help
 155           The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised
 156           into a big and little cluster with 4 cores each) Cortex-A53 including
 157           AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache
 158           (for the little cluster), PowerVR G6110 based graphics, one video
 159           output processor supporting LVDS/HDMI/eDP, several DDR3 options and
 160           video codec support.
 161
 162           On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO,
 163           I2S, UARTs, SPI, I2C and PWMs.
 164
 165 if ROCKCHIP_RK3368
 166
 167 config TPL_TEXT_BASE
 168         default 0xff8c1000
 169
 170 config TPL_MAX_SIZE
 171         default 28672
 172
 173 config TPL_STACK
 174         default 0xff8cffff
 175
 176 endif
 177
 178 config ROCKCHIP_RK3399
 179         bool "Support Rockchip RK3399"
 180         select ARM64
 181         select SUPPORT_SPL
 182         select SUPPORT_TPL
 183         select SPL
 184         select SPL_ATF
 185         select SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF
 186         select SPL_BOARD_INIT if SPL
 187         select SPL_LOAD_FIT
 188         select SPL_CLK if SPL
 189         select SPL_PINCTRL if SPL
 190         select SPL_RAM if SPL
 191         select SPL_REGMAP if SPL
 192         select SPL_SYSCON if SPL
 193         select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL
 194         select TPL_NEEDS_SEPARATE_STACK if TPL
 195         select SPL_SEPARATE_BSS
 196         select SPL_SERIAL_SUPPORT
 197         select SPL_DRIVERS_MISC_SUPPORT
 198         select CLK
 199         select FIT
 200         select PINCTRL
 201         select RAM
 202         select REGMAP
 203         select SYSCON
 204         select DM_PMIC
 205         select DM_REGULATOR_FIXED
 206         select BOARD_LATE_INIT
 207         select ROCKCHIP_BROM_HELPER
 208         imply TPL_SERIAL_SUPPORT
 209         imply TPL_LIBCOMMON_SUPPORT
 210         imply TPL_LIBGENERIC_SUPPORT
 211         imply TPL_SYS_MALLOC_SIMPLE
 212         imply TPL_BOARD_INIT
 213         imply TPL_BOOTROM_SUPPORT
 214         imply TPL_DRIVERS_MISC_SUPPORT
 215         imply TPL_OF_CONTROL
 216         imply TPL_DM
 217         imply TPL_REGMAP
 218         imply TPL_SYSCON
 219         imply TPL_RAM
 220         imply TPL_CLK
 221         imply TPL_TINY_MEMSET
 222         help
 223           The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
 224           and quad-core Cortex-A53.
 225           including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
 226           video interfaces supporting HDMI and eDP, several DDR3 options
 227           and video codec support. Peripherals include Gigabit Ethernet,
 228           USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
 229
 230 if ROCKCHIP_RK3399
 231
 232 config TPL_LDSCRIPT
 233         default "arch/arm/mach-rockchip/u-boot-tpl-v8.lds"
 234
 235 config TPL_TEXT_BASE
 236         default 0xff8c2000
 237
 238 config TPL_MAX_SIZE
 239         default 188416
 240
 241 config TPL_STACK
 242         default 0xff8effff
 243
 244 endif
 245
 246 config ROCKCHIP_RV1108
 247         bool "Support Rockchip RV1108"
 248         select CPU_V7A
 249         help
 250           The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
 251           and a DSP.
 252
 253 config ROCKCHIP_USB_UART
 254         bool "Route uart output to usb pins"
 255         help
 256           Rockchip SoCs have the ability to route the signals of the debug
 257           uart through the d+ and d- pins of a specific usb phy to enable
 258           some form of closed-case debugging. With this option supported
 259           SoCs will enable this routing as a debug measure.
 260
 261 config SPL_ROCKCHIP_BACK_TO_BROM
 262         bool "SPL returns to bootrom"
 263         default y if ROCKCHIP_RK3036
 264         select ROCKCHIP_BROM_HELPER
 265         depends on SPL
 266         help
 267           Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
 268           SPL will return to the boot rom, which will then load the U-Boot
 269           binary to keep going on.
 270
 271 config TPL_ROCKCHIP_BACK_TO_BROM
 272         bool "TPL returns to bootrom"
 273         default y
 274         select ROCKCHIP_BROM_HELPER
 275         depends on TPL
 276         help
 277           Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
 278           SPL will return to the boot rom, which will then load the U-Boot
 279           binary to keep going on.
 280
 281 config ROCKCHIP_BOOT_MODE_REG
 282         hex "Rockchip boot mode flag register address"
 283         default 0x200081c8 if ROCKCHIP_RK3036
 284         default 0x20004040 if ROCKCHIP_RK3188
 285         default 0x110005c8 if ROCKCHIP_RK322X
 286         default 0xff730094 if ROCKCHIP_RK3288
 287         default 0xff738200 if ROCKCHIP_RK3368
 288         default 0xff320300 if ROCKCHIP_RK3399
 289         default 0x10300580 if ROCKCHIP_RV1108
 290         default 0
 291         help
 292           The Soc will enter to different boot mode(defined in asm/arch-rockchip/boot_mode.h)
 293           according to the value from this register.
 294
 295 config ROCKCHIP_SPL_RESERVE_IRAM
 296         hex "Size of IRAM reserved in SPL"
 297         default 0
 298         help
 299           SPL may need reserve memory for firmware loaded by SPL, whose load
 300           address is in IRAM and may overlay with SPL text area if not
 301           reserved.
 302
 303 config ROCKCHIP_BROM_HELPER
 304         bool
 305
 306 config SPL_ROCKCHIP_EARLYRETURN_TO_BROM
 307         bool "SPL requires early-return (for RK3188-style BROM) to BROM"
 308         depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK
 309         help
 310           Some Rockchip BROM variants (e.g. on the RK3188) load the
 311           first stage in segments and enter multiple times. E.g. on
 312           the RK3188, the first 1KB of the first stage are loaded
 313           first and entered; after returning to the BROM, the
 314           remainder of the first stage is loaded, but the BROM
 315           re-enters at the same address/to the same code as previously.
 316
 317           This enables support code in the BOOT0 hook for the SPL stage
 318           to allow multiple entries.
 319
 320 config TPL_ROCKCHIP_EARLYRETURN_TO_BROM
 321         bool "TPL requires early-return (for RK3188-style BROM) to BROM"
 322         depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK
 323         help
 324           Some Rockchip BROM variants (e.g. on the RK3188) load the
 325           first stage in segments and enter multiple times. E.g. on
 326           the RK3188, the first 1KB of the first stage are loaded
 327           first and entered; after returning to the BROM, the
 328           remainder of the first stage is loaded, but the BROM
 329           re-enters at the same address/to the same code as previously.
 330
 331           This enables support code in the BOOT0 hook for the TPL stage
 332           to allow multiple entries.
 333
 334 config SPL_MMC_SUPPORT
 335         default y if !SPL_ROCKCHIP_BACK_TO_BROM
 336
 337 source "arch/arm/mach-rockchip/rk3036/Kconfig"
 338 source "arch/arm/mach-rockchip/rk3128/Kconfig"
 339 source "arch/arm/mach-rockchip/rk3188/Kconfig"
 340 source "arch/arm/mach-rockchip/rk322x/Kconfig"
 341 source "arch/arm/mach-rockchip/rk3288/Kconfig"
 342 source "arch/arm/mach-rockchip/rk3328/Kconfig"
 343 source "arch/arm/mach-rockchip/rk3368/Kconfig"
 344 source "arch/arm/mach-rockchip/rk3399/Kconfig"
 345 source "arch/arm/mach-rockchip/rv1108/Kconfig"
 346 endif