mediatek: sync MT7986 device trees with upstream
authorDaniel Golle <daniel@makrotopia.org>
Sun, 4 Jun 2023 14:56:15 +0000 (15:56 +0100)
committerDaniel Golle <daniel@makrotopia.org>
Fri, 9 Jun 2023 18:23:03 +0000 (19:23 +0100)
Sync device tree files for MT7986 boards with what landed in upstream
Linux tree to easy maintainance and also allow for a smooth update to
Linux 6.1.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit 7a0ec001ff79b12beefb8f3773820bfedebbb340)

33 files changed:
target/linux/mediatek/dts/mt7986a-asus-tuf-ax4200.dts
target/linux/mediatek/dts/mt7986a-bananapi-bpi-r3-emmc-nor.dts [deleted file]
target/linux/mediatek/dts/mt7986a-bananapi-bpi-r3-emmc-snand.dts [deleted file]
target/linux/mediatek/dts/mt7986a-bananapi-bpi-r3-nor.dts [deleted file]
target/linux/mediatek/dts/mt7986a-bananapi-bpi-r3-snand.dts [deleted file]
target/linux/mediatek/dts/mt7986a-bananapi-bpi-r3.dts [deleted file]
target/linux/mediatek/dts/mt7986a-tplink-tl-xdr-common.dtsi
target/linux/mediatek/dts/mt7986a-tplink-tl-xdr4288.dts
target/linux/mediatek/dts/mt7986a-tplink-tl-xdr6086.dts
target/linux/mediatek/dts/mt7986a-tplink-tl-xdr6088.dts
target/linux/mediatek/dts/mt7986a-xiaomi-redmi-router-ax6000.dtsi
target/linux/mediatek/dts/mt7986a-zyxel-ex5601-t0-stock.dts
target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7981.dtsi
target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-emmc.dtso [new file with mode: 0644]
target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-nand.dtso [new file with mode: 0644]
target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-nor.dtso [new file with mode: 0644]
target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-sd.dtso [new file with mode: 0644]
target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts [new file with mode: 0644]
target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7986a-rfb-spim-nand.dts
target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7986a-rfb-spim-nor.dts
target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dtsi
target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts
target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7986b.dtsi
target/linux/mediatek/files-5.15/drivers/clk/mediatek/clk-mt7986-eth.c
target/linux/mediatek/files-5.15/include/dt-bindings/reset/mt7986-resets.h
target/linux/mediatek/filogic/base-files/etc/board.d/05_compat-version [new file with mode: 0644]
target/linux/mediatek/image/filogic.mk
target/linux/mediatek/patches-5.15/194-dts-mt7968a-add-ramoops.patch [new file with mode: 0644]
target/linux/mediatek/patches-5.15/195-dts-mt7986a-bpi-r3-leds-port-names-and-wifi-eeprom.patch [new file with mode: 0644]
target/linux/mediatek/patches-5.15/941-arm64-dts-mt7986-move-cpuboot-in-a-dedicated-node.patch
target/linux/mediatek/patches-5.15/945-arm64-dts-mt7986-move-ilm-in-a-dedicated-node.patch
target/linux/mediatek/patches-5.15/946-arm64-dts-mt7986-move-dlm-in-a-dedicated-node.patch

index bed7871d6ec92c6876217314dec0c93d79daa567..239be9645f38ff60bcab1c09b3d1d1637dd05f3e 100644 (file)
        };
 };
 
+&crypto {
+       status = "okay";
+};
+
 &eth {
        status = "okay";
 
        };
 };
 
-&wmac {
+&watchdog {
+       status = "okay";
+};
+
+&wifi {
        status = "okay";
        pinctrl-names = "default", "dbdc";
        pinctrl-0 = <&wf_2g_5g_pins>;
        pinctrl-1 = <&wf_dbdc_pins>;
 };
 
+&trng {
+       status = "okay";
+};
+
 &uart0 {
        status = "okay";
 };
diff --git a/target/linux/mediatek/dts/mt7986a-bananapi-bpi-r3-emmc-nor.dts b/target/linux/mediatek/dts/mt7986a-bananapi-bpi-r3-emmc-nor.dts
deleted file mode 100644 (file)
index 1c82782..0000000
+++ /dev/null
@@ -1,80 +0,0 @@
-/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
-
-/dts-v1/;
-/plugin/;
-
-/ {
-       compatible = "bananapi,bpi-r3", "mediatek,mt7986a";
-
-       fragment@0 {
-               target-path = "/soc/mmc@11230000";
-               __overlay__ {
-                       pinctrl-names = "default", "state_uhs";
-                       pinctrl-0 = <&mmc0_pins_default>;
-                       pinctrl-1 = <&mmc0_pins_uhs>;
-                       bus-width = <8>;
-                       max-frequency = <200000000>;
-                       /delete-property/ cap-sd-highspeed;
-                       cap-mmc-highspeed;
-                       mmc-hs200-1_8v;
-                       mmc-hs400-1_8v;
-                       hs400-ds-delay = <0x14014>;
-                       vmmc-supply = <&reg_3p3v>;
-                       vqmmc-supply = <&reg_1p8v>;
-                       non-removable;
-                       no-sd;
-                       no-sdio;
-                       status = "okay";
-               };
-       };
-
-       fragment@1 {
-               target-path = "/soc/spi@1100a000";
-               __overlay__ {
-                       flash@0 {
-                               compatible = "jedec,spi-nor";
-                               reg = <0>;
-                               spi-max-frequency = <10000000>;
-
-                               partitions {
-                                       compatible = "fixed-partitions";
-                                       #address-cells = <1>;
-                                       #size-cells = <1>;
-
-                                       partition@0 {
-                                               label = "bl2";
-                                               reg = <0x0 0x40000>;
-                                               read-only;
-                                       };
-
-                                       partition@40000 {
-                                               label = "u-boot-env";
-                                               reg = <0x40000 0x40000>;
-                                       };
-
-                                       partition@80000 {
-                                               label = "reserved2";
-                                               reg = <0x80000 0x80000>;
-                                       };
-
-                                       partition@100000 {
-                                               label = "fip";
-                                               reg = <0x100000 0x80000>;
-                                               read-only;
-                                       };
-
-                                       partition@180000 {
-                                               label = "recovery";
-                                               reg = <0x180000 0xa80000>;
-                                       };
-
-                                       partition@c00000 {
-                                               label = "fit";
-                                               reg = <0xc00000 0x1400000>;
-                                               compatible = "denx,fit";
-                                       };
-                               };
-                       };
-               };
-       };
-};
diff --git a/target/linux/mediatek/dts/mt7986a-bananapi-bpi-r3-emmc-snand.dts b/target/linux/mediatek/dts/mt7986a-bananapi-bpi-r3-emmc-snand.dts
deleted file mode 100644 (file)
index 2ca865d..0000000
+++ /dev/null
@@ -1,71 +0,0 @@
-/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
-
-/dts-v1/;
-/plugin/;
-
-/ {
-       compatible = "bananapi,bpi-r3", "mediatek,mt7986a";
-
-       fragment@0 {
-               target-path = "/soc/mmc@11230000";
-               __overlay__ {
-                       pinctrl-names = "default", "state_uhs";
-                       pinctrl-0 = <&mmc0_pins_default>;
-                       pinctrl-1 = <&mmc0_pins_uhs>;
-                       bus-width = <8>;
-                       max-frequency = <200000000>;
-                       /delete-property/ cap-sd-highspeed;
-                       cap-mmc-highspeed;
-                       mmc-hs200-1_8v;
-                       mmc-hs400-1_8v;
-                       hs400-ds-delay = <0x14014>;
-                       vmmc-supply = <&reg_3p3v>;
-                       vqmmc-supply = <&reg_1p8v>;
-                       non-removable;
-                       no-sd;
-                       no-sdio;
-                       status = "okay";
-               };
-       };
-
-       fragment@1 {
-               target-path = "/soc/spi@1100a000";
-               __overlay__ {
-                       flash@0 {
-                               compatible = "spi-nand";
-                               reg = <0>;
-                               spi-max-frequency = <10000000>;
-                               spi-tx-buswidth = <4>;
-                               spi-rx-buswidth = <4>;
-
-                               partitions {
-                                       compatible = "fixed-partitions";
-                                       #address-cells = <1>;
-                                       #size-cells = <1>;
-
-                                       partition@0 {
-                                               label = "bl2";
-                                               reg = <0x0 0x80000>;
-                                               read-only;
-                                       };
-
-                                       partition@80000 {
-                                               label = "reserved";
-                                               reg = <0x80000 0x300000>;
-                                       };
-
-                                       partition@380000 {
-                                               label = "fip";
-                                               reg = <0x380000 0x200000>;
-                                               read-only;
-                                       };
-
-                                       partition@580000 {
-                                               label = "ubi";
-                                               reg = <0x580000 0x7a80000>;
-                                       };
-                               };
-                       };
-               };
-       };
-};
diff --git a/target/linux/mediatek/dts/mt7986a-bananapi-bpi-r3-nor.dts b/target/linux/mediatek/dts/mt7986a-bananapi-bpi-r3-nor.dts
deleted file mode 100644 (file)
index f597b86..0000000
+++ /dev/null
@@ -1,58 +0,0 @@
-/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
-
-/dts-v1/;
-/plugin/;
-
-/ {
-       compatible = "bananapi,bpi-r3", "mediatek,mt7986a";
-
-       fragment@0 {
-               target-path = "/soc/spi@1100a000";
-               __overlay__ {
-                       flash@0 {
-                               compatible = "jedec,spi-nor";
-                               reg = <0>;
-                               spi-max-frequency = <10000000>;
-
-                               partitions {
-                                       compatible = "fixed-partitions";
-                                       #address-cells = <1>;
-                                       #size-cells = <1>;
-
-                                       partition@0 {
-                                               label = "bl2";
-                                               reg = <0x0 0x40000>;
-                                               read-only;
-                                       };
-
-                                       partition@40000 {
-                                               label = "u-boot-env";
-                                               reg = <0x40000 0x40000>;
-                                       };
-
-                                       partition@80000 {
-                                               label = "reserved2";
-                                               reg = <0x80000 0x80000>;
-                                       };
-
-                                       partition@100000 {
-                                               label = "fip";
-                                               reg = <0x100000 0x80000>;
-                                               read-only;
-                                       };
-
-                                       partition@180000 {
-                                               label = "recovery";
-                                               reg = <0x180000 0xa80000>;
-                                       };
-
-                                       partition@c00000 {
-                                               label = "fit";
-                                               reg = <0xc00000 0x1400000>;
-                                               compatible = "denx,fit";
-                                       };
-                               };
-                       };
-               };
-       };
-};
diff --git a/target/linux/mediatek/dts/mt7986a-bananapi-bpi-r3-snand.dts b/target/linux/mediatek/dts/mt7986a-bananapi-bpi-r3-snand.dts
deleted file mode 100644 (file)
index e29ea2a..0000000
+++ /dev/null
@@ -1,49 +0,0 @@
-/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
-
-/dts-v1/;
-/plugin/;
-
-/ {
-       compatible = "bananapi,bpi-r3", "mediatek,mt7986a";
-
-       fragment@0 {
-               target-path = "/soc/spi@1100a000";
-               __overlay__ {
-                       nand-flash@0 {
-                               compatible = "spi-nand";
-                               reg = <0>;
-                               spi-max-frequency = <10000000>;
-                               spi-tx-buswidth = <4>;
-                               spi-rx-buswidth = <4>;
-
-                               partitions {
-                                       compatible = "fixed-partitions";
-                                       #address-cells = <1>;
-                                       #size-cells = <1>;
-
-                                       partition@0 {
-                                               label = "bl2";
-                                               reg = <0x0 0x80000>;
-                                               read-only;
-                                       };
-
-                                       partition@80000 {
-                                               label = "reserved";
-                                               reg = <0x80000 0x300000>;
-                                       };
-
-                                       partition@380000 {
-                                               label = "fip";
-                                               reg = <0x380000 0x200000>;
-                                               read-only;
-                                       };
-
-                                       partition@580000 {
-                                               label = "ubi";
-                                               reg = <0x580000 0x7a80000>;
-                                       };
-                               };
-                       };
-               };
-       };
-};
diff --git a/target/linux/mediatek/dts/mt7986a-bananapi-bpi-r3.dts b/target/linux/mediatek/dts/mt7986a-bananapi-bpi-r3.dts
deleted file mode 100644 (file)
index bcd682f..0000000
+++ /dev/null
@@ -1,585 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0 OR MIT)
-/*
- * Copyright (C) 2021 MediaTek Inc.
- * Author: Sam.Shih <sam.shih@mediatek.com>
- */
-
-/dts-v1/;
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/gpio/gpio.h>
-
-#include "mt7986a.dtsi"
-
-/ {
-       model = "Bananapi BPI-R3";
-       compatible = "bananapi,bpi-r3", "mediatek,mt7986a";
-
-       aliases {
-               serial0 = &uart0;
-               ethernet0 = &gmac0;
-               ethernet1 = &gmac1;
-               led-boot = &led_status_green;
-               led-failsafe = &led_status_green;
-               led-running = &led_status_green;
-               led-upgrade = &led_status_blue;
-       };
-
-       chosen {
-               stdout-path = "serial0:115200n8";
-       };
-
-       memory@40000000 {
-               device_type = "memory";
-               reg = <0 0x40000000 0 0x40000000>;
-       };
-
-       reg_1p8v: regulator-1p8v {
-               compatible = "regulator-fixed";
-               regulator-name = "fixed-1.8V";
-               regulator-min-microvolt = <1800000>;
-               regulator-max-microvolt = <1800000>;
-               regulator-boot-on;
-               regulator-always-on;
-       };
-
-       reg_3p3v: regulator-3p3v {
-               compatible = "regulator-fixed";
-               regulator-name = "fixed-3.3V";
-               regulator-min-microvolt = <3300000>;
-               regulator-max-microvolt = <3300000>;
-               regulator-boot-on;
-               regulator-always-on;
-       };
-
-       reg_5v: regulator-5v {
-               compatible = "regulator-fixed";
-               regulator-name = "fixed-5V";
-               regulator-min-microvolt = <5000000>;
-               regulator-max-microvolt = <5000000>;
-               regulator-boot-on;
-               regulator-always-on;
-       };
-
-       keys {
-               compatible = "gpio-keys";
-
-/*
- * RST button is also PCIe-CLKREQ signal, use WPS button as reset
- * instead as RST button doesn't make sense and cannot be used.
- *
- * intended buttons:
-               factory {
-                       label = "reset";
-                       linux,code = <KEY_RESTART>;
-                       gpios = <&pio 9 GPIO_ACTIVE_LOW>;
-               };
-
-               wps {
-                       label = "wps";
-                       linux,code = <KEY_WPS_BUTTON>;
-                       gpios = <&pio 10 GPIO_ACTIVE_LOW>;
-               };
- * actual setup:
- */
-               wps {
-                       label = "wps";
-                       linux,code = <KEY_RESTART>;
-                       gpios = <&pio 10 GPIO_ACTIVE_LOW>;
-               };
-       };
-
-       leds {
-               compatible = "gpio-leds";
-
-               led_status_green: green {
-                       label = "green:status";
-                       gpios = <&pio 69 GPIO_ACTIVE_HIGH>;
-                       default-state = "on";
-               };
-
-               led_status_blue: blue {
-                       label = "blue:status";
-                       gpios = <&pio 86 GPIO_ACTIVE_HIGH>;
-               };
-       };
-
-       /* SFP1 cage (WAN) */
-       i2c_sfp1: i2c-gpio-0 {
-               compatible = "i2c-gpio";
-               sda-gpios = <&pio 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
-               scl-gpios = <&pio 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
-               i2c-gpio,delay-us = <2>;
-               #address-cells = <1>;
-               #size-cells = <0>;
-       };
-
-       sfp1: sfp1 {
-               compatible = "sff,sfp";
-               i2c-bus = <&i2c_sfp1>;
-               los-gpios = <&pio 46 GPIO_ACTIVE_HIGH>;
-               mod-def0-gpios = <&pio 49 GPIO_ACTIVE_LOW>;
-               tx-disable-gpios = <&pio 20 GPIO_ACTIVE_HIGH>;
-               tx-fault-gpios = <&pio 7 GPIO_ACTIVE_HIGH>;
-               maximum-power-milliwatt = <3000>;
-       };
-
-       /* SFP2 cage (LAN) */
-       i2c_sfp2: i2c-gpio-1 {
-               compatible = "i2c-gpio";
-               sda-gpios = <&pio 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
-               scl-gpios = <&pio 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
-               i2c-gpio,delay-us = <2>;
-               #address-cells = <1>;
-               #size-cells = <0>;
-       };
-
-       sfp2: sfp2 {
-               compatible = "sff,sfp";
-               i2c-bus = <&i2c_sfp2>;
-               los-gpios = <&pio 31 GPIO_ACTIVE_HIGH>;
-               mod-def0-gpios = <&pio 47 GPIO_ACTIVE_LOW>;
-               tx-disable-gpios = <&pio 15 GPIO_ACTIVE_HIGH>;
-               tx-fault-gpios = <&pio 48 GPIO_ACTIVE_HIGH>;
-               maximum-power-milliwatt = <3000>;
-       };
-};
-
-&eth {
-       status = "okay";
-
-       gmac0: mac@0 {
-               compatible = "mediatek,eth-mac";
-               reg = <0>;
-               phy-mode = "2500base-x";
-
-               fixed-link {
-                       speed = <2500>;
-                       full-duplex;
-                       pause;
-               };
-       };
-
-       gmac1: mac@1 {
-               compatible = "mediatek,eth-mac";
-               reg = <1>;
-               phy-mode = "2500base-x";
-               sfp = <&sfp1>;
-               managed = "in-band-status";
-       };
-
-       mdio: mdio-bus {
-               #address-cells = <1>;
-               #size-cells = <0>;
-       };
-};
-
-&mdio {
-       switch: switch@0 {
-               compatible = "mediatek,mt7531";
-               reg = <31>;
-               reset-gpios = <&pio 5 GPIO_ACTIVE_LOW>;
-               interrupt-controller;
-               #interrupt-cells = <1>;
-               interrupt-parent = <&pio>;
-               interrupts = <66 IRQ_TYPE_LEVEL_HIGH>;
-       };
-};
-
-&switch {
-       ports {
-               #address-cells = <1>;
-               #size-cells = <0>;
-
-               port@0 {
-                       reg = <0>;
-                       label = "wan";
-               };
-
-               port@1 {
-                       reg = <1>;
-                       label = "lan1";
-               };
-
-               port@2 {
-                       reg = <2>;
-                       label = "lan2";
-               };
-
-               port@3 {
-                       reg = <3>;
-                       label = "lan3";
-               };
-
-               port@4 {
-                       reg = <4>;
-                       label = "lan4";
-               };
-
-               port5: port@5 {
-                       reg = <5>;
-                       label = "sfp2";
-                       phy-mode = "2500base-x";
-                       sfp = <&sfp2>;
-                       managed = "in-band-status";
-               };
-
-               port@6 {
-                       reg = <6>;
-                       ethernet = <&gmac0>;
-                       phy-mode = "2500base-x";
-
-                       fixed-link {
-                               speed = <2500>;
-                               full-duplex;
-                               pause;
-                       };
-               };
-       };
-};
-
-&crypto {
-       status = "okay";
-};
-
-&mmc0 {
-       //sdcard
-       pinctrl-names = "default", "state_uhs";
-       pinctrl-0 = <&mmc0_pins_default>;
-       pinctrl-1 = <&mmc0_pins_uhs>;
-       bus-width = <4>;
-       max-frequency = <52000000>;
-       cap-sd-highspeed;
-       vmmc-supply = <&reg_3p3v>;
-       vqmmc-supply = <&reg_1p8v>;
-       status = "okay";
-};
-
-&pcie {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pcie_pins>;
-       status = "okay";
-};
-
-&pcie_phy {
-       status = "okay";
-};
-
-&wmac {
-       status = "okay";
-       pinctrl-names = "default", "dbdc";
-       pinctrl-0 = <&wf_2g_5g_pins>, <&wf_led_pins>;
-       pinctrl-1 = <&wf_dbdc_pins>, <&wf_led_pins>;
-};
-
-&pio {
-       /* don't mess around with GPIO 419, 450, 451, 498, 510 in sysfs system will freeze. */
-       mmc0_pins_default: mmc0-pins {
-               mux {
-                       function = "emmc";
-                       groups = "emmc_51";
-               };
-               conf-cmd-dat {
-                       pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
-                              "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
-                              "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
-                       input-enable;
-                       drive-strength = <4>;
-                       mediatek,pull-up-adv = <1>;     /* pull-up 10K */
-               };
-               conf-clk {
-                       pins = "EMMC_CK";
-                       drive-strength = <6>;
-                       mediatek,pull-down-adv = <2>;   /* pull-down 50K */
-               };
-               conf-ds {
-                       pins = "EMMC_DSL";
-                       mediatek,pull-down-adv = <2>;   /* pull-down 50K */
-               };
-               conf-rst {
-                       pins = "EMMC_RSTB";
-                       drive-strength = <4>;
-                       mediatek,pull-up-adv = <1>;     /* pull-up 10K */
-               };
-       };
-
-       mmc0_pins_uhs: mmc0-uhs-pins {
-               mux {
-                       function = "emmc";
-                       groups = "emmc_51";
-               };
-               conf-cmd-dat {
-                       pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
-                              "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
-                              "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
-                       input-enable;
-                       drive-strength = <4>;
-                       mediatek,pull-up-adv = <1>;     /* pull-up 10K */
-               };
-               conf-clk {
-                       pins = "EMMC_CK";
-                       drive-strength = <6>;
-                       mediatek,pull-down-adv = <2>;   /* pull-down 50K */
-               };
-               conf-ds {
-                       pins = "EMMC_DSL";
-                       mediatek,pull-down-adv = <2>;   /* pull-down 50K */
-               };
-               conf-rst {
-                       pins = "EMMC_RSTB";
-                       drive-strength = <4>;
-                       mediatek,pull-up-adv = <1>;     /* pull-up 10K */
-               };
-       };
-
-       pcie_pins: pcie-pins {
-               mux {
-                       function = "pcie";
-                       groups = "pcie_clk", "pcie_pereset"; //"pcie_wake" is unused
-               };
-       };
-
-       spi_flash_pins: spi-flash-pins {
-               mux {
-                       function = "spi";
-                       groups = "spi0", "spi0_wp_hold";
-               };
-       };
-
-       uart1_pins: uart1-pins {
-               mux {
-                       function = "uart";
-                       groups = "uart1";
-               };
-       };
-
-       i2c0_pins: i2c0-pins {
-               mux {
-                       function = "i2c";
-                       groups = "i2c";
-               };
-       };
-
-       pwm_pins: pwm-pins {
-               mux {
-                       function = "pwm";
-                       groups = "pwm0", "pwm1_0";
-               };
-       };
-
-       wf_led_pins: wf-led-pins {
-               mux {
-                       function = "led";
-                       groups = "wifi_led";
-               };
-       };
-
-       wf_2g_5g_pins: wf-2g-5g-pins {
-               mux {
-                       function = "wifi";
-                       groups = "wf_2g", "wf_5g";
-               };
-               conf {
-                       pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
-                              "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
-                              "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
-                              "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
-                              "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
-                              "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
-                              "WF1_TOP_CLK", "WF1_TOP_DATA";
-                       drive-strength = <4>;
-               };
-       };
-
-       wf_dbdc_pins: wf-dbdc-pins {
-               mux {
-                       function = "wifi";
-                       groups = "wf_dbdc";
-               };
-               conf {
-                       pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
-                              "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
-                              "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
-                              "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
-                              "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
-                              "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
-                              "WF1_TOP_CLK", "WF1_TOP_DATA";
-                       drive-strength = <4>;
-               };
-       };
-};
-
-&spi0 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&spi_flash_pins>;
-
-       status = "okay";
-};
-
-&ssusb {
-       vusb33-supply = <&reg_3p3v>;
-       vbus-supply = <&reg_5v>;
-       status = "okay";
-};
-
-&uart0 {
-       status = "okay";
-};
-
-&uart1 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&uart1_pins>;
-       status = "okay";
-};
-
-&usb_phy {
-       status = "okay";
-};
-
-&i2c0 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&i2c0_pins>;
-       status = "okay";
-};
-
-&pwm {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pwm_pins>;
-       status = "okay";
-};
-
-&fan {
-       pwms = <&pwm 0 10000 0>;
-       cooling-levels = <255 96 52 0>;
-       status = "okay";
-};
-
-&wmac {
-       mediatek,eeprom-data = <0x86790900 0xc4326 0x60000000 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x1000000
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x800 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x24649090 0x280000 0x5100000 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x21e00 0x21e0002 0x1e00021e 0x22800 0x2280002 0x28000228 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x8080 0x8080fdf7
-                               0x903150d 0x80808080 0x80808080 0x5050d0d 0x1313c6c6 0xc3c3c200 0xc200c2 0x8182
-                               0x8585c2c2 0x82828282 0x858500c2 0xc2000081 0x82858587 0x87c2c200 0x81818285 0x858787c2
-                               0xc2000081 0x82858587 0x87c2c200 0x818285 0x858787c2 0xc2000081 0x82858587 0x87c4c4c2
-                               0xc100c300 0xc3c3c100 0x818383c3 0xc3c3c100 0x81838300 0xc2c2c2c0 0x81828484 0xc3
-                               0xc3c3c100 0x81838386 0x86c3c3c3 0xc1008183 0x838686c2 0xc2c2c081 0x82848486 0x86c3c3c3
-                               0xc1008183 0x838686c3 0xc3c3c100 0x81838386 0x86c3c3c3 0xc1008183 0x83868622 0x28002228
-                               0x222800 0x22280000 0xdddddddd 0xdddddddd 0xddbbbbbb 0xccccccdd 0xdddddddd 0xdddddddd
-                               0xeeeeeecc 0xccccdddd 0xdddddddd 0x4a5662 0x4a 0x56620000 0x4a5662 0x4a
-                               0x56620000 0x88888888 0x33333326 0x26262626 0x26262600 0x33333326 0x26262626 0x26262600
-                               0x33333326 0x26262626 0x26262600 0x33333326 0x26262626 0x26262600 0x00 0xf0f0cc00
-                               0x00 0xaaaa 0xaabbbbbb 0xcccccccc 0xccccbbbb 0xbbbbbbbb 0xbbbbbbaa 0xaaaabbbb
-                               0xbbaaaaaa 0x999999aa 0xaaaabbbb 0xbbcccccc 0x00 0xaaaa 0xaa000000 0xbbbbbbbb
-                               0xbbbbaaaa 0xaa999999 0xaaaaaaaa 0xaaaaaaaa 0xaaaaaaaa 0xaaaaaaaa 0xaaaabbbb 0xbbbbbbbb
-                               0x00 0x00 0x00 0x99999999 0x9999aaaa 0xaaaaaaaa 0x999999aa 0xaaaaaaaa
-                               0xaaaaaaaa 0xaaaaaaaa 0xaaaabbbb 0xbbbbbbbb 0x00 0xeeee 0xeeffffff 0xcccccccc
-                               0xccccdddd 0xddbbbbbb 0xccccccbb 0xbbbbbbbb 0xbbbbbbbb 0xbbbbbbbb 0xbbbbcccc 0xccdddddd
-                               0x516200 0x686e0051 0x6200686e 0x516200 0x686e0051 0x6200686e 0x516200 0x686e0051
-                               0x6200686e 0x516200 0x686e0051 0x6200686e 0x516200 0x686e0051 0x6200686e 0x516200
-                               0x686e0051 0x6200686e 0x516200 0x686e0051 0x6200686e 0x516200 0x686e0051 0x6200686e
-                               0x516200 0x686e0051 0x6200686e 0x516200 0x686e0051 0x6200686e 0x516200 0x686e0051
-                               0x6200686e 0x516200 0x686e0051 0x6200686e 0x516200 0x686e0051 0x6200686e 0x516200
-                               0x686e0051 0x6200686e 0x516200 0x686e0051 0x6200686e 0x516200 0x686e0051 0x6200686e
-                               0x88888888 0x88888888 0x88888888 0x88888888 0x88888888 0x88888888 0x88888888 0x88888888
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x01 0x6000100 0x1050002 0xff0300
-                               0xf900fe03 0x00 0x00 0x9b 0x6e370000 0x00 0xfc0009 0xa00fe00
-                               0x60700fe 0x70800 0x5000b0a 0x00 0x00 0xe2 0x96460000 0x00
-                               0x400f7 0xf8000300 0xfcfe0003 0xfbfc00 0xee00e3f2 0x00 0x00 0x11
-                               0xbb550000 0x00 0x600f6 0xfc000300 0xfbfe0004 0xfafe00 0xf600ecf2 0x00
-                               0x00 0x1f 0xbf580000 0x00 0x600f5 0xf6000400 0xf8f90004 0xf7f800
-                               0xf700f0f4 0x00 0x00 0x24 0xbe570000 0x00 0x800f8 0xfe000600
-                               0xf8fd0007 0xf9fe00 0xf500f0f4 0x00 0x00 0x2d 0xd6610000 0x00
-                               0x400f7 0xfc000500 0xf7fc0005 0xf7fc00 0xf900f5f8 0x00 0x00 0x26
-                               0xd96e0000 0x00 0x400f7 0xf9000600 0xf5f70005 0xf5f800 0xf900f4f7 0x00
-                               0x00 0x1b 0xce690000 0x00 0x300f8 0xf8000600 0xf6f60004 0xf6f700
-                               0xf900f4f7 0x00 0x00 0x18 0xd8720000 0x00 0x00 0x2404002
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0xc1c2c1c2 0x41c341c3 0x3fc13fc1 0x40c13fc2 0x3fc240c1 0x41c040c0 0x3fc23fc2 0x40c13fc2
-                               0x3fc140c0 0x41c040c0 0x3fc33fc3 0x40c23fc2 0x3fc240c1 0x41c040c0 0x3fc23fc2 0x40c23fc2
-                               0x3fc140c1 0x41c040c0 0x00 0x00 0x41c741c7 0xc1c7c1c7 0x00 0x00
-                               0x3fc03fc0 0x3fc03fc0 0x3fc03fc0 0x3fc03fc0 0x3fc03fc0 0x3fc03fc0 0x3fc03fc0 0x3fc03fc0
-                               0x3fc03fc0 0x3fc03fc0 0x3fc03fc0 0x3fc03fc0 0x3fc03fc0 0x3fc03fc0 0x3fc03fc0 0x3fc03fc0
-                               0xa0ce00 0x00 0xb6840000 0x00 0x00 0x00 0x18181818 0x18181818
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x4b5763 0x4b 0x57630000 0x4b5763 0x4b 0x57630000 0x88888888 0x8474759
-                               0x69780849 0x49596d7a 0x849495a 0x6d790848 0x48596c78 0x8484858 0x6a780848 0x48586a78
-                               0x8484858 0x6c78084a 0x4a5b6d79 0x8474759 0x697a0848 0x48596b79 0x8484859 0x6c7a0848
-                               0x48586c79 0x8484857 0x68770848 0x48576877 0x8484857 0x6a77084a 0x4a5a6a77 0x8464659
-                               0x69790848 0x48586b79 0x8484858 0x6c7a0848 0x48596c79 0x8484857 0x68770848 0x48576877
-                               0x8494958 0x6d7a084b 0x4b5c6c77 0x847475a 0x6a7b0849 0x495a6e7c 0x849495a 0x6e7c0849
-                               0x495b6e7c 0x8494959 0x6a7a0849 0x49596a7a 0x84a4a5a 0x6f7d084b 0x4b5c6e7b 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x85848484
-                               0xc3c4c4c5 0xc4c3c33f 0xc3c3c2c2 0xc2c2c03f 0xc3c3c3c4 0xc4c4c33f 0xc2c2c2c2 0xc1c3c1c1
-                               0xc0c08282 0x83848686 0x88880000 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x1111 0x00
-                               0x8080f703 0x10808080 0x80050d13 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0xa4 0xce000000 0xb684 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-                               0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00>;
-};
index 739e500a12170bc9ea39143fefc50ecc1f36356b..94edfd121e42cf300c764ea37028b77de9988176 100644 (file)
        };
 };
 
+&crypto {
+       status = "okay";
+};
+
 &eth {
        status = "okay";
 
        status = "okay";
 };
 
+&trng {
+       status = "okay";
+};
+
 &uart0 {
        status = "okay";
 };
        status = "okay";
 };
 
-&wmac {
+&watchdog {
+       status = "okay";
+};
+
+&wifi {
        mediatek,mtd-eeprom = <&factory 0x0>;
        nvmem-cells = <&macaddr_config_1c>;
        nvmem-cell-names = "mac-address";
index b7f7d2d3712f8e549d429faf684e66016840cf79..591d16195e233a724ed81c21c14b6f96b42bad32 100644 (file)
@@ -73,7 +73,7 @@
        };
 };
 
-&wmac {
+&wifi {
        pinctrl-names = "dbdc";
        pinctrl-0 = <&wf_dbdc_pins>;
 };
index ffe57e55026da07df58c71f0a562e560b7be3e67..68a159a8e7c173079dfbe61a21c682c87803b64e 100644 (file)
@@ -58,7 +58,7 @@
        };
 };
 
-&wmac {
+&wifi {
        pinctrl-names = "default";
        pinctrl-0 = <&wf_2g_5g_pins>;
 };
index 213f89918fe8de0b6d210c40f03981cfb71e74cc..751909a6aa2f2297bca2d8150d99c6dbc534e0a9 100644 (file)
@@ -73,7 +73,7 @@
        };
 };
 
-&wmac {
+&wifi {
        pinctrl-names = "default";
        pinctrl-0 = <&wf_2g_5g_pins>;
 };
index 101b81f8a9a8f9edce82ba98bd36961c0da483ab..13f37cd7630b8dc9c89d82dafcbda1e69acfe0f1 100644 (file)
        };
 };
 
+&crypto {
+       status = "okay";
+};
+
 &eth {
        status = "okay";
 
        };
 };
 
-&wmac {
+&trng {
+       status = "okay";
+};
+
+&uart0 {
+       status = "okay";
+};
+
+&watchdog {
+       status = "okay";
+};
+
+&wifi {
        status = "okay";
        pinctrl-names = "default";
        pinctrl-0 = <&wf_2g_5g_pins>;
index 32b581c3c2a34fdc79c9fdc8effdb01a10a0322d..bc9f6688b39361547bcf62960cde768c9c396714 100644 (file)
        };
 };
 
-&wmac {
+&watchdog {
+       status = "okay";
+};
+
+&wifi {
        status = "okay";
        pinctrl-names = "default", "dbdc";
        pinctrl-0 = <&wf_2g_5g_pins>;
        status = "okay";
 };
 
+&trng {
+       status = "okay";
+};
+
 &uart0 {
        status = "okay";
 };
index 304566810a0b3eff52dceaaef65115ac8504881a..3629a6f6dda70cdbc276cc1c2bad98496a41b339 100644 (file)
 
        wifi: wifi@18000000 {
                compatible = "mediatek,mt7981-wmac";
-               resets = <&watchdog MT7986_TOPRGU_CONSYS_RST>;
+               resets = <&watchdog MT7986_TOPRGU_CONSYS_SW_RST>;
                reset-names = "consys";
                pinctrl-0 = <&wifi_dbdc_pins>;
                pinctrl-names = "dbdc";
diff --git a/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-emmc.dtso b/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-emmc.dtso
new file mode 100644 (file)
index 0000000..779dc67
--- /dev/null
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (C) 2021 MediaTek Inc.
+ * Author: Sam.Shih <sam.shih@mediatek.com>
+ */
+
+/dts-v1/;
+/plugin/;
+
+/ {
+       compatible = "bananapi,bpi-r3", "mediatek,mt7986a";
+
+       fragment@0 {
+               target-path = "/soc/mmc@11230000";
+               __overlay__ {
+                       bus-width = <8>;
+                       max-frequency = <200000000>;
+                       cap-mmc-highspeed;
+                       mmc-hs200-1_8v;
+                       mmc-hs400-1_8v;
+                       hs400-ds-delay = <0x14014>;
+                       non-removable;
+                       no-sd;
+                       no-sdio;
+                       status = "okay";
+               };
+       };
+};
+
diff --git a/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-nand.dtso b/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-nand.dtso
new file mode 100644 (file)
index 0000000..15ee8c5
--- /dev/null
@@ -0,0 +1,55 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
+/*
+ * Authors: Daniel Golle <daniel@makrotopia.org>
+ *          Frank Wunderlich <frank-w@public-files.de>
+ */
+
+/dts-v1/;
+/plugin/;
+
+/ {
+       compatible = "bananapi,bpi-r3", "mediatek,mt7986a";
+
+       fragment@0 {
+               target-path = "/soc/spi@1100a000";
+               __overlay__ {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       spi_nand: spi_nand@0 {
+                               compatible = "spi-nand";
+                               reg = <0>;
+                               spi-max-frequency = <10000000>;
+                               spi-tx-buswidth = <4>;
+                               spi-rx-buswidth = <4>;
+
+                               partitions {
+                                       compatible = "fixed-partitions";
+                                       #address-cells = <1>;
+                                       #size-cells = <1>;
+
+                                       partition@0 {
+                                               label = "bl2";
+                                               reg = <0x0 0x80000>;
+                                               read-only;
+                                       };
+
+                                       partition@80000 {
+                                               label = "reserved";
+                                               reg = <0x80000 0x300000>;
+                                       };
+
+                                       partition@380000 {
+                                               label = "fip";
+                                               reg = <0x380000 0x200000>;
+                                               read-only;
+                                       };
+
+                                       partition@580000 {
+                                               label = "ubi";
+                                               reg = <0x580000 0x7a80000>;
+                                       };
+                               };
+                       };
+               };
+       };
+};
diff --git a/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-nor.dtso b/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-nor.dtso
new file mode 100644 (file)
index 0000000..e48881b
--- /dev/null
@@ -0,0 +1,63 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
+/*
+ * Authors: Daniel Golle <daniel@makrotopia.org>
+ *          Frank Wunderlich <frank-w@public-files.de>
+ */
+
+/dts-v1/;
+/plugin/;
+
+/ {
+       compatible = "bananapi,bpi-r3", "mediatek,mt7986a";
+
+       fragment@0 {
+               target-path = "/soc/spi@1100a000";
+               __overlay__ {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       flash@0 {
+                               compatible = "jedec,spi-nor";
+                               reg = <0>;
+                               spi-max-frequency = <10000000>;
+
+                               partitions {
+                                       compatible = "fixed-partitions";
+                                       #address-cells = <1>;
+                                       #size-cells = <1>;
+
+                                       partition@0 {
+                                               label = "bl2";
+                                               reg = <0x0 0x40000>;
+                                               read-only;
+                                       };
+
+                                       partition@40000 {
+                                               label = "u-boot-env";
+                                               reg = <0x40000 0x40000>;
+                                       };
+
+                                       partition@80000 {
+                                               label = "reserved2";
+                                               reg = <0x80000 0x80000>;
+                                       };
+
+                                       partition@100000 {
+                                               label = "fip";
+                                               reg = <0x100000 0x80000>;
+                                               read-only;
+                                       };
+
+                                       partition@180000 {
+                                               label = "recovery";
+                                               reg = <0x180000 0xa80000>;
+                                       };
+
+                                       partition@c00000 {
+                                               label = "fit";
+                                               reg = <0xc00000 0x1400000>;
+                                       };
+                               };
+                       };
+               };
+       };
+};
diff --git a/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-sd.dtso b/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-sd.dtso
new file mode 100644 (file)
index 0000000..f623bce
--- /dev/null
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (C) 2021 MediaTek Inc.
+ * Author: Sam.Shih <sam.shih@mediatek.com>
+ */
+
+/dts-v1/;
+/plugin/;
+
+/ {
+       compatible = "bananapi,bpi-r3", "mediatek,mt7986a";
+
+       fragment@0 {
+               target-path = "/soc/mmc@11230000";
+               __overlay__ {
+                       bus-width = <4>;
+                       max-frequency = <52000000>;
+                       cap-sd-highspeed;
+                       status = "okay";
+               };
+       };
+};
+
diff --git a/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts b/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts
new file mode 100644 (file)
index 0000000..af4a430
--- /dev/null
@@ -0,0 +1,499 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (C) 2021 MediaTek Inc.
+ * Authors: Sam.Shih <sam.shih@mediatek.com>
+ *          Frank Wunderlich <frank-w@public-files.de>
+ *          Daniel Golle <daniel@makrotopia.org>
+ */
+
+/dts-v1/;
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/pinctrl/mt65xx.h>
+
+#include "mt7986a.dtsi"
+
+/ {
+       model = "Bananapi BPI-R3";
+       chassis-type = "embedded";
+       compatible = "bananapi,bpi-r3", "mediatek,mt7986a";
+
+       aliases {
+               serial0 = &uart0;
+               ethernet0 = &gmac0;
+               ethernet1 = &gmac1;
+       };
+
+       chosen {
+               stdout-path = "serial0:115200n8";
+       };
+
+       dcin: regulator-12vd {
+               compatible = "regulator-fixed";
+               regulator-name = "12vd";
+               regulator-min-microvolt = <12000000>;
+               regulator-max-microvolt = <12000000>;
+               regulator-boot-on;
+               regulator-always-on;
+       };
+
+       fan: pwm-fan {
+               compatible = "pwm-fan";
+               #cooling-cells = <2>;
+               /* cooling level (0, 1, 2) - pwm inverted */
+               cooling-levels = <255 96 0>;
+               pwms = <&pwm 0 10000 0>;
+               status = "okay";
+       };
+
+       gpio-keys {
+               compatible = "gpio-keys";
+
+               reset-key {
+                       label = "reset";
+                       linux,code = <KEY_RESTART>;
+                       gpios = <&pio 9 GPIO_ACTIVE_LOW>;
+               };
+
+               wps-key {
+                       label = "wps";
+                       linux,code = <KEY_WPS_BUTTON>;
+                       gpios = <&pio 10 GPIO_ACTIVE_LOW>;
+               };
+       };
+
+       /* i2c of the left SFP cage (wan) */
+       i2c_sfp1: i2c-gpio-0 {
+               compatible = "i2c-gpio";
+               sda-gpios = <&pio 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+               scl-gpios = <&pio 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+               i2c-gpio,delay-us = <2>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+       };
+
+       /* i2c of the right SFP cage (lan) */
+       i2c_sfp2: i2c-gpio-1 {
+               compatible = "i2c-gpio";
+               sda-gpios = <&pio 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+               scl-gpios = <&pio 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+               i2c-gpio,delay-us = <2>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+       };
+
+       leds {
+               compatible = "gpio-leds";
+
+               green_led: led-0 {
+                       color = <LED_COLOR_ID_GREEN>;
+                       function = LED_FUNCTION_POWER;
+                       gpios = <&pio 69 GPIO_ACTIVE_HIGH>;
+                       default-state = "on";
+               };
+
+               blue_led: led-1 {
+                       color = <LED_COLOR_ID_BLUE>;
+                       function = LED_FUNCTION_STATUS;
+                       gpios = <&pio 86 GPIO_ACTIVE_HIGH>;
+                       default-state = "off";
+               };
+       };
+
+       reg_1p8v: regulator-1p8v {
+               compatible = "regulator-fixed";
+               regulator-name = "1.8vd";
+               regulator-min-microvolt = <1800000>;
+               regulator-max-microvolt = <1800000>;
+               regulator-boot-on;
+               regulator-always-on;
+               vin-supply = <&dcin>;
+       };
+
+       reg_3p3v: regulator-3p3v {
+               compatible = "regulator-fixed";
+               regulator-name = "3.3vd";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               regulator-boot-on;
+               regulator-always-on;
+               vin-supply = <&dcin>;
+       };
+
+       /* left SFP cage (wan) */
+       sfp1: sfp-1 {
+               compatible = "sff,sfp";
+               i2c-bus = <&i2c_sfp1>;
+               los-gpios = <&pio 46 GPIO_ACTIVE_HIGH>;
+               mod-def0-gpios = <&pio 49 GPIO_ACTIVE_LOW>;
+               tx-disable-gpios = <&pio 20 GPIO_ACTIVE_HIGH>;
+               tx-fault-gpios = <&pio 7 GPIO_ACTIVE_HIGH>;
+       };
+
+       /* right SFP cage (lan) */
+       sfp2: sfp-2 {
+               compatible = "sff,sfp";
+               i2c-bus = <&i2c_sfp2>;
+               los-gpios = <&pio 31 GPIO_ACTIVE_HIGH>;
+               mod-def0-gpios = <&pio 47 GPIO_ACTIVE_LOW>;
+               tx-disable-gpios = <&pio 15 GPIO_ACTIVE_HIGH>;
+               tx-fault-gpios = <&pio 48 GPIO_ACTIVE_HIGH>;
+       };
+};
+
+&cpu_thermal {
+       cooling-maps {
+               cpu-active-high {
+                       /* active: set fan to cooling level 2 */
+                       cooling-device = <&fan 2 2>;
+                       trip = <&cpu_trip_active_high>;
+               };
+
+               cpu-active-low {
+                       /* active: set fan to cooling level 1 */
+                       cooling-device = <&fan 1 1>;
+                       trip = <&cpu_trip_active_low>;
+               };
+
+               cpu-passive {
+                       /* passive: set fan to cooling level 0 */
+                       cooling-device = <&fan 0 0>;
+                       trip = <&cpu_trip_passive>;
+               };
+       };
+};
+
+&crypto {
+       status = "okay";
+};
+
+&eth {
+       status = "okay";
+
+       gmac0: mac@0 {
+               compatible = "mediatek,eth-mac";
+               reg = <0>;
+               phy-mode = "2500base-x";
+
+               fixed-link {
+                       speed = <2500>;
+                       full-duplex;
+                       pause;
+               };
+       };
+
+       gmac1: mac@1 {
+               compatible = "mediatek,eth-mac";
+               reg = <1>;
+               phy-mode = "2500base-x";
+               sfp = <&sfp1>;
+               managed = "in-band-status";
+       };
+
+       mdio: mdio-bus {
+               #address-cells = <1>;
+               #size-cells = <0>;
+       };
+};
+
+&mdio {
+       switch: switch@31 {
+               compatible = "mediatek,mt7531";
+               reg = <31>;
+               interrupt-controller;
+               #interrupt-cells = <1>;
+               interrupt-parent = <&pio>;
+               interrupts = <66 IRQ_TYPE_LEVEL_HIGH>;
+               reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
+       };
+};
+
+&mmc0 {
+       pinctrl-names = "default", "state_uhs";
+       pinctrl-0 = <&mmc0_pins_default>;
+       pinctrl-1 = <&mmc0_pins_uhs>;
+       vmmc-supply = <&reg_3p3v>;
+       vqmmc-supply = <&reg_1p8v>;
+};
+
+&i2c0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&i2c_pins>;
+       status = "okay";
+};
+
+&pcie {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pcie_pins>;
+       status = "okay";
+};
+
+&pcie_phy {
+       status = "okay";
+};
+
+&pio {
+       i2c_pins: i2c-pins {
+               mux {
+                       function = "i2c";
+                       groups = "i2c";
+               };
+       };
+
+       mmc0_pins_default: mmc0-pins {
+               mux {
+                       function = "emmc";
+                       groups = "emmc_51";
+               };
+               conf-cmd-dat {
+                       pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
+                              "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
+                              "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
+                       input-enable;
+                       drive-strength = <4>;
+                       bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
+               };
+               conf-clk {
+                       pins = "EMMC_CK";
+                       drive-strength = <6>;
+                       bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
+               };
+               conf-ds {
+                       pins = "EMMC_DSL";
+                       bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
+               };
+               conf-rst {
+                       pins = "EMMC_RSTB";
+                       drive-strength = <4>;
+                       bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
+               };
+       };
+
+       mmc0_pins_uhs: mmc0-uhs-pins {
+               mux {
+                       function = "emmc";
+                       groups = "emmc_51";
+               };
+               conf-cmd-dat {
+                       pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
+                              "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
+                              "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
+                       input-enable;
+                       drive-strength = <4>;
+                       bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
+               };
+               conf-clk {
+                       pins = "EMMC_CK";
+                       drive-strength = <6>;
+                       bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
+               };
+               conf-ds {
+                       pins = "EMMC_DSL";
+                       bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
+               };
+               conf-rst {
+                       pins = "EMMC_RSTB";
+                       drive-strength = <4>;
+                       bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
+               };
+       };
+
+       pcie_pins: pcie-pins {
+               mux {
+                       function = "pcie";
+                       groups = "pcie_clk", "pcie_pereset";
+               };
+       };
+
+       pwm_pins: pwm-pins {
+               mux {
+                       function = "pwm";
+                       groups = "pwm0", "pwm1_0";
+               };
+       };
+
+       spi_flash_pins: spi-flash-pins {
+               mux {
+                       function = "spi";
+                       groups = "spi0", "spi0_wp_hold";
+               };
+       };
+
+       spic_pins: spic-pins {
+               mux {
+                       function = "spi";
+                       groups = "spi1_0";
+               };
+       };
+
+       uart1_pins: uart1-pins {
+               mux {
+                       function = "uart";
+                       groups = "uart1_rx_tx";
+               };
+       };
+
+       uart2_pins: uart2-pins {
+               mux {
+                       function = "uart";
+                       groups = "uart2_0_rx_tx";
+               };
+       };
+
+       wf_2g_5g_pins: wf-2g-5g-pins {
+               mux {
+                       function = "wifi";
+                       groups = "wf_2g", "wf_5g";
+               };
+               conf {
+                       pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
+                              "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
+                              "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
+                              "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
+                              "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
+                              "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
+                              "WF1_TOP_CLK", "WF1_TOP_DATA";
+                       drive-strength = <4>;
+               };
+       };
+
+       wf_dbdc_pins: wf-dbdc-pins {
+               mux {
+                       function = "wifi";
+                       groups = "wf_dbdc";
+               };
+               conf {
+                       pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
+                              "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
+                              "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
+                              "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
+                              "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
+                              "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
+                              "WF1_TOP_CLK", "WF1_TOP_DATA";
+                       drive-strength = <4>;
+               };
+       };
+
+       wf_led_pins: wf-led-pins {
+               mux {
+                       function = "led";
+                       groups = "wifi_led";
+               };
+       };
+};
+
+&pwm {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pwm_pins>;
+       status = "okay";
+};
+
+&spi0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&spi_flash_pins>;
+       status = "okay";
+};
+
+&spi1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&spic_pins>;
+       status = "okay";
+};
+
+&ssusb {
+       status = "okay";
+};
+
+&switch {
+       ports {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               port@0 {
+                       reg = <0>;
+                       label = "wan";
+               };
+
+               port@1 {
+                       reg = <1>;
+                       label = "lan0";
+               };
+
+               port@2 {
+                       reg = <2>;
+                       label = "lan1";
+               };
+
+               port@3 {
+                       reg = <3>;
+                       label = "lan2";
+               };
+
+               port@4 {
+                       reg = <4>;
+                       label = "lan3";
+               };
+
+               port5: port@5 {
+                       reg = <5>;
+                       label = "lan4";
+                       phy-mode = "2500base-x";
+                       sfp = <&sfp2>;
+                       managed = "in-band-status";
+               };
+
+               port@6 {
+                       reg = <6>;
+                       label = "cpu";
+                       ethernet = <&gmac0>;
+                       phy-mode = "2500base-x";
+
+                       fixed-link {
+                               speed = <2500>;
+                               full-duplex;
+                               pause;
+                       };
+               };
+       };
+};
+
+&trng {
+       status = "okay";
+};
+
+&uart0 {
+       status = "okay";
+};
+
+&uart1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart1_pins>;
+       status = "okay";
+};
+
+&uart2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart2_pins>;
+       status = "okay";
+};
+
+&usb_phy {
+       status = "okay";
+};
+
+&watchdog {
+       status = "okay";
+};
+
+&wifi {
+       status = "okay";
+       pinctrl-names = "default", "dbdc";
+       pinctrl-0 = <&wf_2g_5g_pins>, <&wf_led_pins>;
+       pinctrl-1 = <&wf_dbdc_pins>, <&wf_led_pins>;
+
+       led {
+               led-active-low;
+       };
+};
+
index 938dd181b97221f700ff38c21dc4ba84d78cfcf2..83a37150cf07ed9243f89f6334139711bd7e0afb 100644 (file)
@@ -47,6 +47,6 @@
        };
 };
 
-&wmac {
+&wifi {
        mediatek,mtd-eeprom = <&factory 0>;
 };
index 6342981304d7f6897ba23410e0320c6e397b7bd4..868365a99429a73070a0257fef1cd7cbbd6233c3 100644 (file)
@@ -46,6 +46,6 @@
        };
 };
 
-&wmac {
+&wifi {
        mediatek,mtd-eeprom = <&factory 0>;
 };
index b63692c16121fad92c19285e5f2d249b8f8b3234..1ab56e37f741cdb697b0962dd3b83f892794137c 100644 (file)
@@ -78,7 +78,7 @@
        };
 };
 
-&wmac {
+&wifi {
        status = "okay";
        pinctrl-names = "default", "dbdc";
        pinctrl-0 = <&wf_2g_5g_pins>;
index 86090f8ebed9aedf0e4cf00f5a6a56a24a14880f..68539ea788dfcce5e52cb996693de7766607e05e 100644 (file)
@@ -4,19 +4,19 @@
  * Author: Sam.Shih <sam.shih@mediatek.com>
  */
 
-#include <dt-bindings/clock/mt7986-clk.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
-#include <dt-bindings/phy/phy.h>
+#include <dt-bindings/clock/mt7986-clk.h>
 #include <dt-bindings/reset/mt7986-resets.h>
-#include <dt-bindings/thermal/thermal.h>
+#include <dt-bindings/phy/phy.h>
 
 / {
+       compatible = "mediatek,mt7986a";
        interrupt-parent = <&gic>;
        #address-cells = <2>;
        #size-cells = <2>;
 
-       clk40m: oscillator@0 {
+       clk40m: oscillator-40m {
                compatible = "fixed-clock";
                clock-frequency = <40000000>;
                #clock-cells = <0>;
        };
 
        psci {
-               compatible  = "arm,psci-0.2";
-               method      = "smc";
+               compatible = "arm,psci-0.2";
+               method = "smc";
        };
 
        reserved-memory {
                #address-cells = <2>;
                #size-cells = <2>;
                ranges;
-
-               /* 64 KiB reserved for ramoops/pstore */
-               ramoops@42ff0000 {
-                       compatible = "ramoops";
-                       reg = <0 0x42ff0000 0 0x10000>;
-                       record-size = <0x1000>;
-               };
-
                /* 192 KiB reserved for ARM Trusted Firmware (BL31) */
                secmon_reserved: secmon@43000000 {
                        reg = <0 0x43000000 0 0x30000>;
                        reg = <0 0x15194000 0 0x1000>;
                        no-map;
                };
+
        };
 
        timer {
                        #clock-cells = <1>;
                };
 
+               wed_pcie: wed-pcie@10003000 {
+                       compatible = "mediatek,mt7986-wed-pcie",
+                                    "syscon";
+                       reg = <0 0x10003000 0 0x10>;
+               };
+
                topckgen: topckgen@1001b000 {
                        compatible = "mediatek,mt7986-topckgen", "syscon";
                        reg = <0 0x1001B000 0 0x1000>;
                };
 
                watchdog: watchdog@1001c000 {
-                       compatible = "mediatek,mt7986-wdt",
-                                    "mediatek,mt6589-wdt";
+                       compatible = "mediatek,mt7986-wdt";
                        reg = <0 0x1001c000 0 0x1000>;
                        interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
                        #reset-cells = <1>;
+                       status = "disabled";
+               };
+
+               apmixedsys: apmixedsys@1001e000 {
+                       compatible = "mediatek,mt7986-apmixedsys";
+                       reg = <0 0x1001E000 0 0x1000>;
+                       #clock-cells = <1>;
                };
 
                pio: pinctrl@1001f000 {
                        #interrupt-cells = <2>;
                };
 
-               apmixedsys: apmixedsys@1001e000 {
-                       compatible = "mediatek,mt7986-apmixedsys";
-                       reg = <0 0x1001E000 0 0x1000>;
-                       #clock-cells = <1>;
-               };
-
                sgmiisys0: syscon@10060000 {
                        compatible = "mediatek,mt7986-sgmiisys_0",
                                     "syscon";
                        #clock-cells = <1>;
                };
 
-               trng: trng@1020f000 {
-                       compatible = "mediatek,mt7986-rng";
+               trng: rng@1020f000 {
+                       compatible = "mediatek,mt7986-rng",
+                                    "mediatek,mt7623-rng";
                        reg = <0 0x1020f000 0 0x100>;
                        clocks = <&infracfg CLK_INFRA_TRNG_CK>;
                        clock-names = "rng";
-                       status = "okay";
+                       status = "disabled";
                };
 
                crypto: crypto@10320000 {
                        clock-names = "infra_eip97_ck";
                        assigned-clocks = <&topckgen CLK_TOP_EIP_B_SEL>;
                        assigned-clock-parents = <&apmixedsys CLK_APMIXED_NET2PLL>;
-                       status = "okay";
+                       status = "disabled";
                };
 
                pwm: pwm@10048000 {
                        #clock-cells = <1>;
                        #pwm-cells = <2>;
                        interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&infracfg CLK_INFRA_PWM_HCK>,
+                       clocks = <&topckgen CLK_TOP_PWM_SEL>,
                                 <&infracfg CLK_INFRA_PWM_STA>,
                                 <&infracfg CLK_INFRA_PWM1_CK>,
                                 <&infracfg CLK_INFRA_PWM2_CK>;
 
                spi0: spi@1100a000 {
                        compatible = "mediatek,mt7986-spi-ipm", "mediatek,spi-ipm";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
                        reg = <0 0x1100a000 0 0x100>;
                        interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&topckgen CLK_TOP_MPLL_D2>,
 
                spi1: spi@1100b000 {
                        compatible = "mediatek,mt7986-spi-ipm", "mediatek,spi-ipm";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
                        reg = <0 0x1100b000 0 0x100>;
                        interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&topckgen CLK_TOP_MPLL_D2>,
                };
 
                auxadc: adc@1100d000 {
-                       compatible = "mediatek,mt7986-auxadc",
-                                    "mediatek,mt7622-auxadc";
+                       compatible = "mediatek,mt7986-auxadc";
                        reg = <0 0x1100d000 0 0x1000>;
                        clocks = <&infracfg CLK_INFRA_ADC_26M_CK>;
                        clock-names = "main";
                        #io-channel-cells = <1>;
+                       status = "disabled";
                };
 
                ssusb: usb@11200000 {
                        reg-names = "mac", "ippc";
                        interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&infracfg CLK_INFRA_IUSB_SYS_CK>,
-                                <&topckgen CLK_TOP_U2U3_XHCI_SEL>,
                                 <&infracfg CLK_INFRA_IUSB_CK>,
                                 <&infracfg CLK_INFRA_IUSB_133_CK>,
-                                <&infracfg CLK_INFRA_IUSB_66M_CK>;
+                                <&infracfg CLK_INFRA_IUSB_66M_CK>,
+                                <&topckgen CLK_TOP_U2U3_XHCI_SEL>;
                        clock-names = "sys_ck",
-                                     "xhci_ck",
                                      "ref_ck",
                                      "mcu_ck",
-                                     "dma_ck";
+                                     "dma_ck",
+                                     "xhci_ck";
                        phys = <&u2port0 PHY_TYPE_USB2>,
                               <&u3port0 PHY_TYPE_USB3>,
                               <&u2port1 PHY_TYPE_USB2>;
                        reg = <0 0x11230000 0 0x1000>,
                              <0 0x11c20000 0 0x1000>;
                        interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&infracfg CLK_INFRA_MSDC_CK>,
+                       clocks = <&topckgen CLK_TOP_EMMC_416M_SEL>,
                                 <&infracfg CLK_INFRA_MSDC_HCK_CK>,
-                                <&infracfg CLK_INFRA_MSDC_66M_CK>,
-                                <&infracfg CLK_INFRA_MSDC_133M_CK>;
-                       clock-names = "source", "hclk", "axi_cg", "ahb_cg";
-                       assigned-clocks = <&topckgen CLK_TOP_EMMC_416M_SEL>,
-                                         <&topckgen CLK_TOP_EMMC_250M_SEL>;
-                       assigned-clock-parents = <&apmixedsys CLK_APMIXED_MPLL>,
-                                                <&topckgen CLK_TOP_NET1PLL_D5_D2>;
+                                <&infracfg CLK_INFRA_MSDC_CK>,
+                                <&infracfg CLK_INFRA_MSDC_133M_CK>,
+                                <&infracfg CLK_INFRA_MSDC_66M_CK>;
+                       clock-names = "source", "hclk", "source_cg", "bus_clk",
+                                     "sys_cg";
                        status = "disabled";
                };
 
                        reg = <0 0x1100c800 0 0x800>;
                        interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&infracfg CLK_INFRA_THERM_CK>,
-                                <&infracfg CLK_INFRA_ADC_26M_CK>;
-                       clock-names = "therm", "auxadc";
+                                <&infracfg CLK_INFRA_ADC_26M_CK>,
+                                <&infracfg CLK_INFRA_ADC_FRC_CK>;
+                       clock-names = "therm", "auxadc", "adc_32k";
                        mediatek,auxadc = <&auxadc>;
                        mediatek,apmixedsys = <&apmixedsys>;
                        nvmem-cells = <&thermal_calibration>;
                        bus-range = <0x00 0xff>;
                        ranges = <0x82000000 0x00 0x20000000 0x00
                                  0x20000000 0x00 0x10000000>;
-                       clocks = <&infracfg CLK_INFRA_PCIE_SEL>,
+                       clocks = <&infracfg CLK_INFRA_IPCIE_PIPE_CK>,
                                 <&infracfg CLK_INFRA_IPCIE_CK>,
-                                <&infracfg CLK_INFRA_IPCIE_PIPE_CK>,
                                 <&infracfg CLK_INFRA_IPCIER_CK>,
                                 <&infracfg CLK_INFRA_IPCIEB_CK>;
+                       clock-names = "pl_250m", "tl_26m", "peri_26m", "top_133m";
                        status = "disabled";
 
                        phys = <&pcie_port PHY_TYPE_PCIE>;
 
                pcie_phy: t-phy@11c00000 {
                        compatible = "mediatek,mt7986-tphy",
-                                    "mediatek,generic-tphy-v4";
+                                    "mediatek,generic-tphy-v2";
                        #address-cells = <2>;
                        #size-cells = <2>;
                        ranges;
                                clocks = <&clk40m>;
                                clock-names = "ref";
                                #phy-cells = <1>;
-                               auto_load_valid;
-                               auto_load_valid_ln1;
-                               nvmem-cells = <&pcie_intr_ln0>,
-                                             <&pcie_rx_imp_ln0>,
-                                             <&pcie_tx_imp_ln0>,
-                                             <&pcie_auto_load_valid_ln0>,
-                                             <&pcie_intr_ln1>,
-                                             <&pcie_rx_imp_ln1>,
-                                             <&pcie_tx_imp_ln1>,
-                                             <&pcie_auto_load_valid_ln1>;
-                               nvmem-cell-names = "intr",
-                                                  "rx_imp",
-                                                  "tx_imp",
-                                                  "auto_load_valid",
-                                                  "intr_ln1",
-                                                  "rx_imp_ln1",
-                                                  "tx_imp_ln1",
-                                                  "auto_load_valid_ln1";
                        };
                };
 
                efuse: efuse@11d00000 {
-                       compatible = "mediatek,mt7986-efuse",
-                                    "mediatek,efuse";
+                       compatible = "mediatek,mt7986-efuse", "mediatek,efuse";
                        reg = <0 0x11d00000 0 0x1000>;
                        #address-cells = <1>;
                        #size-cells = <1>;
                        thermal_calibration: calib@274 {
                                reg = <0x274 0xc>;
                        };
-
-                       comb_auto_load_valid: usb3-alv-imp@8da {
-                               reg = <0x8da 1>;
-                               bits = <0 1>;
-                       };
-
-                       comb_rx_imp_p0: usb3-rx-imp@8d8 {
-                               reg = <0x8d8 1>;
-                               bits = <0 5>;
-                       };
-
-                       comb_tx_imp_p0: usb3-tx-imp@8d8 {
-                               reg = <0x8d8 2>;
-                               bits = <5 5>;
-                       };
-
-                       comb_intr_p0: usb3-intr@8d9 {
-                               reg = <0x8d9 1>;
-                               bits = <2 6>;
-                       };
-
-                       u2_auto_load_valid_p0: usb2-alv-p0@8e0 {
-                               reg  = <0x8e0 1>;
-                               bits = <0 1>;
-                       };
-
-                       u2_intr_p0: usb2-intr-p0@8e0 {
-                               reg  = <0x8e0 1>;
-                               bits = <1 5>;
-                       };
-
-                       u2_auto_load_valid_p1: usb2-alv-p1@8e0 {
-                               reg  = <0x8e0 2>;
-                               bits = <6 1>;
-                       };
-
-                       u2_intr_p1: usb2-intr-p1@8e0 {
-                               reg  = <0x8e0 2>;
-                               bits = <7 5>;
-                       };
-
-                       pcie_rx_imp_ln0: pcie-rx-imp@8d0 {
-                               reg = <0x8d0 1>;
-                               bits = <0 5>;
-                       };
-
-                       pcie_tx_imp_ln0: pcie-tx-imp@8d0 {
-                               reg = <0x8d0 2>;
-                               bits = <5 5>;
-                       };
-
-                       pcie_intr_ln0: pcie-intr@8d1 {
-                               reg = <0x8d1 1>;
-                               bits = <2 6>;
-                       };
-
-                       pcie_auto_load_valid_ln0: pcie-ln0-alv@8d4 {
-                               reg = <0x8d4 1>;
-                               bits = <0 1>;
-                       };
-
-                       pcie_rx_imp_ln1: pcie-rx-imp@8d2 {
-                               reg = <0x8d2 1>;
-                               bits = <0 5>;
-                       };
-
-                       pcie_tx_imp_ln1: pcie-tx-imp@8d2 {
-                               reg = <0x8d2 2>;
-                               bits = <5 5>;
-                       };
-
-                       pcie_intr_ln1: pcie-intr@8d3 {
-                               reg = <0x8d3 1>;
-                               bits = <2 6>;
-                       };
-
-                       pcie_auto_load_valid_ln1: pcie-ln1-alv@8d4 {
-                               reg = <0x8d4 1>;
-                               bits = <1 1>;
-                       };
                };
 
                usb_phy: t-phy@11e10000 {
                        compatible = "mediatek,mt7986-tphy",
                                     "mediatek,generic-tphy-v2";
-                       #address-cells = <2>;
-                       #size-cells = <2>;
-                       ranges;
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges = <0 0 0x11e10000 0x1700>;
                        status = "disabled";
 
-                       u2port0: usb-phy@11e10000 {
-                               reg = <0 0x11e10000 0 0x700>;
+                       u2port0: usb-phy@0 {
+                               reg = <0x0 0x700>;
                                clocks = <&topckgen CLK_TOP_DA_U2_REFSEL>,
                                         <&topckgen CLK_TOP_DA_U2_CK_1P_SEL>;
                                clock-names = "ref", "da_ref";
                                #phy-cells = <1>;
-                               auto_load_valid;
-                               nvmem-cells = <&u2_intr_p0>, <&u2_auto_load_valid_p0>;
-                               nvmem-cell-names = "intr", "auto_load_valid";
                        };
 
-                       u3port0: usb-phy@11e10700 {
-                               reg = <0 0x11e10700 0 0x900>;
+                       u3port0: usb-phy@700 {
+                               reg = <0x700 0x900>;
                                clocks = <&topckgen CLK_TOP_USB3_PHY_SEL>;
                                clock-names = "ref";
                                #phy-cells = <1>;
-                               auto_load_valid;
-                               nvmem-cells = <&comb_intr_p0>,
-                                             <&comb_rx_imp_p0>,
-                                             <&comb_tx_imp_p0>,
-                                             <&comb_auto_load_valid>;
-                               nvmem-cell-names = "intr", "rx_imp", "tx_imp", "auto_load_valid";
                        };
 
-                       u2port1: usb-phy@11e11000 {
-                               reg = <0 0x11e11000 0 0x700>;
+                       u2port1: usb-phy@1000 {
+                               reg = <0x1000 0x700>;
                                clocks = <&topckgen CLK_TOP_DA_U2_REFSEL>,
                                         <&topckgen CLK_TOP_DA_U2_CK_1P_SEL>;
                                clock-names = "ref", "da_ref";
                                #phy-cells = <1>;
-                               auto_load_valid;
-                               nvmem-cells = <&u2_intr_p1>, <&u2_auto_load_valid_p1>;
-                               nvmem-cell-names = "intr", "auto_load_valid";
                        };
                };
 
                ethsys: syscon@15000000 {
                         #address-cells = <1>;
                         #size-cells = <1>;
-                        compatible = "mediatek,mt7986-ethsys_ck",
+                        compatible = "mediatek,mt7986-ethsys",
                                      "syscon";
                         reg = <0 0x15000000 0 0x1000>;
                         #clock-cells = <1>;
                         #reset-cells = <1>;
                };
 
-               wed_pcie: wed-pcie@10003000 {
-                       compatible = "mediatek,mt7986-wed-pcie",
-                                    "syscon";
-                       reg = <0 0x10003000 0 0x10>;
-               };
-
-
                wed0: wed@15010000 {
                        compatible = "mediatek,mt7986-wed",
                                     "syscon";
                        status = "disabled";
                };
 
-               consys: consys@10000000 {
-                       compatible = "mediatek,mt7986-consys";
-                       reg = <0 0x10000000 0 0x8600000>;
-                       memory-region = <&wmcpu_emi>;
-               };
-
-               wmac: wmac@18000000 {
-                       compatible = "mediatek,mt7986-wmac", "mediatek,wbsys";
-                       resets = <&watchdog MT7986_TOPRGU_CONSYS_RST>;
+               wifi: wifi@18000000 {
+                       compatible = "mediatek,mt7986-wmac";
+                       resets = <&watchdog MT7986_TOPRGU_CONSYS_SW_RST>;
                        reset-names = "consys";
+                       clocks = <&topckgen CLK_TOP_CONN_MCUSYS_SEL>,
+                                <&topckgen CLK_TOP_AP2CNN_HOST_SEL>;
+                       clock-names = "mcu", "ap2conn";
                        reg = <0 0x18000000 0 0x1000000>,
                              <0 0x10003000 0 0x1000>,
                              <0 0x11d10000 0 0x1000>;
                        interrupts = <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&topckgen CLK_TOP_CONN_MCUSYS_SEL>,
-                                <&topckgen CLK_TOP_AP2CNN_HOST_SEL>;
-                       clock-names = "mcu", "ap2conn";
+                                    <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>;
                        memory-region = <&wmcpu_emi>;
-                       status = "disabled";
                };
        };
 
-       fan: pwm-fan {
-               compatible = "pwm-fan";
-               /* cooling level (0, 1, 2, 3) : (0% duty, 33% duty, 66% duty, 100% duty) */
-               cooling-levels = <0 86 172 255>;
-               #cooling-cells = <2>;
-               status = "disabled";
-       };
-
        thermal-zones {
                cpu_thermal: cpu-thermal {
                        polling-delay-passive = <1000>;
                        polling-delay = <1000>;
                        thermal-sensors = <&thermal 0>;
-                       trips {
-                               cpu_trip_crit: crit {
-                                       temperature = <125000>;
-                                       hysteresis = <2000>;
-                                       type = "critical";
-                               };
-
-                               cpu_trip_hot: hot {
-                                       temperature = <120000>;
-                                       hysteresis = <2000>;
-                                       type = "hot";
-                               };
 
+                       trips {
                                cpu_trip_active_high: active-high {
                                        temperature = <115000>;
                                        hysteresis = <2000>;
                                        type = "active";
                                };
 
-                               cpu_trip_active_med: active-med {
+                               cpu_trip_active_low: active-low {
                                        temperature = <85000>;
                                        hysteresis = <2000>;
                                        type = "active";
                                };
 
-                               cpu_trip_active_low: active-low {
-                                       temperature = <60000>;
+                               cpu_trip_passive: passive {
+                                       temperature = <40000>;
                                        hysteresis = <2000>;
                                        type = "passive";
                                };
                        };
-
-                       cooling-maps {
-                               cpu-active-high {
-                                       /* active: set fan to cooling level 3 */
-                                       cooling-device = <&fan 3 3>;
-                                       trip = <&cpu_trip_active_high>;
-                               };
-
-                               cpu-active-med {
-                                       /* active: set fan to cooling level 2 */
-                                       cooling-device = <&fan 2 2>;
-                                       trip = <&cpu_trip_active_med>;
-                               };
-
-                               cpu-active-low {
-                                       /* passive: set fan to cooling level 1 */
-                                       cooling-device = <&fan 1 1>;
-                                       trip = <&cpu_trip_active_low>;
-                               };
-                       };
                };
        };
 };
index 85465223cf4f46e034c1647280f9a3f532dd0bc4..83d51916717fb96cdf9aba5f386d0fe9cd69154e 100644 (file)
@@ -56,7 +56,7 @@
        status = "okay";
 };
 
-&wmac {
+&wifi {
        status = "okay";
        pinctrl-names = "default", "dbdc";
        pinctrl-0 = <&wf_2g_5g_pins>;
index 23923b9f8944b5fcd77547842acc5929fa3e98c0..db5189664c29ba8be8096d259f4691e6bfba0b95 100644 (file)
@@ -5,6 +5,9 @@
  */
 
 #include "mt7986a.dtsi"
+/ {
+       compatible = "mediatek,mt7986b";
+};
 
 &pio {
        compatible = "mediatek,mt7986b-pinctrl";
index 495d023ccad7c64229c1b87573db764146ed7b08..ed2e7b200987708f71ad8f06f37aa7433461d0f9 100644 (file)
@@ -129,4 +129,4 @@ static void __init mtk_ethsys_init(struct device_node *node)
                pr_err("%s(): could not register clock provider: %d\n",
                       __func__, r);
 }
-CLK_OF_DECLARE(mtk_ethsys, "mediatek,mt7986-ethsys_ck", mtk_ethsys_init);
+CLK_OF_DECLARE(mtk_ethsys, "mediatek,mt7986-ethsys", mtk_ethsys_init);
index 1bdfe34a7a3492c32128a8d161b8ec4e8683f6a5..af3d16c81192f78803ea26cd9e1cf9adb10223aa 100644 (file)
@@ -1,10 +1,55 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/* Copyright (c) 2021 MediaTek Inc. */
+/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
+/*
+ * Copyright (c) 2022 MediaTek Inc.
+ * Author: Sam Shih <sam.shih@mediatek.com>
+ */
 
-#ifndef _DT_BINDINGS_RESET_MT7986
-#define _DT_BINDINGS_RESET_MT7986
+#ifndef _DT_BINDINGS_RESET_CONTROLLER_MT7986
+#define _DT_BINDINGS_RESET_CONTROLLER_MT7986
 
-#define MT7986_TOPRGU_CONSYS_RST       23
-#define MT7986_TOPRGU_SW_RST_NUM       32
+/* INFRACFG resets */
+#define MT7986_INFRACFG_PEXTP_MAC_SW_RST       6
+#define MT7986_INFRACFG_SSUSB_SW_RST           7
+#define MT7986_INFRACFG_EIP97_SW_RST           8
+#define MT7986_INFRACFG_AUDIO_SW_RST           13
+#define MT7986_INFRACFG_CQ_DMA_SW_RST          14
 
-#endif  /* _DT_BINDINGS_RESET_MT7986 */
+#define MT7986_INFRACFG_TRNG_SW_RST            17
+#define MT7986_INFRACFG_AP_DMA_SW_RST          32
+#define MT7986_INFRACFG_I2C_SW_RST             33
+#define MT7986_INFRACFG_NFI_SW_RST             34
+#define MT7986_INFRACFG_SPI0_SW_RST            35
+#define MT7986_INFRACFG_SPI1_SW_RST            36
+#define MT7986_INFRACFG_UART0_SW_RST           37
+#define MT7986_INFRACFG_UART1_SW_RST           38
+#define MT7986_INFRACFG_UART2_SW_RST           39
+#define MT7986_INFRACFG_AUXADC_SW_RST          43
+
+#define MT7986_INFRACFG_APXGPT_SW_RST          66
+#define MT7986_INFRACFG_PWM_SW_RST             68
+
+#define MT7986_INFRACFG_SW_RST_NUM             69
+
+/* TOPRGU resets */
+#define MT7986_TOPRGU_APMIXEDSYS_SW_RST                0
+#define MT7986_TOPRGU_SGMII0_SW_RST            1
+#define MT7986_TOPRGU_SGMII1_SW_RST            2
+#define MT7986_TOPRGU_INFRA_SW_RST             3
+#define MT7986_TOPRGU_U2PHY_SW_RST             5
+#define MT7986_TOPRGU_PCIE_SW_RST              6
+#define MT7986_TOPRGU_SSUSB_SW_RST             7
+#define MT7986_TOPRGU_ETHDMA_SW_RST            20
+#define MT7986_TOPRGU_CONSYS_SW_RST            23
+
+#define MT7986_TOPRGU_SW_RST_NUM               24
+
+/* ETHSYS Subsystem resets */
+#define MT7986_ETHSYS_FE_SW_RST                        6
+#define MT7986_ETHSYS_PMTR_SW_RST              8
+#define MT7986_ETHSYS_GMAC_SW_RST              23
+#define MT7986_ETHSYS_PPE0_SW_RST              30
+#define MT7986_ETHSYS_PPE1_SW_RST              31
+
+#define MT7986_ETHSYS_SW_RST_NUM               32
+
+#endif  /* _DT_BINDINGS_RESET_CONTROLLER_MT7986 */
diff --git a/target/linux/mediatek/filogic/base-files/etc/board.d/05_compat-version b/target/linux/mediatek/filogic/base-files/etc/board.d/05_compat-version
new file mode 100644 (file)
index 0000000..e0e1a8e
--- /dev/null
@@ -0,0 +1,15 @@
+
+. /lib/functions.sh
+. /lib/functions/uci-defaults.sh
+
+board_config_update
+
+case "$(board_name)" in
+       bananapi,bpi-r3)
+               ucidef_set_compat_version "1.1"
+               ;;
+esac
+
+board_config_flush
+
+exit 0
index 582c1f70b8f2ae7e1ac66447fdd0506f08584d56..31c576983bb81bd2a10001f7d6558835d664849b 100644 (file)
@@ -96,8 +96,8 @@ define Device/bananapi_bpi-r3
   DEVICE_MODEL := BPi-R3
   DEVICE_DTS := mt7986a-bananapi-bpi-r3
   DEVICE_DTS_CONFIG := config-mt7986a-bananapi-bpi-r3
-  DEVICE_DTS_OVERLAY:= mt7986a-bananapi-bpi-r3-nor mt7986a-bananapi-bpi-r3-emmc-nor mt7986a-bananapi-bpi-r3-emmc-snand mt7986a-bananapi-bpi-r3-snand
-  DEVICE_DTS_DIR := ../dts
+  DEVICE_DTS_OVERLAY:= mt7986a-bananapi-bpi-r3-emmc mt7986a-bananapi-bpi-r3-nand mt7986a-bananapi-bpi-r3-nor mt7986a-bananapi-bpi-r3-sd
+  DEVICE_DTS_DIR := $(DTS_DIR)/
   DEVICE_PACKAGES := kmod-hwmon-pwmfan kmod-i2c-gpio kmod-mt7986-firmware kmod-sfp kmod-usb3 e2fsprogs f2fsck mkf2fs mt7986-wo-firmware
   IMAGES := sysupgrade.itb
   KERNEL_LOADADDR := 0x44000000
@@ -136,6 +136,8 @@ define Device/bananapi_bpi-r3
        fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb with-initrd | pad-to 64k
   IMAGE/sysupgrade.itb := append-kernel | fit gzip $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb external-static-with-rootfs | pad-rootfs | append-metadata
   DTC_FLAGS += -@ --space 32768
+  DEVICE_COMPAT_VERSION := 1.1
+  DEVICE_COMPAT_MESSAGE := Device tree overlay mechanism needs bootloader update
 endef
 TARGET_DEVICES += bananapi_bpi-r3
 
diff --git a/target/linux/mediatek/patches-5.15/194-dts-mt7968a-add-ramoops.patch b/target/linux/mediatek/patches-5.15/194-dts-mt7968a-add-ramoops.patch
new file mode 100644 (file)
index 0000000..161c1e7
--- /dev/null
@@ -0,0 +1,17 @@
+--- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
++++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
+@@ -68,6 +68,14 @@
+               #address-cells = <2>;
+               #size-cells = <2>;
+               ranges;
++
++              /* 64 KiB reserved for ramoops/pstore */
++              ramoops@42ff0000 {
++                      compatible = "ramoops";
++                      reg = <0 0x42ff0000 0 0x10000>;
++                      record-size = <0x1000>;
++              };
++
+               /* 192 KiB reserved for ARM Trusted Firmware (BL31) */
+               secmon_reserved: secmon@43000000 {
+                       reg = <0 0x43000000 0 0x30000>;
diff --git a/target/linux/mediatek/patches-5.15/195-dts-mt7986a-bpi-r3-leds-port-names-and-wifi-eeprom.patch b/target/linux/mediatek/patches-5.15/195-dts-mt7986a-bpi-r3-leds-port-names-and-wifi-eeprom.patch
new file mode 100644 (file)
index 0000000..7126da7
--- /dev/null
@@ -0,0 +1,196 @@
+--- a/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts
++++ b/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts
+@@ -23,6 +23,10 @@
+               serial0 = &uart0;
+               ethernet0 = &gmac0;
+               ethernet1 = &gmac1;
++              led-boot = &green_led;
++              led-failsafe = &green_led;
++              led-running = &green_led;
++              led-upgrade = &blue_led;
+       };
+       chosen {
+@@ -417,27 +421,27 @@
+               port@1 {
+                       reg = <1>;
+-                      label = "lan0";
++                      label = "lan1";
+               };
+               port@2 {
+                       reg = <2>;
+-                      label = "lan1";
++                      label = "lan2";
+               };
+               port@3 {
+                       reg = <3>;
+-                      label = "lan2";
++                      label = "lan3";
+               };
+               port@4 {
+                       reg = <4>;
+-                      label = "lan3";
++                      label = "lan4";
+               };
+               port5: port@5 {
+                       reg = <5>;
+-                      label = "lan4";
++                      label = "sfp2";
+                       phy-mode = "2500base-x";
+                       sfp = <&sfp2>;
+                       managed = "in-band-status";
+@@ -488,9 +492,137 @@
+ &wifi {
+       status = "okay";
+-      pinctrl-names = "default", "dbdc";
++      pinctrl-names = "default";
+       pinctrl-0 = <&wf_2g_5g_pins>, <&wf_led_pins>;
+-      pinctrl-1 = <&wf_dbdc_pins>, <&wf_led_pins>;
++
++      mediatek,eeprom-data = <0x86790900 0x000c4326 0x60000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x01000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000800 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x24649090 0x00280000 0x05100000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00021e00 0x021e0002 0x1e00021e 0x00022800 0x02280002 0x28000228 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00008080 0x8080fdf7
++                              0x0903150d 0x80808080 0x80808080 0x05050d0d 0x1313c6c6 0xc3c3c200 0x00c200c2 0x00008182
++                              0x8585c2c2 0x82828282 0x858500c2 0xc2000081 0x82858587 0x87c2c200 0x81818285 0x858787c2
++                              0xc2000081 0x82858587 0x87c2c200 0x00818285 0x858787c2 0xc2000081 0x82858587 0x87c4c4c2
++                              0xc100c300 0xc3c3c100 0x818383c3 0xc3c3c100 0x81838300 0xc2c2c2c0 0x81828484 0x000000c3
++                              0xc3c3c100 0x81838386 0x86c3c3c3 0xc1008183 0x838686c2 0xc2c2c081 0x82848486 0x86c3c3c3
++                              0xc1008183 0x838686c3 0xc3c3c100 0x81838386 0x86c3c3c3 0xc1008183 0x83868622 0x28002228
++                              0x00222800 0x22280000 0xdddddddd 0xdddddddd 0xddbbbbbb 0xccccccdd 0xdddddddd 0xdddddddd
++                              0xeeeeeecc 0xccccdddd 0xdddddddd 0x004a5662 0x0000004a 0x56620000 0x004a5662 0x0000004a
++                              0x56620000 0x88888888 0x33333326 0x26262626 0x26262600 0x33333326 0x26262626 0x26262600
++                              0x33333326 0x26262626 0x26262600 0x33333326 0x26262626 0x26262600 0x00000000 0xf0f0cc00
++                              0x00000000 0x0000aaaa 0xaabbbbbb 0xcccccccc 0xccccbbbb 0xbbbbbbbb 0xbbbbbbaa 0xaaaabbbb
++                              0xbbaaaaaa 0x999999aa 0xaaaabbbb 0xbbcccccc 0x00000000 0x0000aaaa 0xaa000000 0xbbbbbbbb
++                              0xbbbbaaaa 0xaa999999 0xaaaaaaaa 0xaaaaaaaa 0xaaaaaaaa 0xaaaaaaaa 0xaaaabbbb 0xbbbbbbbb
++                              0x00000000 0x00000000 0x00000000 0x99999999 0x9999aaaa 0xaaaaaaaa 0x999999aa 0xaaaaaaaa
++                              0xaaaaaaaa 0xaaaaaaaa 0xaaaabbbb 0xbbbbbbbb 0x00000000 0x0000eeee 0xeeffffff 0xcccccccc
++                              0xccccdddd 0xddbbbbbb 0xccccccbb 0xbbbbbbbb 0xbbbbbbbb 0xbbbbbbbb 0xbbbbcccc 0xccdddddd
++                              0x00516200 0x686e0051 0x6200686e 0x00516200 0x686e0051 0x6200686e 0x00516200 0x686e0051
++                              0x6200686e 0x00516200 0x686e0051 0x6200686e 0x00516200 0x686e0051 0x6200686e 0x00516200
++                              0x686e0051 0x6200686e 0x00516200 0x686e0051 0x6200686e 0x00516200 0x686e0051 0x6200686e
++                              0x00516200 0x686e0051 0x6200686e 0x00516200 0x686e0051 0x6200686e 0x00516200 0x686e0051
++                              0x6200686e 0x00516200 0x686e0051 0x6200686e 0x00516200 0x686e0051 0x6200686e 0x00516200
++                              0x686e0051 0x6200686e 0x00516200 0x686e0051 0x6200686e 0x00516200 0x686e0051 0x6200686e
++                              0x88888888 0x88888888 0x88888888 0x88888888 0x88888888 0x88888888 0x88888888 0x88888888
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000001 0x06000100 0x01050002 0x00ff0300
++                              0xf900fe03 0x00000000 0x00000000 0x0000009b 0x6e370000 0x00000000 0x00fc0009 0x0a00fe00
++                              0x060700fe 0x00070800 0x05000b0a 0x00000000 0x00000000 0x000000e2 0x96460000 0x00000000
++                              0x000400f7 0xf8000300 0xfcfe0003 0x00fbfc00 0xee00e3f2 0x00000000 0x00000000 0x00000011
++                              0xbb550000 0x00000000 0x000600f6 0xfc000300 0xfbfe0004 0x00fafe00 0xf600ecf2 0x00000000
++                              0x00000000 0x0000001f 0xbf580000 0x00000000 0x000600f5 0xf6000400 0xf8f90004 0x00f7f800
++                              0xf700f0f4 0x00000000 0x00000000 0x00000024 0xbe570000 0x00000000 0x000800f8 0xfe000600
++                              0xf8fd0007 0x00f9fe00 0xf500f0f4 0x00000000 0x00000000 0x0000002d 0xd6610000 0x00000000
++                              0x000400f7 0xfc000500 0xf7fc0005 0x00f7fc00 0xf900f5f8 0x00000000 0x00000000 0x00000026
++                              0xd96e0000 0x00000000 0x000400f7 0xf9000600 0xf5f70005 0x00f5f800 0xf900f4f7 0x00000000
++                              0x00000000 0x0000001b 0xce690000 0x00000000 0x000300f8 0xf8000600 0xf6f60004 0x00f6f700
++                              0xf900f4f7 0x00000000 0x00000000 0x00000018 0xd8720000 0x00000000 0x00000000 0x02404002
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0xc1c2c1c2 0x41c341c3 0x3fc13fc1 0x40c13fc2 0x3fc240c1 0x41c040c0 0x3fc23fc2 0x40c13fc2
++                              0x3fc140c0 0x41c040c0 0x3fc33fc3 0x40c23fc2 0x3fc240c1 0x41c040c0 0x3fc23fc2 0x40c23fc2
++                              0x3fc140c1 0x41c040c0 0x00000000 0x00000000 0x41c741c7 0xc1c7c1c7 0x00000000 0x00000000
++                              0x3fc03fc0 0x3fc03fc0 0x3fc03fc0 0x3fc03fc0 0x3fc03fc0 0x3fc03fc0 0x3fc03fc0 0x3fc03fc0
++                              0x3fc03fc0 0x3fc03fc0 0x3fc03fc0 0x3fc03fc0 0x3fc03fc0 0x3fc03fc0 0x3fc03fc0 0x3fc03fc0
++                              0x00a0ce00 0x00000000 0xb6840000 0x00000000 0x00000000 0x00000000 0x18181818 0x18181818
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x004b5763 0x0000004b 0x57630000 0x004b5763 0x0000004b 0x57630000 0x88888888 0x08474759
++                              0x69780849 0x49596d7a 0x0849495a 0x6d790848 0x48596c78 0x08484858 0x6a780848 0x48586a78
++                              0x08484858 0x6c78084a 0x4a5b6d79 0x08474759 0x697a0848 0x48596b79 0x08484859 0x6c7a0848
++                              0x48586c79 0x08484857 0x68770848 0x48576877 0x08484857 0x6a77084a 0x4a5a6a77 0x08464659
++                              0x69790848 0x48586b79 0x08484858 0x6c7a0848 0x48596c79 0x08484857 0x68770848 0x48576877
++                              0x08494958 0x6d7a084b 0x4b5c6c77 0x0847475a 0x6a7b0849 0x495a6e7c 0x0849495a 0x6e7c0849
++                              0x495b6e7c 0x08494959 0x6a7a0849 0x49596a7a 0x084a4a5a 0x6f7d084b 0x4b5c6e7b 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x85848484
++                              0xc3c4c4c5 0xc4c3c33f 0xc3c3c2c2 0xc2c2c03f 0xc3c3c3c4 0xc4c4c33f 0xc2c2c2c2 0xc1c3c1c1
++                              0xc0c08282 0x83848686 0x88880000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00001111 0x00000000
++                              0x8080f703 0x10808080 0x80050d13 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x000000a4 0xce000000 0x0000b684 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
++                              0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000>;
+       led {
+               led-active-low;
+--- a/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-nor.dtso
++++ b/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-nor.dtso
+@@ -55,6 +55,7 @@
+                                       partition@c00000 {
+                                               label = "fit";
+                                               reg = <0xc00000 0x1400000>;
++                                              compatible = "denx,fit";
+                                       };
+                               };
+                       };
index 2d2871772d442f7292e56e6fff94c0ba4d44b1b8..0a58ae953b4fe5ac0995775595089577d6c507cb 100644 (file)
@@ -11,7 +11,7 @@ Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
 
 --- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
 +++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
-@@ -121,11 +121,6 @@
+@@ -121,12 +121,6 @@
                        reg = <0 0x151f8000 0 0x2000>;
                        no-map;
                };
@@ -20,10 +20,11 @@ Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
 -                      reg = <0 0x15194000 0 0x1000>;
 -                      no-map;
 -              };
+-
        };
  
        timer {
-@@ -625,10 +620,11 @@
+@@ -518,10 +512,11 @@
                        interrupt-parent = <&gic>;
                        interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
                        memory-region = <&wo_emi0>, <&wo_ilm0>, <&wo_dlm0>,
@@ -37,7 +38,7 @@ Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
                };
  
                wed1: wed@15011000 {
-@@ -638,10 +634,11 @@
+@@ -531,10 +526,11 @@
                        interrupt-parent = <&gic>;
                        interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>;
                        memory-region = <&wo_emi1>, <&wo_ilm1>, <&wo_dlm1>,
@@ -51,7 +52,7 @@ Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
                };
  
                wo_ccif0: syscon@151a5000 {
-@@ -658,6 +655,11 @@
+@@ -551,6 +547,11 @@
                        interrupts = <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>;
                };
  
index b640ed4b229c50b89981e60706e0e0ce1789e3db..36fe9278372a95fc06e76e92cad918f66a22c88d 100644 (file)
@@ -34,7 +34,7 @@ Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
                wo_data: wo-data@4fd80000 {
                        reg = <0 0x4fd80000 0 0x240000>;
                        no-map;
-@@ -619,11 +609,10 @@
+@@ -511,11 +501,10 @@
                        reg = <0 0x15010000 0 0x1000>;
                        interrupt-parent = <&gic>;
                        interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
@@ -49,7 +49,7 @@ Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
                        mediatek,wo-cpuboot = <&wo_cpuboot>;
                };
  
-@@ -633,11 +622,10 @@
+@@ -525,11 +514,10 @@
                        reg = <0 0x15011000 0 0x1000>;
                        interrupt-parent = <&gic>;
                        interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>;
@@ -64,7 +64,7 @@ Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
                        mediatek,wo-cpuboot = <&wo_cpuboot>;
                };
  
-@@ -655,6 +643,16 @@
+@@ -547,6 +535,16 @@
                        interrupts = <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>;
                };
  
index 0523ae009d935ae9ebae99bff0b840c6a1c37b69..55f17286c600eb80eef83dd0c11480eaa320f04d 100644 (file)
@@ -34,7 +34,7 @@ Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
        };
  
        timer {
-@@ -609,10 +599,11 @@
+@@ -501,10 +491,11 @@
                        reg = <0 0x15010000 0 0x1000>;
                        interrupt-parent = <&gic>;
                        interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
@@ -48,7 +48,7 @@ Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
                        mediatek,wo-cpuboot = <&wo_cpuboot>;
                };
  
-@@ -622,10 +613,11 @@
+@@ -514,10 +505,11 @@
                        reg = <0 0x15011000 0 0x1000>;
                        interrupt-parent = <&gic>;
                        interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>;
@@ -62,7 +62,7 @@ Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
                        mediatek,wo-cpuboot = <&wo_cpuboot>;
                };
  
-@@ -653,6 +645,16 @@
+@@ -545,6 +537,16 @@
                        reg = <0 0x151f0000 0 0x8000>;
                };