ramips: dts: rt5350: reset FE and ESW cores together
authorLech Perczak <lech.perczak@gmail.com>
Mon, 11 Dec 2023 23:25:02 +0000 (00:25 +0100)
committerLech Perczak <lech.perczak@gmail.com>
Thu, 4 Jan 2024 21:29:11 +0000 (22:29 +0100)
commitb80c17b093dc5b9919b1163b2eefc94a5d96dc75
tree7d1d82f844c288740279f0f70b7744529aaa2ad0
parent0c84a1528894b1ce9b377a78199591c82e1acea5
ramips: dts: rt5350: reset FE and ESW cores together

Failing to do so will cause the DMA engine to not initialize properly
and fail to forward packets between them, and in some cases will cause
spurious transmission with size exceeding allowed packet size, causing a
kernel panic.

This is behaviour of downstream driver as well, however I
haven't observed bug reports about this SoC in the wild, so this
commit's purpose is to align this chip with all other SoC's - MT7620
were already using this arrangement.

Fixes: #9284
Fixes: 60fadae62b64 ("ramips: ethernet: ralink: move reset of the esw into the esw instead of fe")
Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
(cherry picked from commit fc92fecfc7ddf19bbfd7d1305a29c666f00543af)
Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
target/linux/ramips/dts/rt5350.dtsi