1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/leds/common.h>
6 #include <dt-bindings/gpio/gpio.h>
12 model = "Xiaomi Redmi Router AX6S";
13 compatible = "xiaomi,redmi-router-ax6s", "mediatek,mt7622";
17 led-boot = &led_power_amber;
18 led-failsafe = &led_power_amber;
19 led-running = &led_power_blue;
20 led-upgrade = &led_power_blue;
24 stdout-path = "serial0:115200n8";
25 bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n8 swiotlb=512";
29 reg = <0 0x40000000 0 0x8000000>;
33 compatible = "gpio-leds";
35 led_power_blue: power_blue {
36 function = LED_FUNCTION_POWER;
37 color = <LED_COLOR_ID_BLUE>;
38 gpios = <&pio 18 GPIO_ACTIVE_LOW>;
41 led_power_amber: power_amber {
42 function = LED_FUNCTION_POWER;
43 color = <LED_COLOR_ID_AMBER>;
44 gpios = <&pio 17 GPIO_ACTIVE_LOW>;
47 led_net_blue: net_blue {
49 gpios = <&pio 01 GPIO_ACTIVE_LOW>;
52 led_net_amber: net_amber {
54 gpios = <&pio 16 GPIO_ACTIVE_LOW>;
60 compatible = "gpio-keys";
64 gpios = <&pio 0 GPIO_ACTIVE_LOW>;
65 linux,code = <KEY_RESTART>;
70 gpios = <&pio 102 GPIO_ACTIVE_LOW>;
72 linux,input-type = <EV_SW>;
78 proc-supply = <&mt6380_vcpu_reg>;
79 sram-supply = <&mt6380_vm_reg>;
83 proc-supply = <&mt6380_vcpu_reg>;
84 sram-supply = <&mt6380_vm_reg>;
91 groups = "mdc_mdio", "rgmii_via_gmac2";
95 pcie0_pins: pcie0-pins {
98 groups = "pcie0_pad_perst",
104 pmic_bus_pins: pmic-bus-pins {
111 pwm7_pins: pwm1-2-pins {
114 groups = "pwm_ch7_2";
118 /* Serial NAND is shared pin with SPI-NOR */
119 serial_nand_pins: serial-nand-pins {
126 uart0_pins: uart0-pins {
129 groups = "uart0_0_tx_rx" ;
133 watchdog_pins: watchdog-pins {
135 function = "watchdog";
142 pinctrl-names = "default";
143 pinctrl-0 = <ð_pins>;
147 compatible = "mediatek,eth-mac";
150 phy-connection-type = "2500base-x";
152 nvmem-cells = <&macaddr_factory_4 (-1)>;
153 nvmem-cell-names = "mac-address";
163 #address-cells = <1>;
167 compatible = "mediatek,mt7531";
169 interrupt-controller;
170 #interrupt-cells = <1>;
171 interrupt-parent = <&pio>;
172 interrupts = <53 IRQ_TYPE_LEVEL_HIGH>;
173 reset-gpios = <&pio 54 GPIO_ACTIVE_HIGH>;
176 #address-cells = <1>;
202 phy-mode = "2500base-x";
220 pinctrl-names = "default";
221 pinctrl-0 = <&serial_nand_pins>;
225 compatible = "spi-nand";
227 spi-tx-bus-width = <4>;
228 spi-rx-bus-width = <4>;
229 nand-ecc-engine = <&snfi>;
232 mediatek,bmt-table-size = <0x1000>;
233 mediatek,bmt-remap-range = <0x0 0x6c0000>;
236 compatible = "fixed-partitions";
237 #address-cells = <1>;
248 reg = <0x80000 0x40000>;
254 reg = <0xc0000 0x80000>;
259 label = "u-boot-env";
260 reg = <0x140000 0x40000>;
265 reg = <0x180000 0x40000>;
268 factory: partition@1c0000 {
270 reg = <0x1c0000 0x80000>;
274 compatible = "fixed-layout";
275 #address-cells = <1>;
278 macaddr_factory_4: macaddr@4 {
279 compatible = "mac-base";
281 #nvmem-cell-cells = <1>;
288 reg = <0x240000 0x40000>;
294 reg = <0x280000 0x40000>;
298 /* Shrunk and renamed from "firmware"
299 * as to not break luci size checks
303 reg = <0x2c0000 0x400000>;
306 /* ubi partition is the result of squashing
307 * consecutive stock partitions:
308 * - firmware (partially)
315 reg = <0x6C0000 0x6f00000>;
322 pinctrl-names = "default";
323 pinctrl-0 = <&pcie0_pins>;
331 compatible = "mediatek,mt76";
332 reg = <0x0000 0 0 0 0>;
333 mediatek,mtd-eeprom = <&factory 0x5000>;
334 ieee80211-freq-limit = <5000000 6000000>;
335 mediatek,disable-radar-background;
340 pinctrl-names = "default";
341 pinctrl-0 = <&pwm7_pins>;
346 pinctrl-names = "default";
347 pinctrl-0 = <&pmic_bus_pins>;
356 pinctrl-names = "default";
357 pinctrl-0 = <&uart0_pins>;
362 pinctrl-names = "default";
363 pinctrl-0 = <&watchdog_pins>;
370 mediatek,mtd-eeprom = <&factory 0x0>;