ipq806x: convert each device to DSA implementation
[openwrt/staging/dangole.git] / target / linux / ipq806x / files / arch / arm / boot / dts / qcom-ipq8064-wxr-2533dhp.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 #include "qcom-ipq8064-v2.0-smb208.dtsi"
3
4 #include <dt-bindings/input/input.h>
5
6 / {
7 model = "Buffalo WXR-2533DHP";
8 compatible = "buffalo,wxr-2533dhp", "qcom,ipq8064";
9
10 memory@42000000 {
11 reg = <0x42000000 0x1e000000>;
12 device_type = "memory";
13 };
14
15 aliases {
16 led-boot = &power;
17 led-failsafe = &diag;
18 led-running = &power;
19 led-upgrade = &power;
20 };
21
22 chosen {
23 /* use "ubi_rootfs" volume in "ubi" partition as rootfs */
24 bootargs = "ubi.block=0,1 root=/dev/ubiblock0_1 rootfstype=squashfs";
25 };
26
27 leds {
28 compatible = "gpio-leds";
29 pinctrl-0 = <&led_pins>;
30 pinctrl-names = "default";
31
32 usb {
33 label = "green:usb";
34 gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
35 linux,default-trigger = "usbport";
36 trigger-sources = <&hub_port0 &hub_port1>;
37 };
38
39 guestport {
40 label = "green:guestport";
41 gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
42 };
43
44 diag: diag {
45 label = "orange:diag";
46 gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
47 };
48
49 internet_orange {
50 label = "orange:internet";
51 gpios = <&qcom_pinmux 16 GPIO_ACTIVE_HIGH>;
52 };
53
54 internet_white {
55 label = "white:internet";
56 gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
57 };
58
59 wireless_orange {
60 label = "orange:wireless";
61 gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
62 };
63
64 wireless_white {
65 label = "white:wireless";
66 gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
67 };
68
69 router_orange {
70 label = "orange:router";
71 gpios = <&qcom_pinmux 25 GPIO_ACTIVE_HIGH>;
72 };
73
74 router_white {
75 label = "white:router";
76 gpios = <&qcom_pinmux 26 GPIO_ACTIVE_LOW>;
77 };
78
79 power: power {
80 label = "white:power";
81 gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
82 };
83 };
84
85 keys {
86 compatible = "gpio-keys";
87 pinctrl-0 = <&button_pins>;
88 pinctrl-names = "default";
89
90 power {
91 label = "power";
92 gpios = <&qcom_pinmux 58 GPIO_ACTIVE_LOW>;
93 linux,code = <KEY_POWER>;
94 debounce-interval = <60>;
95 wakeup-source;
96 };
97
98 reset {
99 label = "reset";
100 gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
101 linux,code = <KEY_RESTART>;
102 debounce-interval = <60>;
103 wakeup-source;
104 };
105
106 wps {
107 label = "wps";
108 gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
109 linux,code = <KEY_WPS_BUTTON>;
110 debounce-interval = <60>;
111 wakeup-source;
112 };
113
114 eject {
115 label = "eject";
116 gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
117 linux,code = <KEY_EJECTCD>;
118 debounce-interval = <60>;
119 wakeup-source;
120 };
121
122 guest {
123 label = "guest";
124 gpios = <&qcom_pinmux 64 GPIO_ACTIVE_LOW>;
125 linux,code = <BTN_0>;
126 debounce-interval = <60>;
127 wakeup-source;
128 };
129
130 ap {
131 label = "ap";
132 gpios = <&qcom_pinmux 55 GPIO_ACTIVE_LOW>;
133 linux,code = <BTN_1>;
134 linux,input-type = <EV_SW>;
135 debounce-interval = <60>;
136 wakeup-source;
137 };
138
139 router {
140 label = "router";
141 gpios = <&qcom_pinmux 56 GPIO_ACTIVE_LOW>;
142 linux,code = <BTN_1>;
143 linux,input-type = <EV_SW>;
144 debounce-interval = <60>;
145 wakeup-source;
146 };
147
148 auto {
149 label = "auto";
150 gpios = <&qcom_pinmux 57 GPIO_ACTIVE_LOW>;
151 linux,code = <BTN_1>;
152 linux,input-type = <EV_SW>;
153 debounce-interval = <60>;
154 wakeup-source;
155 };
156 };
157 };
158
159 &nand {
160 status = "okay";
161
162 cs@0 {
163 reg = <0>;
164 compatible = "qcom,nandcs";
165
166 nand-ecc-strength = <4>;
167 nand-bus-width = <8>;
168 nand-ecc-step-size = <512>;
169
170 partitions {
171 compatible = "fixed-partitions";
172 #address-cells = <1>;
173 #size-cells = <1>;
174
175 ubi@0 {
176 label = "ubi";
177 reg = <0x0000000 0x4000000>;
178 };
179
180 rootfs_1@4000000 {
181 label = "rootfs_1";
182 reg = <0x4000000 0x4000000>;
183 };
184 };
185 };
186 };
187
188 &adm_dma {
189 status = "okay";
190 };
191
192 &mdio0 {
193 status = "okay";
194
195 pinctrl-0 = <&mdio0_pins>;
196 pinctrl-names = "default";
197
198 switch@10 {
199 compatible = "qca,qca8337";
200 #address-cells = <1>;
201 #size-cells = <0>;
202 reg = <0x10>;
203
204 ports {
205 #address-cells = <1>;
206 #size-cells = <0>;
207
208 port@0 {
209 reg = <0>;
210 label = "cpu";
211 ethernet = <&gmac1>;
212 phy-mode = "rgmii";
213 tx-internal-delay-ps = <1000>;
214 rx-internal-delay-ps = <1000>;
215
216 fixed-link {
217 speed = <1000>;
218 full-duplex;
219 };
220 };
221
222 port@1 {
223 reg = <1>;
224 label = "lan1";
225 phy-mode = "internal";
226 phy-handle = <&phy_port1>;
227 };
228
229 port@2 {
230 reg = <2>;
231 label = "lan2";
232 phy-mode = "internal";
233 phy-handle = <&phy_port2>;
234 };
235
236 port@3 {
237 reg = <3>;
238 label = "lan3";
239 phy-mode = "internal";
240 phy-handle = <&phy_port3>;
241 };
242
243 port@4 {
244 reg = <4>;
245 label = "lan4";
246 phy-mode = "internal";
247 phy-handle = <&phy_port4>;
248 };
249
250 port@5 {
251 reg = <5>;
252 label = "wan";
253 phy-mode = "internal";
254 phy-handle = <&phy_port5>;
255 };
256
257 /*
258 port@6 {
259 reg = <0>;
260 label = "cpu";
261 ethernet = <&gmac2>;
262 phy-mode = "rgmii";
263
264 fixed-link {
265 speed = <1000>;
266 full-duplex;
267 pause;
268 asym-pause;
269 };
270 };
271 */
272 };
273
274 mdio {
275 #address-cells = <1>;
276 #size-cells = <0>;
277
278 phy_port1: phy@0 {
279 reg = <0>;
280 };
281
282 phy_port2: phy@1 {
283 reg = <1>;
284 };
285
286 phy_port3: phy@2 {
287 reg = <2>;
288 };
289
290 phy_port4: phy@3 {
291 reg = <3>;
292 };
293
294 phy_port5: phy@4 {
295 reg = <4>;
296 };
297 };
298 };
299 };
300
301 &gmac1 {
302 status = "okay";
303
304 phy-mode = "rgmii";
305 qcom,id = <1>;
306
307 pinctrl-0 = <&rgmii2_pins>;
308 pinctrl-names = "default";
309
310 nvmem-cells = <&macaddr_ART_6>;
311 nvmem-cell-names = "mac-address";
312
313 fixed-link {
314 speed = <1000>;
315 full-duplex;
316 };
317 };
318
319 &gmac2 {
320 status = "okay";
321
322 phy-mode = "sgmii";
323 qcom,id = <2>;
324
325 nvmem-cells = <&macaddr_ART_0>;
326 nvmem-cell-names = "mac-address";
327
328 fixed-link {
329 speed = <1000>;
330 full-duplex;
331 };
332 };
333
334 &gsbi4_serial {
335 pinctrl-0 = <&uart0_pins>;
336 pinctrl-names = "default";
337 };
338
339 &gsbi5 {
340 status = "okay";
341 qcom,mode = <GSBI_PROT_SPI>;
342
343 spi@1a280000 {
344 status = "okay";
345
346 pinctrl-0 = <&spi_pins>;
347 pinctrl-names = "default";
348
349 cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
350
351 flash@0 {
352 compatible = "jedec,spi-nor";
353 spi-max-frequency = <50000000>;
354 reg = <0>;
355
356 partitions {
357 compatible = "fixed-partitions";
358 #address-cells = <1>;
359 #size-cells = <1>;
360
361 SBL1@0 {
362 label = "SBL1";
363 reg = <0x0 0x10000>;
364 read-only;
365 };
366
367 MIBIB@10000 {
368 label = "MIBIB";
369 reg = <0x10000 0x20000>;
370 read-only;
371 };
372
373 SBL2@30000 {
374 label = "SBL2";
375 reg = <0x30000 0x30000>;
376 read-only;
377 };
378
379 SBL3@60000 {
380 label = "SBL3";
381 reg = <0x60000 0x30000>;
382 read-only;
383 };
384
385 DDRCONFIG@90000 {
386 label = "DDRCONFIG";
387 reg = <0x90000 0x10000>;
388 read-only;
389 };
390
391 SSD@a0000 {
392 label = "SSD";
393 reg = <0xa0000 0x10000>;
394 read-only;
395 };
396
397 TZ@b0000 {
398 label = "TZ";
399 reg = <0xb0000 0x30000>;
400 read-only;
401 };
402
403 RPM@e0000 {
404 label = "RPM";
405 reg = <0xe0000 0x20000>;
406 read-only;
407 };
408
409 APPSBL@100000 {
410 label = "APPSBL";
411 reg = <0x100000 0x70000>;
412 read-only;
413 };
414
415 APPSBLENV@170000 {
416 label = "APPSBLENV";
417 reg = <0x170000 0x10000>;
418 read-only;
419 };
420
421 ART@180000 {
422 label = "ART";
423 reg = <0x180000 0x40000>;
424 read-only;
425
426 compatible = "nvmem-cells";
427 #address-cells = <1>;
428 #size-cells = <1>;
429
430 macaddr_ART_0: macaddr@0 {
431 reg = <0x0 0x6>;
432 };
433
434 macaddr_ART_6: macaddr@6 {
435 reg = <0x6 0x6>;
436 };
437
438 macaddr_ART_18: macaddr@18 {
439 reg = <0x18 0x6>;
440 };
441
442 macaddr_ART_1e: macaddr@1e {
443 reg = <0x1e 0x6>;
444 };
445
446 precal_ART_1000: precal@1000 {
447 reg = <0x1000 0x2f20>;
448 };
449
450 precal_ART_5000: precal@5000 {
451 reg = <0x5000 0x2f20>;
452 };
453 };
454
455 BOOTCONFIG@1c0000 {
456 label = "BOOTCONFIG";
457 reg = <0x1c0000 0x10000>;
458 read-only;
459 };
460
461 APPSBL_1@1d0000 {
462 label = "APPSBL_1";
463 reg = <0x1d0000 0x70000>;
464 read-only;
465 };
466 };
467 };
468 };
469 };
470
471 &hs_phy_0 {
472 status = "okay";
473 };
474
475 &ss_phy_0 {
476 status = "okay";
477 };
478
479 &usb3_0 {
480 status = "okay";
481
482 pinctrl-0 = <&usb_pwr_en_pins>;
483 pinctrl-names = "default";
484 };
485
486 &hs_phy_1 {
487 status = "okay";
488 };
489
490 &ss_phy_1 {
491 status = "okay";
492 };
493
494 &usb3_1 {
495 status = "okay";
496 };
497
498 &dwc3_0 {
499 #address-cells = <1>;
500 #size-cells = <0>;
501
502 hub_port0: port@1 {
503 reg = <1>;
504 #trigger-source-cells = <0>;
505 };
506 };
507
508 &dwc3_1 {
509 #address-cells = <1>;
510 #size-cells = <0>;
511
512 hub_port1: port@1 {
513 reg = <1>;
514 #trigger-source-cells = <0>;
515 };
516 };
517
518 &pcie0 {
519 status = "okay";
520
521 bridge@0,0 {
522 reg = <0x00000000 0 0 0 0>;
523 #address-cells = <3>;
524 #size-cells = <2>;
525 ranges;
526
527 wifi@1,0 {
528 compatible = "pci168c,0040";
529 reg = <0x00010000 0 0 0 0>;
530
531 nvmem-cells = <&macaddr_ART_1e>, <&precal_ART_1000>;
532 nvmem-cell-names = "mac-address", "pre-calibration";
533 };
534 };
535 };
536
537 &pcie1 {
538 status = "okay";
539 max-link-speed = <1>;
540
541 bridge@0,0 {
542 reg = <0x00000000 0 0 0 0>;
543 #address-cells = <3>;
544 #size-cells = <2>;
545 ranges;
546
547 wifi@1,0 {
548 compatible = "pci168c,0040";
549 reg = <0x00010000 0 0 0 0>;
550
551 nvmem-cells = <&macaddr_ART_18>, <&precal_ART_5000>;
552 nvmem-cell-names = "mac-address", "pre-calibration";
553 };
554 };
555 };
556
557 &qcom_pinmux {
558 button_pins: button_pins {
559 mux {
560 pins = "gpio6", "gpio54", "gpio55", "gpio56", "gpio57",
561 "gpio58", "gpio64", "gpio65";
562 function = "gpio";
563 drive-strength = <2>;
564 bias-pull-up;
565 };
566 };
567
568 led_pins: led_pins {
569 mux {
570 pins = "gpio7", "gpio8", "gpio9", "gpio16", "gpio22",
571 "gpio23", "gpio24", "gpio25", "gpio26", "gpio53";
572 function = "gpio";
573 drive-strength = <2>;
574 bias-pull-up;
575 };
576 };
577
578 uart0_pins: uart0_pins {
579 mux {
580 pins = "gpio10", "gpio11";
581 function = "gsbi4";
582 drive-strength = <12>;
583 bias-disable;
584 };
585 };
586
587 spi_pins: spi_pins {
588 mux {
589 pins = "gpio18", "gpio19", "gpio21";
590 function = "gsbi5";
591 bias-pull-down;
592 };
593
594 data {
595 pins = "gpio18", "gpio19";
596 drive-strength = <10>;
597 };
598
599 cs{
600 pins = "gpio20";
601 drive-strength = <10>;
602 bias-pull-up;
603 };
604
605 clk {
606 pins = "gpio21";
607 drive-strength = <12>;
608 };
609 };
610
611 usb_pwr_en_pins: usb_pwr_en_pins {
612 mux{
613 pins = "gpio68";
614 function = "gpio";
615 drive-strength = <2>;
616 bias-pull-up;
617 output-high;
618 };
619 };
620 };