target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wg2600hp.dts

   1 #include "qcom-ipq8064-v2.0-smb208.dtsi"
   2
   3 #include <dt-bindings/input/input.h>
   4
   5 / {
   6         model = "NEC Aterm WG2600HP";
   7         compatible = "nec,wg2600hp", "qcom,ipq8064";
   8
   9         memory@0 {
  10                 reg = <0x42000000 0x1e000000>;
  11                 device_type = "memory";
  12         };
  13
  14         aliases {
  15                 mdio-gpio0 = &mdio0;
  16
  17                 led-boot = &power_green;
  18                 led-failsafe = &power_red;
  19                 led-running = &power_green;
  20                 led-upgrade = &power_green;
  21         };
  22
  23         keys {
  24                 compatible = "gpio-keys";
  25                 pinctrl-0 = <&button_pins>;
  26                 pinctrl-names = "default";
  27
  28                 wps {
  29                         label = "wps";
  30                         gpios = <&qcom_pinmux 16 GPIO_ACTIVE_LOW>;
  31                         linux,code = <KEY_WPS_BUTTON>;
  32                         debounce-interval = <60>;
  33                         wakeup-source;
  34                 };
  35
  36                 reset {
  37                         label = "reset";
  38                         gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
  39                         linux,code = <KEY_RESTART>;
  40                         debounce-interval = <60>;
  41                         wakeup-source;
  42                 };
  43
  44                 bridge {
  45                         label = "bridge";
  46                         gpios = <&qcom_pinmux 24 GPIO_ACTIVE_LOW>;
  47                         linux,code = <BTN_0>;
  48                         linux,input-type = <EV_SW>;
  49                         debounce-interval = <60>;
  50                         wakeup-source;
  51                 };
  52
  53                 converter {
  54                         label = "converter";
  55                         gpios = <&qcom_pinmux 25 GPIO_ACTIVE_LOW>;
  56                         linux,code = <BTN_0>;
  57                         linux,input-type = <EV_SW>;
  58                         debounce-interval = <60>;
  59                         wakeup-source;
  60                 };
  61         };
  62
  63         leds {
  64                 compatible = "gpio-leds";
  65                 pinctrl-0 = <&led_pins>;
  66                 pinctrl-names = "default";
  67
  68                 converter_green {
  69                         label = "green:converter";
  70                         gpios = <&qcom_pinmux 6 GPIO_ACTIVE_HIGH>;
  71                 };
  72
  73                 power_red: power_red {
  74                         label = "red:power";
  75                         gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
  76                 };
  77
  78                 active_green {
  79                         label = "green:active";
  80                         gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
  81                 };
  82
  83                 active_red {
  84                         label = "red:active";
  85                         gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
  86                 };
  87
  88                 power_green: power_green {
  89                         label = "green:power";
  90                         gpios = <&qcom_pinmux 14 GPIO_ACTIVE_HIGH>;
  91                 };
  92
  93                 converter_red {
  94                         label = "red:converter";
  95                         gpios = <&qcom_pinmux 15 GPIO_ACTIVE_HIGH>;
  96                 };
  97
  98                 wlan2g_green {
  99                         label = "green:wlan2g";
 100                         gpios = <&qcom_pinmux 55 GPIO_ACTIVE_HIGH>;
 101                 };
 102
 103                 wlan2g_red {
 104                         label = "red:wlan2g";
 105                         gpios = <&qcom_pinmux 56 GPIO_ACTIVE_HIGH>;
 106                 };
 107
 108                 wlan5g_green {
 109                         label = "green:wlan5g";
 110                         gpios = <&qcom_pinmux 57 GPIO_ACTIVE_HIGH>;
 111                 };
 112
 113                 wlan5g_red {
 114                         label = "red:wlan5g";
 115                         gpios = <&qcom_pinmux 58 GPIO_ACTIVE_HIGH>;
 116                 };
 117
 118                 tv_green {
 119                         label = "green:tv";
 120                         gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>;
 121                 };
 122
 123                 tv_red {
 124                         label = "red:tv";
 125                         gpios = <&qcom_pinmux 65 GPIO_ACTIVE_HIGH>;
 126                 };
 127         };
 128 };
 129
 130 &CPU_SPC {
 131         status = "disabled";
 132 };
 133
 134 &adm_dma {
 135         status = "okay";
 136 };
 137
 138 &mdio0 {
 139         status = "okay";
 140
 141         pinctrl-0 = <&mdio0_pins>;
 142         pinctrl-names = "default";
 143
 144 switch@10 {
 145                 compatible = "qca,qca8337";
 146                 #address-cells = <1>;
 147                 #size-cells = <0>;
 148                 reg = <0x10>;
 149
 150                 ports {
 151                         #address-cells = <1>;
 152                         #size-cells = <0>;
 153
 154                         port@0 {
 155                                 reg = <0>;
 156                                 label = "cpu";
 157                                 ethernet = <&gmac1>;
 158                                 phy-mode = "rgmii";
 159                                 tx-internal-delay-ps = <1000>;
 160
 161                                 fixed-link {
 162                                         speed = <1000>;
 163                                         full-duplex;
 164                                 };
 165                         };
 166
 167                         port@1 {
 168                                 reg = <1>;
 169                                 label = "wan";
 170                                 phy-mode = "internal";
 171                                 phy-handle = <&phy_port1>;
 172                         };
 173
 174                         port@2 {
 175                                 reg = <2>;
 176                                 label = "lan1";
 177                                 phy-mode = "internal";
 178                                 phy-handle = <&phy_port2>;
 179                         };
 180
 181                         port@3 {
 182                                 reg = <3>;
 183                                 label = "lan2";
 184                                 phy-mode = "internal";
 185                                 phy-handle = <&phy_port3>;
 186                         };
 187
 188                         port@4 {
 189                                 reg = <4>;
 190                                 label = "lan3";
 191                                 phy-mode = "internal";
 192                                 phy-handle = <&phy_port4>;
 193                         };
 194
 195                         port@5 {
 196                                 reg = <5>;
 197                                 label = "lan4";
 198                                 phy-mode = "internal";
 199                                 phy-handle = <&phy_port5>;
 200                         };
 201
 202                         /*
 203                         port@6 {
 204                                 reg = <0>;
 205                                 label = "cpu";
 206                                 ethernet = <&gmac2>;
 207                                 phy-mode = "rgmii";
 208
 209                                 fixed-link {
 210                                         speed = <1000>;
 211                                         full-duplex;
 212                                         pause;
 213                                         asym-pause;
 214                                 };
 215                         };
 216                         */
 217                 };
 218
 219                 mdio {
 220                         #address-cells = <1>;
 221                         #size-cells = <0>;
 222
 223                         phy_port1: phy@0 {
 224                                 reg = <0>;
 225                         };
 226
 227                         phy_port2: phy@1 {
 228                                 reg = <1>;
 229                         };
 230
 231                         phy_port3: phy@2 {
 232                                 reg = <2>;
 233                         };
 234
 235                         phy_port4: phy@3 {
 236                                 reg = <3>;
 237                         };
 238
 239                         phy_port5: phy@4 {
 240                                 reg = <4>;
 241                         };
 242                 };
 243         };
 244 };
 245
 246 &gmac1 {
 247         status = "okay";
 248
 249         phy-mode = "rgmii";
 250         qcom,id = <1>;
 251
 252         pinctrl-0 = <&rgmii2_pins>;
 253         pinctrl-names = "default";
 254
 255         nvmem-cells = <&macaddr_PRODUCTDATA_6>;
 256         nvmem-cell-names = "mac-address";
 257
 258         fixed-link {
 259                 speed = <1000>;
 260                 full-duplex;
 261         };
 262 };
 263
 264 &gmac2 {
 265         status = "okay";
 266
 267         phy-mode = "sgmii";
 268         qcom,id = <2>;
 269
 270         nvmem-cells = <&macaddr_PRODUCTDATA_0>;
 271         nvmem-cell-names = "mac-address";
 272
 273         fixed-link {
 274                 speed = <1000>;
 275                 full-duplex;
 276         };
 277 };
 278
 279 &gsbi5 {
 280         status = "okay";
 281
 282         qcom,mode = <GSBI_PROT_SPI>;
 283
 284         spi@1a280000 {
 285                 status = "okay";
 286
 287                 pinctrl-0 = <&spi_pins>;
 288                 pinctrl-names = "default";
 289
 290                 cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
 291
 292                 flash@0 {
 293                         compatible = "jedec,spi-nor";
 294                         spi-max-frequency = <50000000>;
 295                         reg = <0>;
 296
 297                         partitions {
 298                                 compatible = "fixed-partitions";
 299                                 #address-cells = <1>;
 300                                 #size-cells = <1>;
 301
 302                                 SBL1@0 {
 303                                         label = "SBL1";
 304                                         reg = <0x0 0x20000>;
 305                                         read-only;
 306                                 };
 307
 308                                 MIBIB@20000 {
 309                                         label = "MIBIB";
 310                                         reg = <0x20000 0x20000>;
 311                                         read-only;
 312                                 };
 313
 314                                 SBL2@40000 {
 315                                         label = "SBL2";
 316                                         reg = <0x40000 0x40000>;
 317                                         read-only;
 318                                 };
 319
 320                                 SBL3@80000 {
 321                                         label = "SBL3";
 322                                         reg = <0x80000 0x80000>;
 323                                         read-only;
 324                                 };
 325
 326                                 DDRCONFIG@100000 {
 327                                         label = "DDRCONFIG";
 328                                         reg = <0x100000 0x10000>;
 329                                         read-only;
 330                                 };
 331
 332                                 SSD@110000 {
 333                                         label = "SSD";
 334                                         reg = <0x110000 0x10000>;
 335                                         read-only;
 336                                 };
 337
 338                                 TZ@120000 {
 339                                         label = "TZ";
 340                                         reg = <0x120000 0x80000>;
 341                                         read-only;
 342                                 };
 343
 344                                 RPM@1a0000 {
 345                                         label = "RPM";
 346                                         reg = <0x1a0000 0x80000>;
 347                                         read-only;
 348                                 };
 349
 350                                 APPSBL@220000 {
 351                                         label = "APPSBL";
 352                                         reg = <0x220000 0x80000>;
 353                                         read-only;
 354                                 };
 355
 356                                 APPSBLENV@2a0000 {
 357                                         label = "APPSBLENV";
 358                                         reg = <0x2a0000 0x10000>;
 359                                 };
 360
 361                                 PRODUCTDATA: PRODUCTDATA@2b0000 {
 362                                         label = "PRODUCTDATA";
 363                                         reg = <0x2b0000 0x30000>;
 364                                         read-only;
 365                                 };
 366
 367                                 ART@2e0000 {
 368                                         label = "ART";
 369                                         reg = <0x2e0000 0x40000>;
 370                                         read-only;
 371                                         compatible = "nvmem-cells";
 372                                         #address-cells = <1>;
 373                                         #size-cells = <1>;
 374
 375                                         precal_ART_1000: precal@1000 {
 376                                                 reg = <0x1000 0x2f20>;
 377                                         };
 378
 379                                         precal_ART_5000: precal@5000 {
 380                                                 reg = <0x5000 0x2f20>;
 381                                         };
 382                                 };
 383
 384                                 TP@320000 {
 385                                         label = "TP";
 386                                         reg = <0x320000 0x40000>;
 387                                         read-only;
 388                                 };
 389
 390                                 TINY@360000 {
 391                                         label = "TINY";
 392                                         reg = <0x360000 0x500000>;
 393                                         read-only;
 394                                 };
 395
 396                                 firmware@860000 {
 397                                         compatible = "denx,uimage";
 398                                         label = "firmware";
 399                                         reg = <0x860000 0x17a0000>;
 400                                 };
 401                         };
 402                 };
 403         };
 404 };
 405
 406 &hs_phy_0 {
 407         status = "okay";
 408 };
 409
 410 &ss_phy_0 {
 411         status = "okay";
 412 };
 413
 414 &usb3_0 {
 415         status = "okay";
 416
 417         pinctrl-0 = <&usb_pwr_en_pins>;
 418         pinctrl-names = "default";
 419 };
 420
 421 &hs_phy_1 {
 422         status = "okay";
 423 };
 424
 425 &ss_phy_1 {
 426         status = "okay";
 427 };
 428
 429 &usb3_1 {
 430         status = "okay";
 431 };
 432
 433 &pcie0 {
 434         status = "okay";
 435
 436         bridge@0,0 {
 437                 reg = <0x00000000 0 0 0 0>;
 438                 #address-cells = <3>;
 439                 #size-cells = <2>;
 440                 ranges;
 441
 442                 wifi@1,0 {
 443                         compatible = "pci168c,0040";
 444                         reg = <0x00010000 0 0 0 0>;
 445
 446                         nvmem-cells = <&macaddr_PRODUCTDATA_12>, <&precal_ART_1000>;
 447                         nvmem-cell-names = "mac-address", "pre-calibration";
 448                 };
 449         };
 450 };
 451
 452 &pcie1 {
 453         status = "okay";
 454         max-link-speed = <1>;
 455
 456         bridge@0,0 {
 457                 reg = <0x00000000 0 0 0 0>;
 458                 #address-cells = <3>;
 459                 #size-cells = <2>;
 460                 ranges;
 461
 462                 wifi@1,0 {
 463                         compatible = "pci168c,0040";
 464                         reg = <0x00010000 0 0 0 0>;
 465
 466                         nvmem-cells = <&macaddr_PRODUCTDATA_c>, <&precal_ART_5000>;
 467                         nvmem-cell-names = "mac-address", "pre-calibration";
 468                 };
 469         };
 470 };
 471
 472 &qcom_pinmux {
 473         button_pins: button_pins {
 474                 mux {
 475                         pins = "gpio16", "gpio54", "gpio24", "gpio25";
 476                         function = "gpio";
 477                         drive-strength = <2>;
 478                         bias-pull-up;
 479                 };
 480         };
 481
 482         led_pins: led_pins {
 483                 mux {
 484                         pins = "gpio6", "gpio7", "gpio8", "gpio9", "gpio14",
 485                                 "gpio15", "gpio55", "gpio56", "gpio57", "gpio58",
 486                                 "gpio64", "gpio65";
 487                         function = "gpio";
 488                         drive-strength = <2>;
 489                         bias-pull-down;
 490                 };
 491         };
 492
 493         spi_pins: spi_pins {
 494                 mux {
 495                         pins = "gpio18", "gpio19", "gpio21";
 496                         function = "gsbi5";
 497                         bias-pull-down;
 498                 };
 499
 500                 data {
 501                         pins = "gpio18", "gpio19";
 502                         drive-strength = <10>;
 503                 };
 504
 505                 cs {
 506                         pins = "gpio20";
 507                         drive-strength = <10>;
 508                         bias-pull-up;
 509                 };
 510
 511                 clk {
 512                         pins = "gpio21";
 513                         drive-strength = <12>;
 514                 };
 515         };
 516
 517         usb_pwr_en_pins: usb_pwr_en_pins {
 518                 mux {
 519                         pins = "gpio22";
 520                         function = "gpio";
 521                         drive-strength = <2>;
 522                         bias-pull-down;
 523                         output-high;
 524                 };
 525         };
 526 };
 527
 528 &PRODUCTDATA {
 529         compatible = "nvmem-cells";
 530         #address-cells = <1>;
 531         #size-cells = <1>;
 532
 533         macaddr_PRODUCTDATA_0: macaddr@0 {
 534                 reg = <0x0 0x6>;
 535         };
 536
 537         macaddr_PRODUCTDATA_6: macaddr@6 {
 538                 reg = <0x6 0x6>;
 539         };
 540
 541         macaddr_PRODUCTDATA_c: macaddr@c {
 542                 reg = <0xc 0x6>;
 543         };
 544
 545         macaddr_PRODUCTDATA_12: macaddr@12 {
 546                 reg = <0x12 0x6>;
 547         };
 548 };