target/linux/bcm27xx/patches-5.10/950-0459-drm-vc4-hdmi-Support-BCM2711-CEC-interrupt-setup.patch

   1 From fe8bcda64e4d30cf91f2807973940873c1a577a2 Mon Sep 17 00:00:00 2001
   2 From: Maxime Ripard <maxime@cerno.tech>
   3 Date: Mon, 11 Jan 2021 15:23:04 +0100
   4 Subject: [PATCH] drm/vc4: hdmi: Support BCM2711 CEC interrupt setup
   5
   6 The HDMI controller found in the BCM2711 has an external interrupt
   7 controller for the CEC and hotplug interrupt shared between the two
   8 instances.
   9
  10 Let's add a variant flag to register a single interrupt handler and
  11 deals with the interrupt handler setup, or two interrupt handlers
  12 relying on an external irqchip.
  13
  14 Signed-off-by: Maxime Ripard <maxime@cerno.tech>
  15 Reviewed-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
  16 ---
  17  drivers/gpu/drm/vc4/vc4_hdmi.c | 42 ++++++++++++++++++++++++++--------
  18  drivers/gpu/drm/vc4/vc4_hdmi.h |  7 ++++++
  19  2 files changed, 39 insertions(+), 10 deletions(-)
  20
  21 --- a/drivers/gpu/drm/vc4/vc4_hdmi.c
  22 +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
  23 @@ -1725,9 +1725,11 @@ static int vc4_hdmi_cec_adap_enable(stru
  24                            ((3600 / usecs) << VC4_HDMI_CEC_CNT_TO_3600_US_SHIFT) |
  25                            ((3500 / usecs) << VC4_HDMI_CEC_CNT_TO_3500_US_SHIFT));
  26
  27 -               HDMI_WRITE(HDMI_CEC_CPU_MASK_CLEAR, VC4_HDMI_CPU_CEC);
  28 +               if (!vc4_hdmi->variant->external_irq_controller)
  29 +                       HDMI_WRITE(HDMI_CEC_CPU_MASK_CLEAR, VC4_HDMI_CPU_CEC);
  30         } else {
  31 -               HDMI_WRITE(HDMI_CEC_CPU_MASK_SET, VC4_HDMI_CPU_CEC);
  32 +               if (!vc4_hdmi->variant->external_irq_controller)
  33 +                       HDMI_WRITE(HDMI_CEC_CPU_MASK_SET, VC4_HDMI_CPU_CEC);
  34                 HDMI_WRITE(HDMI_CEC_CNTRL_5, val |
  35                            VC4_HDMI_CEC_TX_SW_RESET | VC4_HDMI_CEC_RX_SW_RESET);
  36         }
  37 @@ -1799,8 +1801,6 @@ static int vc4_hdmi_cec_init(struct vc4_
  38         cec_fill_conn_info_from_drm(&conn_info, &vc4_hdmi->connector);
  39         cec_s_conn_info(vc4_hdmi->cec_adap, &conn_info);
  40
  41 -       HDMI_WRITE(HDMI_CEC_CPU_MASK_SET, 0xffffffff);
  42 -
  43         value = HDMI_READ(HDMI_CEC_CNTRL_1);
  44         /* Set the logical address to Unregistered */
  45         value |= VC4_HDMI_CEC_ADDR_MASK;
  46 @@ -1808,12 +1808,32 @@ static int vc4_hdmi_cec_init(struct vc4_
  47
  48         vc4_hdmi_cec_update_clk_div(vc4_hdmi);
  49
  50 -       ret = devm_request_threaded_irq(&pdev->dev, platform_get_irq(pdev, 0),
  51 -                                       vc4_cec_irq_handler,
  52 -                                       vc4_cec_irq_handler_thread, 0,
  53 -                                       "vc4 hdmi cec", vc4_hdmi);
  54 -       if (ret)
  55 -               goto err_delete_cec_adap;
  56 +       if (vc4_hdmi->variant->external_irq_controller) {
  57 +               ret = devm_request_threaded_irq(&pdev->dev,
  58 +                                               platform_get_irq_byname(pdev, "cec-rx"),
  59 +                                               vc4_cec_irq_handler_rx_bare,
  60 +                                               vc4_cec_irq_handler_rx_thread, 0,
  61 +                                               "vc4 hdmi cec rx", vc4_hdmi);
  62 +               if (ret)
  63 +                       goto err_delete_cec_adap;
  64 +
  65 +               ret = devm_request_threaded_irq(&pdev->dev,
  66 +                                               platform_get_irq_byname(pdev, "cec-tx"),
  67 +                                               vc4_cec_irq_handler_tx_bare,
  68 +                                               vc4_cec_irq_handler_tx_thread, 0,
  69 +                                               "vc4 hdmi cec tx", vc4_hdmi);
  70 +               if (ret)
  71 +                       goto err_delete_cec_adap;
  72 +       } else {
  73 +               HDMI_WRITE(HDMI_CEC_CPU_MASK_SET, 0xffffffff);
  74 +
  75 +               ret = devm_request_threaded_irq(&pdev->dev, platform_get_irq(pdev, 0),
  76 +                                               vc4_cec_irq_handler,
  77 +                                               vc4_cec_irq_handler_thread, 0,
  78 +                                               "vc4 hdmi cec", vc4_hdmi);
  79 +               if (ret)
  80 +                       goto err_delete_cec_adap;
  81 +       }
  82
  83         ret = cec_register_adapter(vc4_hdmi->cec_adap, &pdev->dev);
  84         if (ret < 0)
  85 @@ -2288,6 +2308,7 @@ static const struct vc4_hdmi_variant bcm
  86                 PHY_LANE_CK,
  87         },
  88         .unsupported_odd_h_timings      = true,
  89 +       .external_irq_controller        = true,
  90
  91         .init_resources         = vc5_hdmi_init_resources,
  92         .csc_setup              = vc5_hdmi_csc_setup,
  93 @@ -2314,6 +2335,7 @@ static const struct vc4_hdmi_variant bcm
  94                 PHY_LANE_2,
  95         },
  96         .unsupported_odd_h_timings      = true,
  97 +       .external_irq_controller        = true,
  98
  99         .init_resources         = vc5_hdmi_init_resources,
 100         .csc_setup              = vc5_hdmi_csc_setup,
 101 --- a/drivers/gpu/drm/vc4/vc4_hdmi.h
 102 +++ b/drivers/gpu/drm/vc4/vc4_hdmi.h
 103 @@ -61,6 +61,13 @@ struct vc4_hdmi_variant {
 104         /* The BCM2711 cannot deal with odd horizontal pixel timings */
 105         bool unsupported_odd_h_timings;
 106
 107 +       /*
 108 +        * The BCM2711 CEC/hotplug IRQ controller is shared between the
 109 +        * two HDMI controllers, and we have a proper irqchip driver for
 110 +        * it.
 111 +        */
 112 +       bool external_irq_controller;
 113 +
 114         /* Callback to get the resources (memory region, interrupts,
 115          * clocks, etc) for that variant.
 116          */