target/linux/mediatek/dts/mt7622-elecom-wrc-x3200gst3.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2 /dts-v1/;
   3
   4 #include <dt-bindings/input/input.h>
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/leds/common.h>
   7
   8 #include "mt7622.dtsi"
   9 #include "mt6380.dtsi"
  10
  11 / {
  12         model = "ELECOM WRC-X3200GST3";
  13         compatible = "elecom,wrc-x3200gst3", "mediatek,mt7622";
  14
  15         aliases {
  16                 serial0 = &uart0;
  17                 led-boot = &led_power_green;
  18                 led-failsafe = &led_power_red;
  19                 led-running = &led_power_green;
  20                 led-upgrade = &led_power_green;
  21                 label-mac-device = &wan;
  22         };
  23
  24         chosen {
  25                 bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n8 swiotlb=512";
  26         };
  27
  28         memory {
  29                 reg = <0 0x40000000 0 0x1f000000>;
  30         };
  31
  32         leds {
  33                 compatible = "gpio-leds";
  34
  35                 led-0 {
  36                         gpios = <&pio 47 GPIO_ACTIVE_HIGH>;
  37                         color = <LED_COLOR_ID_RED>;
  38                         function = LED_FUNCTION_WPS;
  39                 };
  40
  41                 led_power_red: led-1 {
  42                         gpios = <&pio 48 GPIO_ACTIVE_HIGH>;
  43                         color = <LED_COLOR_ID_RED>;
  44                         function = LED_FUNCTION_POWER;
  45                         function-enumerator = <1>;
  46                 };
  47
  48                 led_power_green: led-2 {
  49                         gpios = <&pio 49 GPIO_ACTIVE_HIGH>;
  50                         color = <LED_COLOR_ID_GREEN>;
  51                         function = LED_FUNCTION_POWER;
  52                         function-enumerator = <2>;
  53                 };
  54
  55                 led-3 {
  56                         gpios = <&pio 50 GPIO_ACTIVE_HIGH>;
  57                         color = <LED_COLOR_ID_BLUE>;
  58                         function = LED_FUNCTION_POWER;
  59                         function-enumerator = <3>;
  60                 };
  61
  62                 led-4 {
  63                         gpios = <&pio 85 GPIO_ACTIVE_HIGH>;
  64                         color = <LED_COLOR_ID_WHITE>;
  65                         function = LED_FUNCTION_WLAN;
  66                         function-enumerator = <1>;
  67                         linux,default-trigger = "phy0tpt";
  68                 };
  69
  70                 led-5 {
  71                         gpios = <&pio 89 GPIO_ACTIVE_HIGH>;
  72                         color = <LED_COLOR_ID_WHITE>;
  73                         function = LED_FUNCTION_WLAN;
  74                         function-enumerator = <2>;
  75                         linux,default-trigger = "phy1radio";
  76                 };
  77         };
  78
  79         keys {
  80                 compatible = "gpio-keys";
  81
  82                 reset {
  83                         label = "reset";
  84                         gpios = <&pio 0 GPIO_ACTIVE_LOW>;
  85                         linux,code = <KEY_RESTART>;
  86                 };
  87
  88                 ap {
  89                         label = "ap";
  90                         gpios = <&pio 42 GPIO_ACTIVE_LOW>;
  91                         linux,code = <BTN_0>;
  92                         linux,input-type = <EV_SW>;
  93                 };
  94
  95                 router {
  96                         label = "router";
  97                         gpios = <&pio 43 GPIO_ACTIVE_LOW>;
  98                         linux,code = <BTN_1>;
  99                         linux,input-type = <EV_SW>;
 100                 };
 101
 102                 wps {
 103                         label = "wps";
 104                         gpios = <&pio 102 GPIO_ACTIVE_LOW>;
 105                         linux,code = <KEY_WPS_BUTTON>;
 106                 };
 107         };
 108 };
 109
 110 &cpu0 {
 111         proc-supply = <&mt6380_vcpu_reg>;
 112         sram-supply = <&mt6380_vm_reg>;
 113 };
 114
 115 &cpu1 {
 116         proc-supply = <&mt6380_vcpu_reg>;
 117         sram-supply = <&mt6380_vm_reg>;
 118 };
 119
 120 &pio {
 121         eth_pins: eth-pins {
 122                 mux {
 123                         function = "eth";
 124                         groups = "mdc_mdio", "rgmii_via_gmac2";
 125                 };
 126         };
 127
 128         pcie0_pins: pcie0-pins {
 129                 mux {
 130                         function = "pcie";
 131                         groups = "pcie0_pad_perst",
 132                                  "pcie0_1_waken",
 133                                  "pcie0_1_clkreq";
 134                 };
 135         };
 136
 137         pmic_bus_pins: pmic-bus-pins {
 138                 mux {
 139                         function = "pmic";
 140                         groups = "pmic_bus";
 141                 };
 142         };
 143
 144         pwm7_pins: pwm1-2-pins {
 145                 mux {
 146                         function = "pwm";
 147                         groups = "pwm_ch7_2";
 148                 };
 149         };
 150
 151         /* Serial NAND is shared pin with SPI-NOR */
 152         serial_nand_pins: serial-nand-pins {
 153                 mux {
 154                         function = "flash";
 155                         groups = "snfi";
 156                 };
 157
 158                 conf-cmd-data {
 159                         pins = "SPI_WP", "SPI_HOLD", "SPI_MOSI",
 160                                "SPI_MISO", "SPI_CS";
 161                         drive-strength = <16>;
 162                         bias-pull-up;
 163                 };
 164
 165                 conf-clk {
 166                         pins = "SPI_CLK";
 167                         drive-strength = <16>;
 168                         bias-pull-down;
 169                 };
 170         };
 171
 172         uart0_pins: uart0-pins {
 173                 mux {
 174                         function = "uart";
 175                         groups = "uart0_0_tx_rx" ;
 176                 };
 177         };
 178
 179         watchdog_pins: watchdog-pins {
 180                 mux {
 181                         function = "watchdog";
 182                         groups = "watchdog";
 183                 };
 184         };
 185 };
 186
 187 &eth {
 188         pinctrl-names = "default";
 189         pinctrl-0 = <&eth_pins>;
 190         status = "okay";
 191
 192         gmac0: mac@0 {
 193                 compatible = "mediatek,eth-mac";
 194                 reg = <0>;
 195
 196                 phy-connection-type = "2500base-x";
 197
 198                 nvmem-cells = <&macaddr_factory_7fff4>;
 199                 nvmem-cell-names = "mac-address";
 200
 201                 fixed-link {
 202                         speed = <2500>;
 203                         full-duplex;
 204                         pause;
 205                 };
 206         };
 207
 208         mdio-bus {
 209                 #address-cells = <1>;
 210                 #size-cells = <0>;
 211
 212                 switch@1f {
 213                         compatible = "mediatek,mt7531";
 214                         reg = <31>;
 215                         interrupt-controller;
 216                         #interrupt-cells = <1>;
 217                         interrupt-parent = <&pio>;
 218                         interrupts = <53 IRQ_TYPE_LEVEL_HIGH>;
 219                         reset-gpios = <&pio 54 GPIO_ACTIVE_HIGH>;
 220
 221                         ports {
 222                                 #address-cells = <1>;
 223                                 #size-cells = <0>;
 224
 225                                 wan: port@0 {
 226                                         reg = <0>;
 227                                         label = "wan";
 228
 229                                         nvmem-cells = <&macaddr_factory_7fffa>;
 230                                         nvmem-cell-names = "mac-address";
 231                                 };
 232
 233                                 port@1 {
 234                                         reg = <1>;
 235                                         label = "lan4";
 236                                 };
 237
 238                                 port@2 {
 239                                         reg = <2>;
 240                                         label = "lan3";
 241                                 };
 242
 243                                 port@3 {
 244                                         reg = <3>;
 245                                         label = "lan2";
 246                                 };
 247
 248                                 port@4 {
 249                                         reg = <4>;
 250                                         label = "lan1";
 251                                 };
 252
 253                                 port@6 {
 254                                         reg = <6>;
 255                                         ethernet = <&gmac0>;
 256                                         phy-mode = "2500base-x";
 257
 258                                         fixed-link {
 259                                                 speed = <2500>;
 260                                                 full-duplex;
 261                                                 pause;
 262                                         };
 263                                 };
 264                         };
 265                 };
 266         };
 267 };
 268
 269 &bch {
 270         status = "okay";
 271 };
 272
 273 &snfi {
 274         pinctrl-names = "default";
 275         pinctrl-0 = <&serial_nand_pins>;
 276         status = "okay";
 277
 278         flash@0 {
 279                 compatible = "spi-nand";
 280                 reg = <0>;
 281                 spi-tx-bus-width = <4>;
 282                 spi-rx-bus-width = <4>;
 283                 nand-ecc-engine = <&snfi>;
 284                 mediatek,bmt-v2;
 285                 mediatek,bmt-table-size = <0x1000>;
 286                 mediatek,bmt-remap-range = <0x0 0x8c0000>,
 287                                            <0x1bc0000 0x30c0000>;
 288
 289                 partitions {
 290                         compatible = "fixed-partitions";
 291                         #address-cells = <1>;
 292                         #size-cells = <1>;
 293
 294                         partition@0 {
 295                                 label = "Preloader";
 296                                 reg = <0x0 0x80000>;
 297                                 read-only;
 298                         };
 299
 300                         partition@80000 {
 301                                 label = "ATF";
 302                                 reg = <0x80000 0x40000>;
 303                                 read-only;
 304                         };
 305
 306                         partition@c0000 {
 307                                 label = "u-boot";
 308                                 reg = <0xc0000 0x80000>;
 309                                 read-only;
 310                         };
 311
 312                         partition@140000 {
 313                                 label = "u-boot-env";
 314                                 reg = <0x140000 0x80000>;
 315                                 read-only;
 316                         };
 317
 318                         factory: partition@1c0000 {
 319                                 label = "factory";
 320                                 reg = <0x1c0000 0x100000>;
 321                                 read-only;
 322
 323                                 nvmem-layout {
 324                                         compatible = "fixed-layout";
 325                                         #address-cells = <1>;
 326                                         #size-cells = <1>;
 327
 328                                         macaddr_factory_4: macaddr@4 {
 329                                                 compatible = "mac-base";
 330                                                 reg = <0x4 0x6>;
 331                                                 #nvmem-cell-cells = <1>;
 332                                         };
 333
 334                                         macaddr_factory_7fff4: macaddr@7fff4 {
 335                                                 reg = <0x7fff4 0x6>;
 336                                         };
 337
 338                                         macaddr_factory_7fffa: macaddr@7fffa {
 339                                                 reg = <0x7fffa 0x6>;
 340                                         };
 341                                 };
 342                         };
 343
 344                         partition@2c0000 {
 345                                 label = "kernel";
 346                                 reg = <0x2c0000 0x600000>;
 347                         };
 348
 349                         partition@8c0000 {
 350                                 label = "ubi";
 351                                 reg = <0x8c0000 0x1300000>;
 352                         };
 353
 354                         partition@1bc0000 {
 355                                 label = "tm_pattern";
 356                                 reg = <0x1bc0000 0x500000>;
 357                                 read-only;
 358                         };
 359
 360                         partition@20c0000 {
 361                                 label = "tm_key";
 362                                 reg = <0x20c0000 0x100000>;
 363                                 read-only;
 364                         };
 365
 366                         partition@21c0000 {
 367                                 label = "user_data";
 368                                 reg = <0x21c0000 0xf00000>;
 369                                 read-only;
 370                         };
 371
 372                         partition@30c0000 {
 373                                 label = "reserved";
 374                                 reg = <0x30c0000 0x4f40000>;
 375                                 read-only;
 376                         };
 377                 };
 378         };
 379 };
 380
 381 &pcie0 {
 382         pinctrl-names = "default";
 383         pinctrl-0 = <&pcie0_pins>;
 384         status = "okay";
 385 };
 386
 387 &slot0 {
 388         status = "okay";
 389
 390         wifi@0,0 {
 391                 compatible = "mediatek,mt76";
 392                 reg = <0x0000 0 0 0 0>;
 393                 mediatek,mtd-eeprom = <&factory 0x5000>;
 394                 ieee80211-freq-limit = <5000000 6000000>;
 395                 nvmem-cells = <&macaddr_factory_4 1>;
 396                 nvmem-cell-names = "mac-address";
 397         };
 398 };
 399
 400 &pwm {
 401         pinctrl-names = "default";
 402         pinctrl-0 = <&pwm7_pins>;
 403         status = "okay";
 404 };
 405
 406 &pwrap {
 407         pinctrl-names = "default";
 408         pinctrl-0 = <&pmic_bus_pins>;
 409         status = "okay";
 410 };
 411
 412 &rtc {
 413         status = "disabled";
 414 };
 415
 416 &uart0 {
 417         pinctrl-names = "default";
 418         pinctrl-0 = <&uart0_pins>;
 419         status = "okay";
 420 };
 421
 422 &watchdog {
 423         pinctrl-names = "default";
 424         pinctrl-0 = <&watchdog_pins>;
 425         status = "okay";
 426 };
 427
 428 &wmac {
 429         status = "okay";
 430
 431         mediatek,mtd-eeprom = <&factory 0x0>;
 432 };