package/boot/uboot-d1/patches/0088-sunxi-riscv-Copy-in-WIP-version-of-devicetrees.patch

   1 From 197d4096c697bcde8f9833b1d04b17eb2b232b85 Mon Sep 17 00:00:00 2001
   2 From: Samuel Holland <samuel@sholland.org>
   3 Date: Mon, 31 Oct 2022 22:59:00 -0500
   4 Subject: [PATCH 88/90] sunxi: riscv: Copy in WIP version of devicetrees
   5
   6 While the bindings still are not stable, this should help things work
   7 out of the box.
   8
   9 Signed-off-by: Samuel Holland <samuel@sholland.org>
  10 ---
  11  .../riscv/dts/sun20i-d1-clockworkpi-v3.14.dts | 134 +++++++-
  12  .../dts/sun20i-d1-common-regulators.dtsi      |  13 +
  13  arch/riscv/dts/sun20i-d1-devterm-v3.14.dts    |  16 +
  14  .../dts/sun20i-d1-dongshan-nezha-stu.dts      |  48 ++-
  15  .../dts/sun20i-d1-lichee-rv-86-panel-480p.dts |  51 +++
  16  .../dts/sun20i-d1-lichee-rv-86-panel.dtsi     |  64 ++++
  17  arch/riscv/dts/sun20i-d1-lichee-rv-dock.dts   |  98 ++++++
  18  arch/riscv/dts/sun20i-d1-lichee-rv.dts        |   6 +
  19  arch/riscv/dts/sun20i-d1-mangopi-mq-pro.dts   |  41 +++
  20  arch/riscv/dts/sun20i-d1-nezha.dts            | 117 ++++++-
  21  arch/riscv/dts/sun20i-d1.dtsi                 | 314 +++++++++++++++++-
  22  11 files changed, 881 insertions(+), 21 deletions(-)
  23
  24 --- a/arch/riscv/dts/sun20i-d1-clockworkpi-v3.14.dts
  25 +++ b/arch/riscv/dts/sun20i-d1-clockworkpi-v3.14.dts
  26 @@ -22,16 +22,78 @@
  27                 stdout-path = "serial0:115200n8";
  28         };
  29
  30 +       audio_amplifier: audio-amplifier {
  31 +               compatible = "simple-audio-amplifier";
  32 +               enable-gpios = <&pio 4 1 GPIO_ACTIVE_HIGH>; /* PE1/GPIO11 */
  33 +               sound-name-prefix = "Amplifier";
  34 +               VCC-supply = <&reg_vcc>;
  35 +       };
  36 +
  37 +       /*
  38 +        * FIXME: This is not really an amplifier, but the amplifier binding
  39 +        * has the needed properties and behavior.
  40 +        */
  41 +       audio_switch: audio-switch {
  42 +               compatible = "simple-audio-amplifier";
  43 +               enable-gpios = <&pio 1 2 GPIO_ACTIVE_HIGH>; /* PB2/AUD_SWITCH */
  44 +               sound-name-prefix = "Switch";
  45 +               VCC-supply = <&reg_aldo1>;
  46 +       };
  47 +
  48 +       backlight: backlight {
  49 +               compatible = "pwm-backlight";
  50 +               power-supply = <&reg_vcc>;
  51 +               pwms = <&pwm 4 50000 0>; /* PD20/GPIO9 */
  52 +       };
  53 +
  54 +       bt_sco_codec: bt-sco-codec {
  55 +               #sound-dai-cells = <0>;
  56 +               compatible = "linux,bt-sco";
  57 +       };
  58 +
  59 +       bt-sound {
  60 +               compatible = "simple-audio-card";
  61 +               simple-audio-card,name = "Bluetooth";
  62 +               #address-cells = <1>;
  63 +               #size-cells = <0>;
  64 +
  65 +               simple-audio-card,dai-link@0 {
  66 +                       format = "dsp_a";
  67 +                       frame-master = <&bt_sound_cpu>;
  68 +                       bitclock-master = <&bt_sound_cpu>;
  69 +
  70 +                       bt_sound_cpu: cpu {
  71 +                               sound-dai = <&i2s1>;
  72 +                       };
  73 +
  74 +                       codec {
  75 +                               sound-dai = <&bt_sco_codec>;
  76 +                       };
  77 +               };
  78 +       };
  79 +
  80 +       hdmi_connector: connector {
  81 +               compatible = "hdmi-connector";
  82 +               type = "d";
  83 +
  84 +               port {
  85 +                       hdmi_connector_in: endpoint {
  86 +                               remote-endpoint = <&hdmi_out_connector>;
  87 +                       };
  88 +               };
  89 +       };
  90 +
  91         /*
  92          * This regulator is PWM-controlled, but the PWM controller is not
  93          * yet supported, so fix the regulator to its default voltage.
  94          */
  95         reg_vdd_cpu: vdd-cpu {
  96 -               compatible = "regulator-fixed";
  97 +               compatible = "pwm-regulator";
  98 +               pwms = <&pwm 0 50000 0>;
  99 +               pwm-supply = <&reg_vcc>;
 100                 regulator-name = "vdd-cpu";
 101 -               regulator-min-microvolt = <1100000>;
 102 -               regulator-max-microvolt = <1100000>;
 103 -               vin-supply = <&reg_vcc>;
 104 +               regulator-min-microvolt = <810000>;
 105 +               regulator-max-microvolt = <1160000>;
 106         };
 107
 108         wifi_pwrseq: wifi-pwrseq {
 109 @@ -40,14 +102,51 @@
 110         };
 111  };
 112
 113 +&codec {
 114 +       aux-devs = <&audio_amplifier>, <&audio_switch>;
 115 +       hp-det-gpio = <&pio 1 12 GPIO_ACTIVE_HIGH>; /* PB12/GPIO10 */
 116 +       pin-switches = "Internal Speakers";
 117 +       routing = "Internal Speakers", "Amplifier OUTL",
 118 +                 "Internal Speakers", "Amplifier OUTR",
 119 +                 "Amplifier INL", "Switch OUTL",
 120 +                 "Amplifier INR", "Switch OUTR",
 121 +                 "Headphone Jack", "Switch OUTL",
 122 +                 "Headphone Jack", "Switch OUTR",
 123 +                 "Switch INL", "HPOUTL",
 124 +                 "Switch INR", "HPOUTR",
 125 +                 "MICIN3", "Headset Microphone",
 126 +                 "Headset Microphone", "HBIAS";
 127 +       widgets = "Microphone", "Headset Microphone",
 128 +                 "Headphone", "Headphone Jack",
 129 +                 "Speaker", "Internal Speakers";
 130 +};
 131 +
 132  &cpu0 {
 133         cpu-supply = <&reg_vdd_cpu>;
 134  };
 135
 136 +&de {
 137 +       status = "okay";
 138 +};
 139 +
 140  &ehci1 {
 141         status = "okay";
 142  };
 143
 144 +&hdmi {
 145 +       status = "okay";
 146 +};
 147 +
 148 +&hdmi_out {
 149 +       hdmi_out_connector: endpoint {
 150 +               remote-endpoint = <&hdmi_connector_in>;
 151 +       };
 152 +};
 153 +
 154 +&hdmi_phy {
 155 +       status = "okay";
 156 +};
 157 +
 158  &i2c0 {
 159         pinctrl-0 = <&i2c0_pb10_pins>;
 160         pinctrl-names = "default";
 161 @@ -169,6 +268,12 @@
 162         };
 163  };
 164
 165 +&i2s1 {
 166 +       pinctrl-0 = <&i2s1_clk_pins>, <&i2s1_din_pin>, <&i2s1_dout_pin>;
 167 +       pinctrl-names = "default";
 168 +       status = "okay";
 169 +};
 170 +
 171  &mmc0 {
 172         broken-cd;
 173         bus-width = <4>;
 174 @@ -205,6 +310,27 @@
 175
 176  &pio {
 177         vcc-pg-supply = <&reg_ldoa>;
 178 +
 179 +       i2s1_clk_pins: i2s1-clk-pins {
 180 +               pins = "PG12", "PG13";
 181 +               function = "i2s1";
 182 +       };
 183 +
 184 +       i2s1_din_pin: i2s1-din-pin {
 185 +               pins = "PG14";
 186 +               function = "i2s1_din";
 187 +       };
 188 +
 189 +       i2s1_dout_pin: i2s1-dout-pin {
 190 +               pins = "PG15";
 191 +               function = "i2s1_dout";
 192 +       };
 193 +};
 194 +
 195 +&pwm {
 196 +       pinctrl-0 = <&pwm0_pd16_pin>, <&pwm4_pd20_pin>;
 197 +       pinctrl-names = "default";
 198 +       status = "okay";
 199  };
 200
 201  &uart0 {
 202 --- a/arch/riscv/dts/sun20i-d1-common-regulators.dtsi
 203 +++ b/arch/riscv/dts/sun20i-d1-common-regulators.dtsi
 204 @@ -18,6 +18,15 @@
 205         };
 206  };
 207
 208 +&codec {
 209 +       avcc-supply = <&reg_aldo>;
 210 +       hpvcc-supply = <&reg_hpldo>;
 211 +};
 212 +
 213 +&hdmi {
 214 +       hvcc-supply = <&reg_ldoa>;
 215 +};
 216 +
 217  &lradc {
 218         vref-supply = <&reg_aldo>;
 219  };
 220 @@ -49,3 +58,7 @@
 221         regulator-max-microvolt = <1800000>;
 222         ldo-in-supply = <&reg_vcc_3v3>;
 223  };
 224 +
 225 +&ths {
 226 +       vref-supply = <&reg_aldo>;
 227 +};
 228 --- a/arch/riscv/dts/sun20i-d1-devterm-v3.14.dts
 229 +++ b/arch/riscv/dts/sun20i-d1-devterm-v3.14.dts
 230 @@ -35,3 +35,19 @@
 231                 };
 232         };
 233  };
 234 +
 235 +&dsi {
 236 +       pinctrl-0 = <&dsi_4lane_pins>;
 237 +       pinctrl-names = "default";
 238 +       status = "okay";
 239 +
 240 +       panel@0 {
 241 +               compatible = "clockwork,cwd686";
 242 +               reg = <0>;
 243 +               backlight = <&backlight>;
 244 +               reset-gpios = <&pio 3 19 GPIO_ACTIVE_LOW>; /* PD19/GPIO8 */
 245 +               rotation = <90>;
 246 +               iovcc-supply = <&reg_dcdc3>;
 247 +               vci-supply = <&reg_aldo2>;
 248 +       };
 249 +};
 250 --- a/arch/riscv/dts/sun20i-d1-dongshan-nezha-stu.dts
 251 +++ b/arch/riscv/dts/sun20i-d1-dongshan-nezha-stu.dts
 252 @@ -23,6 +23,17 @@
 253                 stdout-path = "serial0:115200n8";
 254         };
 255
 256 +       hdmi_connector: connector {
 257 +               compatible = "hdmi-connector";
 258 +               type = "a";
 259 +
 260 +               port {
 261 +                       hdmi_connector_in: endpoint {
 262 +                               remote-endpoint = <&hdmi_out_connector>;
 263 +                       };
 264 +               };
 265 +       };
 266 +
 267         leds {
 268                 compatible = "gpio-leds";
 269
 270 @@ -43,16 +54,13 @@
 271                 vin-supply = <&reg_vcc>;
 272         };
 273
 274 -       /*
 275 -        * This regulator is PWM-controlled, but the PWM controller is not
 276 -        * yet supported, so fix the regulator to its default voltage.
 277 -        */
 278         reg_vdd_cpu: vdd-cpu {
 279 -               compatible = "regulator-fixed";
 280 +               compatible = "pwm-regulator";
 281 +               pwms = <&pwm 0 50000 0>;
 282 +               pwm-supply = <&reg_vcc>;
 283                 regulator-name = "vdd-cpu";
 284 -               regulator-min-microvolt = <1100000>;
 285 -               regulator-max-microvolt = <1100000>;
 286 -               vin-supply = <&reg_vcc>;
 287 +               regulator-min-microvolt = <810000>;
 288 +               regulator-max-microvolt = <1160000>;
 289         };
 290  };
 291
 292 @@ -60,6 +68,10 @@
 293         cpu-supply = <&reg_vdd_cpu>;
 294  };
 295
 296 +&de {
 297 +       status = "okay";
 298 +};
 299 +
 300  &ehci0 {
 301         status = "okay";
 302  };
 303 @@ -73,6 +85,20 @@
 304         status = "okay";
 305  };
 306
 307 +&hdmi {
 308 +       status = "okay";
 309 +};
 310 +
 311 +&hdmi_out {
 312 +       hdmi_out_connector: endpoint {
 313 +               remote-endpoint = <&hdmi_connector_in>;
 314 +       };
 315 +};
 316 +
 317 +&hdmi_phy {
 318 +       status = "okay";
 319 +};
 320 +
 321  &mdio {
 322         ext_rgmii_phy: ethernet-phy@1 {
 323                 compatible = "ethernet-phy-ieee802.3-c22";
 324 @@ -95,6 +121,12 @@
 325         status = "okay";
 326  };
 327
 328 +&pwm {
 329 +       pinctrl-0 = <&pwm0_pd16_pin>;
 330 +       pinctrl-names = "default";
 331 +       status = "okay";
 332 +};
 333 +
 334  &uart0 {
 335         pinctrl-0 = <&uart0_pb8_pins>;
 336         pinctrl-names = "default";
 337 --- a/arch/riscv/dts/sun20i-d1-lichee-rv-86-panel-480p.dts
 338 +++ b/arch/riscv/dts/sun20i-d1-lichee-rv-86-panel-480p.dts
 339 @@ -7,6 +7,40 @@
 340         model = "Sipeed Lichee RV 86 Panel (480p)";
 341         compatible = "sipeed,lichee-rv-86-panel-480p", "sipeed,lichee-rv",
 342                      "allwinner,sun20i-d1";
 343 +
 344 +       backlight: backlight {
 345 +               compatible = "pwm-backlight";
 346 +               power-supply = <&reg_vcc>;
 347 +               pwms = <&pwm 7 50000 0>;
 348 +       };
 349 +
 350 +       spi {
 351 +               compatible = "spi-gpio";
 352 +               cs-gpios = <&pio 4 14 GPIO_ACTIVE_LOW>; /* PE14 */
 353 +               mosi-gpios = <&pio 4 12 GPIO_ACTIVE_HIGH>; /* PE12 */
 354 +               sck-gpios = <&pio 4 15 GPIO_ACTIVE_HIGH>; /* PE15 */
 355 +               num-chipselects = <1>;
 356 +               #address-cells = <1>;
 357 +               #size-cells = <0>;
 358 +
 359 +               panel@0 {
 360 +                       compatible = "sitronix,st7701s";
 361 +                       reg = <0>;
 362 +                       backlight = <&backlight>;
 363 +                       reset-gpios = <&pio 6 13 GPIO_ACTIVE_LOW>; /* PG13 */
 364 +                       spi-3wire;
 365 +
 366 +                       port {
 367 +                               panel_in_tcon_lcd0: endpoint {
 368 +                                       remote-endpoint = <&tcon_lcd0_out_panel>;
 369 +                               };
 370 +                       };
 371 +               };
 372 +       };
 373 +};
 374 +
 375 +&de {
 376 +       status = "okay";
 377  };
 378
 379  &i2c2 {
 380 @@ -27,3 +61,20 @@
 381                 wakeup-source;
 382         };
 383  };
 384 +
 385 +&pwm {
 386 +       pinctrl-0 = <&pwm7_pd22_pin>;
 387 +       pinctrl-names = "default";
 388 +       status = "okay";
 389 +};
 390 +
 391 +&tcon_lcd0 {
 392 +       pinctrl-0 = <&lcd_rgb666_pins>;
 393 +       pinctrl-names = "default";
 394 +};
 395 +
 396 +&tcon_lcd0_out {
 397 +       tcon_lcd0_out_panel: endpoint {
 398 +               remote-endpoint = <&panel_in_tcon_lcd0>;
 399 +       };
 400 +};
 401 --- a/arch/riscv/dts/sun20i-d1-lichee-rv-86-panel.dtsi
 402 +++ b/arch/riscv/dts/sun20i-d1-lichee-rv-86-panel.dtsi
 403 @@ -9,6 +9,39 @@
 404                 ethernet1 = &xr829;
 405         };
 406
 407 +       audio_amplifier: audio-amplifier {
 408 +               compatible = "simple-audio-amplifier";
 409 +               enable-gpios = <&pio 1 10 GPIO_ACTIVE_HIGH>; /* PB10 */
 410 +               sound-name-prefix = "Amplifier";
 411 +       };
 412 +
 413 +       dmic_codec: dmic-codec {
 414 +               compatible = "dmic-codec";
 415 +               num-channels = <2>;
 416 +               #sound-dai-cells = <0>;
 417 +       };
 418 +
 419 +       dmic-sound {
 420 +               compatible = "simple-audio-card";
 421 +               simple-audio-card,name = "DMIC";
 422 +               #address-cells = <1>;
 423 +               #size-cells = <0>;
 424 +
 425 +               simple-audio-card,dai-link@0 {
 426 +                       format = "pdm";
 427 +                       frame-master = <&link0_cpu>;
 428 +                       bitclock-master = <&link0_cpu>;
 429 +
 430 +                       link0_cpu: cpu {
 431 +                               sound-dai = <&dmic>;
 432 +                       };
 433 +
 434 +                       link0_codec: codec {
 435 +                               sound-dai = <&dmic_codec>;
 436 +                       };
 437 +               };
 438 +       };
 439 +
 440         /* PC1 is repurposed as BT_WAKE_AP */
 441         /delete-node/ leds;
 442
 443 @@ -24,6 +57,27 @@
 444         };
 445  };
 446
 447 +&codec {
 448 +       aux-devs = <&audio_amplifier>;
 449 +       routing = "Internal Speaker", "Amplifier OUTL",
 450 +                 "Internal Speaker", "Amplifier OUTR",
 451 +                 "Amplifier INL", "HPOUTL",
 452 +                 "Amplifier INR", "HPOUTR",
 453 +                 "LINEINL", "HPOUTL",
 454 +                 "LINEINR", "HPOUTR",
 455 +                 "MICIN3", "Internal Microphone",
 456 +                 "Internal Microphone", "HBIAS";
 457 +       widgets = "Microphone", "Internal Microphone",
 458 +                 "Speaker", "Internal Speaker";
 459 +       status = "okay";
 460 +};
 461 +
 462 +&dmic {
 463 +       pinctrl-0 = <&dmic_pb11_d0_pin>, <&dmic_pe17_clk_pin>;
 464 +       pinctrl-names = "default";
 465 +       status = "okay";
 466 +};
 467 +
 468  &ehci1 {
 469         status = "okay";
 470  };
 471 @@ -69,6 +123,16 @@
 472                 pins = "PG11";
 473                 function = "clk";
 474         };
 475 +
 476 +       dmic_pb11_d0_pin: dmic-pb11-d0-pin {
 477 +               pins = "PB11";
 478 +               function = "dmic";
 479 +       };
 480 +
 481 +       dmic_pe17_clk_pin: dmic-pe17-clk-pin {
 482 +               pins = "PE17";
 483 +               function = "dmic";
 484 +       };
 485  };
 486
 487  &uart1 {
 488 --- a/arch/riscv/dts/sun20i-d1-lichee-rv-dock.dts
 489 +++ b/arch/riscv/dts/sun20i-d1-lichee-rv-dock.dts
 490 @@ -15,16 +15,102 @@
 491                 ethernet1 = &rtl8723ds;
 492         };
 493
 494 +       dmic_codec: dmic-codec {
 495 +               compatible = "dmic-codec";
 496 +               num-channels = <2>;
 497 +               #sound-dai-cells = <0>;
 498 +       };
 499 +
 500 +       dmic-sound {
 501 +               compatible = "simple-audio-card";
 502 +               simple-audio-card,name = "DMIC";
 503 +               #address-cells = <1>;
 504 +               #size-cells = <0>;
 505 +
 506 +               simple-audio-card,dai-link@0 {
 507 +                       format = "pdm";
 508 +                       frame-master = <&link0_cpu>;
 509 +                       bitclock-master = <&link0_cpu>;
 510 +
 511 +                       link0_cpu: cpu {
 512 +                               sound-dai = <&dmic>;
 513 +                       };
 514 +
 515 +                       link0_codec: codec {
 516 +                               sound-dai = <&dmic_codec>;
 517 +                       };
 518 +               };
 519 +       };
 520 +
 521 +       hdmi_connector: connector {
 522 +               compatible = "hdmi-connector";
 523 +               type = "a";
 524 +
 525 +               port {
 526 +                       hdmi_connector_in: endpoint {
 527 +                               remote-endpoint = <&hdmi_out_connector>;
 528 +                       };
 529 +               };
 530 +       };
 531 +
 532         wifi_pwrseq: wifi-pwrseq {
 533                 compatible = "mmc-pwrseq-simple";
 534                 reset-gpios = <&pio 6 12 GPIO_ACTIVE_LOW>; /* PG12 */
 535         };
 536  };
 537
 538 +&codec {
 539 +       routing = "Internal Speaker", "HPOUTL",
 540 +                 "Internal Speaker", "HPOUTR",
 541 +                 "LINEINL", "HPOUTL",
 542 +                 "LINEINR", "HPOUTR",
 543 +                 "MICIN3", "Internal Microphone",
 544 +                 "Internal Microphone", "HBIAS";
 545 +       widgets = "Microphone", "Internal Microphone",
 546 +                 "Speaker", "Internal Speaker";
 547 +       status = "okay";
 548 +};
 549 +
 550 +&de {
 551 +       status = "okay";
 552 +};
 553 +
 554 +&dmic {
 555 +       pinctrl-0 = <&dmic_pb11_d0_pin>, <&dmic_pe17_clk_pin>;
 556 +       pinctrl-names = "default";
 557 +       status = "okay";
 558 +};
 559 +
 560  &ehci1 {
 561         status = "okay";
 562  };
 563
 564 +&hdmi {
 565 +       status = "okay";
 566 +};
 567 +
 568 +&hdmi_out {
 569 +       hdmi_out_connector: endpoint {
 570 +               remote-endpoint = <&hdmi_connector_in>;
 571 +       };
 572 +};
 573 +
 574 +&hdmi_phy {
 575 +       status = "okay";
 576 +};
 577 +
 578 +&ledc {
 579 +       pinctrl-0 = <&ledc_pc0_pin>;
 580 +       pinctrl-names = "default";
 581 +       status = "okay";
 582 +
 583 +       multi-led@0 {
 584 +               reg = <0x0>;
 585 +               color = <LED_COLOR_ID_RGB>;
 586 +               function = LED_FUNCTION_STATUS;
 587 +       };
 588 +};
 589 +
 590  &lradc {
 591         status = "okay";
 592
 593 @@ -55,6 +141,18 @@
 594         status = "okay";
 595  };
 596
 597 +&pio {
 598 +       dmic_pb11_d0_pin: dmic-pb11-d0-pin {
 599 +               pins = "PB11";
 600 +               function = "dmic";
 601 +       };
 602 +
 603 +       dmic_pe17_clk_pin: dmic-pe17-clk-pin {
 604 +               pins = "PE17";
 605 +               function = "dmic";
 606 +       };
 607 +};
 608 +
 609  &uart1 {
 610         uart-has-rtscts;
 611         pinctrl-0 = <&uart1_pg6_pins>, <&uart1_pg8_rts_cts_pins>;
 612 --- a/arch/riscv/dts/sun20i-d1-lichee-rv.dts
 613 +++ b/arch/riscv/dts/sun20i-d1-lichee-rv.dts
 614 @@ -65,6 +65,12 @@
 615         status = "okay";
 616  };
 617
 618 +&spi0 {
 619 +       pinctrl-0 = <&spi0_pins>;
 620 +       pinctrl-names = "default";
 621 +       status = "okay";
 622 +};
 623 +
 624  &uart0 {
 625         pinctrl-0 = <&uart0_pb8_pins>;
 626         pinctrl-names = "default";
 627 --- a/arch/riscv/dts/sun20i-d1-mangopi-mq-pro.dts
 628 +++ b/arch/riscv/dts/sun20i-d1-mangopi-mq-pro.dts
 629 @@ -4,6 +4,7 @@
 630  /dts-v1/;
 631
 632  #include <dt-bindings/gpio/gpio.h>
 633 +#include <dt-bindings/leds/common.h>
 634
 635  #include "sun20i-d1.dtsi"
 636  #include "sun20i-d1-common-regulators.dtsi"
 637 @@ -22,6 +23,28 @@
 638                 stdout-path = "serial0:115200n8";
 639         };
 640
 641 +       hdmi_connector: connector {
 642 +               compatible = "hdmi-connector";
 643 +               type = "c";
 644 +
 645 +               port {
 646 +                       hdmi_connector_in: endpoint {
 647 +                               remote-endpoint = <&hdmi_out_connector>;
 648 +                       };
 649 +               };
 650 +       };
 651 +
 652 +       leds {
 653 +               compatible = "pwm-leds";
 654 +
 655 +               led {
 656 +                       color = <LED_COLOR_ID_BLUE>;
 657 +                       function = LED_FUNCTION_STATUS;
 658 +                       max-brightness = <255>;
 659 +                       pwms = <&pwm 2 50000 0>;
 660 +               };
 661 +       };
 662 +
 663         reg_avdd2v8: avdd2v8 {
 664                 compatible = "regulator-fixed";
 665                 regulator-name = "avdd2v8";
 666 @@ -56,10 +79,28 @@
 667         cpu-supply = <&reg_vdd_cpu>;
 668  };
 669
 670 +&de {
 671 +       status = "okay";
 672 +};
 673 +
 674  &ehci1 {
 675         status = "okay";
 676  };
 677
 678 +&hdmi {
 679 +       status = "okay";
 680 +};
 681 +
 682 +&hdmi_out {
 683 +       hdmi_out_connector: endpoint {
 684 +               remote-endpoint = <&hdmi_connector_in>;
 685 +       };
 686 +};
 687 +
 688 +&hdmi_phy {
 689 +       status = "okay";
 690 +};
 691 +
 692  &mmc0 {
 693         bus-width = <4>;
 694         cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */
 695 --- a/arch/riscv/dts/sun20i-d1-nezha.dts
 696 +++ b/arch/riscv/dts/sun20i-d1-nezha.dts
 697 @@ -5,6 +5,7 @@
 698
 699  #include <dt-bindings/gpio/gpio.h>
 700  #include <dt-bindings/input/input.h>
 701 +#include <dt-bindings/leds/common.h>
 702
 703  #include "sun20i-d1.dtsi"
 704  #include "sun20i-d1-common-regulators.dtsi"
 705 @@ -18,12 +19,24 @@
 706                 ethernet1 = &xr829;
 707                 mmc0 = &mmc0;
 708                 serial0 = &uart0;
 709 +               spi0 = &spi0;
 710         };
 711
 712         chosen {
 713                 stdout-path = "serial0:115200n8";
 714         };
 715
 716 +       hdmi_connector: connector {
 717 +               compatible = "hdmi-connector";
 718 +               type = "a";
 719 +
 720 +               port {
 721 +                       hdmi_connector_in: endpoint {
 722 +                               remote-endpoint = <&hdmi_out_connector>;
 723 +                       };
 724 +               };
 725 +       };
 726 +
 727         reg_usbvbus: usbvbus {
 728                 compatible = "regulator-fixed";
 729                 regulator-name = "usbvbus";
 730 @@ -34,16 +47,13 @@
 731                 vin-supply = <&reg_vcc>;
 732         };
 733
 734 -       /*
 735 -        * This regulator is PWM-controlled, but the PWM controller is not
 736 -        * yet supported, so fix the regulator to its default voltage.
 737 -        */
 738         reg_vdd_cpu: vdd-cpu {
 739 -               compatible = "regulator-fixed";
 740 +               compatible = "pwm-regulator";
 741 +               pwms = <&pwm 0 50000 0>;
 742 +               pwm-supply = <&reg_vcc>;
 743                 regulator-name = "vdd-cpu";
 744 -               regulator-min-microvolt = <1100000>;
 745 -               regulator-max-microvolt = <1100000>;
 746 -               vin-supply = <&reg_vcc>;
 747 +               regulator-min-microvolt = <810000>;
 748 +               regulator-max-microvolt = <1160000>;
 749         };
 750
 751         wifi_pwrseq: wifi-pwrseq {
 752 @@ -52,10 +62,26 @@
 753         };
 754  };
 755
 756 +&codec {
 757 +       routing = "Headphone Jack", "HPOUTL",
 758 +                 "Headphone Jack", "HPOUTR",
 759 +                 "LINEINL", "HPOUTL",
 760 +                 "LINEINR", "HPOUTR",
 761 +                 "MICIN3", "Headset Microphone",
 762 +                 "Headset Microphone", "HBIAS";
 763 +       widgets = "Microphone", "Headset Microphone",
 764 +                 "Headphone", "Headphone Jack";
 765 +       status = "okay";
 766 +};
 767 +
 768  &cpu0 {
 769         cpu-supply = <&reg_vdd_cpu>;
 770  };
 771
 772 +&de {
 773 +       status = "okay";
 774 +};
 775 +
 776  &ehci0 {
 777         status = "okay";
 778  };
 779 @@ -73,6 +99,20 @@
 780         status = "okay";
 781  };
 782
 783 +&hdmi {
 784 +       status = "okay";
 785 +};
 786 +
 787 +&hdmi_out {
 788 +       hdmi_out_connector: endpoint {
 789 +               remote-endpoint = <&hdmi_connector_in>;
 790 +       };
 791 +};
 792 +
 793 +&hdmi_phy {
 794 +       status = "okay";
 795 +};
 796 +
 797  &i2c2 {
 798         pinctrl-0 = <&i2c2_pb0_pins>;
 799         pinctrl-names = "default";
 800 @@ -90,6 +130,18 @@
 801         };
 802  };
 803
 804 +&ledc {
 805 +       pinctrl-0 = <&ledc_pc0_pin>;
 806 +       pinctrl-names = "default";
 807 +       status = "okay";
 808 +
 809 +       multi-led@0 {
 810 +               reg = <0x0>;
 811 +               color = <LED_COLOR_ID_RGB>;
 812 +               function = LED_FUNCTION_STATUS;
 813 +       };
 814 +};
 815 +
 816  &lradc {
 817         status = "okay";
 818
 819 @@ -142,6 +194,55 @@
 820         status = "okay";
 821  };
 822
 823 +&pwm {
 824 +       pinctrl-0 = <&pwm0_pd16_pin>;
 825 +       pinctrl-names = "default";
 826 +       status = "okay";
 827 +};
 828 +
 829 +&spi0 {
 830 +       pinctrl-0 = <&spi0_pins>;
 831 +       pinctrl-names = "default";
 832 +       status = "okay";
 833 +
 834 +       flash@0 {
 835 +               compatible = "spi-nand";
 836 +               reg = <0>;
 837 +
 838 +               partitions {
 839 +                       compatible = "fixed-partitions";
 840 +                       #address-cells = <1>;
 841 +                       #size-cells = <1>;
 842 +
 843 +                       partition@0 {
 844 +                               label = "boot0";
 845 +                               reg = <0x00000000 0x00100000>;
 846 +                       };
 847 +
 848 +                       partition@100000 {
 849 +                               label = "uboot";
 850 +                               reg = <0x00100000 0x00300000>;
 851 +                       };
 852 +
 853 +                       partition@400000 {
 854 +                               label = "secure_storage";
 855 +                               reg = <0x00400000 0x00100000>;
 856 +                       };
 857 +
 858 +                       partition@500000 {
 859 +                               label = "sys";
 860 +                               reg = <0x00500000 0x0fb00000>;
 861 +                       };
 862 +               };
 863 +       };
 864 +};
 865 +
 866 +&spi1 {
 867 +       pinctrl-0 = <&spi1_pd_pins>;
 868 +       pinctrl-names = "default";
 869 +       status = "okay";
 870 +};
 871 +
 872  &uart0 {
 873         pinctrl-0 = <&uart0_pb8_pins>;
 874         pinctrl-names = "default";
 875 --- a/arch/riscv/dts/sun20i-d1.dtsi
 876 +++ b/arch/riscv/dts/sun20i-d1.dtsi
 877 @@ -59,6 +59,35 @@
 878                 #clock-cells = <0>;
 879         };
 880
 881 +       thermal-zones {
 882 +               cpu-thermal {
 883 +                       polling-delay = <0>;
 884 +                       polling-delay-passive = <0>;
 885 +                       thermal-sensors = <&ths>;
 886 +
 887 +                       trips {
 888 +                               cpu_target: cpu-target {
 889 +                                       hysteresis = <3000>;
 890 +                                       temperature = <85000>;
 891 +                                       type = "passive";
 892 +                               };
 893 +
 894 +                               cpu-crit {
 895 +                                       hysteresis = <0>;
 896 +                                       temperature = <110000>;
 897 +                                       type = "critical";
 898 +                               };
 899 +                       };
 900 +
 901 +                       cooling-maps {
 902 +                               map0 {
 903 +                                       trip = <&cpu_target>;
 904 +                                       cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
 905 +                               };
 906 +                       };
 907 +               };
 908 +       };
 909 +
 910         soc {
 911                 compatible = "simple-bus";
 912                 ranges;
 913 @@ -95,6 +124,14 @@
 914                         #interrupt-cells = <3>;
 915
 916                         /omit-if-no-ref/
 917 +                       dsi_4lane_pins: dsi-4lane-pins {
 918 +                               pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5",
 919 +                                      "PD6", "PD7", "PD8", "PD9";
 920 +                               drive-strength = <30>;
 921 +                               function = "dsi";
 922 +                       };
 923 +
 924 +                       /omit-if-no-ref/
 925                         i2c0_pb10_pins: i2c0-pb10-pins {
 926                                 pins = "PB10", "PB11";
 927                                 function = "i2c0";
 928 @@ -116,6 +153,12 @@
 929                         };
 930
 931                         /omit-if-no-ref/
 932 +                       ledc_pc0_pin: ledc-pc0-pin {
 933 +                               pins = "PC0";
 934 +                               function = "ledc";
 935 +                       };
 936 +
 937 +                       /omit-if-no-ref/
 938                         mmc0_pins: mmc0-pins {
 939                                 pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5";
 940                                 function = "mmc0";
 941 @@ -149,6 +192,48 @@
 942                         };
 943
 944                         /omit-if-no-ref/
 945 +                       pwm0_pd16_pin: pwm0-pd16-pin {
 946 +                               pins = "PD16";
 947 +                               function = "pwm0";
 948 +                       };
 949 +
 950 +                       /omit-if-no-ref/
 951 +                       pwm2_pd18_pin: pwm2-pd18-pin {
 952 +                               pins = "PD18";
 953 +                               function = "pwm2";
 954 +                       };
 955 +
 956 +                       /omit-if-no-ref/
 957 +                       pwm4_pd20_pin: pwm4-pd20-pin {
 958 +                               pins = "PD20";
 959 +                               function = "pwm4";
 960 +                       };
 961 +
 962 +                       /omit-if-no-ref/
 963 +                       pwm7_pd22_pin: pwm7-pd22-pin {
 964 +                               pins = "PD22";
 965 +                               function = "pwm7";
 966 +                       };
 967 +
 968 +                       /omit-if-no-ref/
 969 +                       spi0_pins: spi0-pins {
 970 +                               pins = "PC2", "PC3", "PC4", "PC5", "PC6", "PC7";
 971 +                               function = "spi0";
 972 +                       };
 973 +
 974 +                       /omit-if-no-ref/
 975 +                       spi1_pb_pins: spi1-pb-pins {
 976 +                               pins = "PB0", "PB8", "PB9", "PB10", "PB11", "PB12";
 977 +                               function = "spi1";
 978 +                       };
 979 +
 980 +                       /omit-if-no-ref/
 981 +                       spi1_pd_pins: spi1-pd-pins {
 982 +                               pins = "PD10", "PD11", "PD12", "PD13", "PD14", "PD15";
 983 +                               function = "spi1";
 984 +                       };
 985 +
 986 +                       /omit-if-no-ref/
 987                         uart0_pb8_pins: uart0-pb8-pins {
 988                                 pins = "PB8", "PB9";
 989                                 function = "uart0";
 990 @@ -167,6 +252,17 @@
 991                         };
 992                 };
 993
 994 +               pwm: pwm@2000c00 {
 995 +                       compatible = "allwinner,sun20i-d1-pwm";
 996 +                       reg = <0x2000c00 0x400>;
 997 +                       interrupts = <34 IRQ_TYPE_LEVEL_HIGH>;
 998 +                       clocks = <&ccu CLK_BUS_PWM>, <&osc24M>;
 999 +                       clock-names = "bus", "mod";
1000 +                       resets = <&ccu RST_BUS_PWM>;
1001 +                       status = "disabled";
1002 +                       #pwm-cells = <3>;
1003 +               };
1004 +
1005                 ccu: clock-controller@2001000 {
1006                         compatible = "allwinner,sun20i-d1-ccu";
1007                         reg = <0x2001000 0x1000>;
1008 @@ -178,6 +274,33 @@
1009                         #reset-cells = <1>;
1010                 };
1011
1012 +               ledc: led-controller@2008000 {
1013 +                       compatible = "allwinner,sun20i-d1-ledc",
1014 +                                    "allwinner,sun50i-a100-ledc";
1015 +                       reg = <0x2008000 0x400>;
1016 +                       interrupts = <36 IRQ_TYPE_LEVEL_HIGH>;
1017 +                       clocks = <&ccu CLK_BUS_LEDC>, <&ccu CLK_LEDC>;
1018 +                       clock-names = "bus", "mod";
1019 +                       resets = <&ccu RST_BUS_LEDC>;
1020 +                       dmas = <&dma 42>;
1021 +                       dma-names = "tx";
1022 +                       status = "disabled";
1023 +                       #address-cells = <1>;
1024 +                       #size-cells = <0>;
1025 +               };
1026 +
1027 +               ths: temperature-sensor@2009400 {
1028 +                       compatible = "allwinner,sun20i-d1-ths";
1029 +                       reg = <0x2009400 0x400>;
1030 +                       interrupts = <74 IRQ_TYPE_LEVEL_HIGH>;
1031 +                       clocks = <&ccu CLK_BUS_THS>, <&osc24M>;
1032 +                       clock-names = "bus", "mod";
1033 +                       resets = <&ccu RST_BUS_THS>;
1034 +                       nvmem-cells = <&ths_calib>;
1035 +                       nvmem-cell-names = "calibration";
1036 +                       #thermal-sensor-cells = <0>;
1037 +               };
1038 +
1039                 lradc: keys@2009800 {
1040                         compatible = "allwinner,sun20i-d1-lradc",
1041                                      "allwinner,sun50i-r329-lradc";
1042 @@ -188,11 +311,30 @@
1043                         status = "disabled";
1044                 };
1045
1046 +               iommu: iommu@2010000 {
1047 +                       compatible = "allwinner,sun20i-d1-iommu";
1048 +                       reg = <0x2010000 0x10000>;
1049 +                       interrupts = <80 IRQ_TYPE_LEVEL_HIGH>;
1050 +                       clocks = <&ccu CLK_BUS_IOMMU>;
1051 +                       #iommu-cells = <1>;
1052 +               };
1053 +
1054                 codec: audio-codec@2030000 {
1055 -                       compatible = "simple-mfd", "syscon";
1056 +                       compatible = "allwinner,sun20i-d1-codec", "simple-mfd", "syscon";
1057                         reg = <0x2030000 0x1000>;
1058 +                       interrupts = <41 IRQ_TYPE_LEVEL_HIGH>;
1059 +                       clocks = <&ccu CLK_BUS_AUDIO>,
1060 +                                <&ccu CLK_AUDIO_ADC>,
1061 +                                <&ccu CLK_AUDIO_DAC>,
1062 +                                <&osc24M>,
1063 +                                <&rtc CLK_OSC32K>;
1064 +                       clock-names = "bus", "adc", "dac", "hosc", "losc";
1065 +                       resets = <&ccu RST_BUS_AUDIO>;
1066 +                       dmas = <&dma 7>, <&dma 7>;
1067 +                       dma-names = "rx", "tx";
1068                         #address-cells = <1>;
1069                         #size-cells = <1>;
1070 +                       #sound-dai-cells = <0>;
1071
1072                         regulators@2030348 {
1073                                 compatible = "allwinner,sun20i-d1-analog-ldos";
1074 @@ -208,6 +350,21 @@
1075                         };
1076                 };
1077
1078 +               dmic: dmic@2031000 {
1079 +                       compatible = "allwinner,sun20i-d1-dmic",
1080 +                                    "allwinner,sun50i-h6-dmic";
1081 +                       reg = <0x2031000 0x400>;
1082 +                       interrupts = <40 IRQ_TYPE_LEVEL_HIGH>;
1083 +                       clocks = <&ccu CLK_BUS_DMIC>,
1084 +                                <&ccu CLK_DMIC>;
1085 +                       clock-names = "bus", "mod";
1086 +                       resets = <&ccu RST_BUS_DMIC>;
1087 +                       dmas = <&dma 8>;
1088 +                       dma-names = "rx";
1089 +                       status = "disabled";
1090 +                       #sound-dai-cells = <0>;
1091 +               };
1092 +
1093                 i2s0: i2s@2032000 {
1094                         compatible = "allwinner,sun20i-d1-i2s",
1095                                      "allwinner,sun50i-r329-i2s";
1096 @@ -238,6 +395,7 @@
1097                         #sound-dai-cells = <0>;
1098                 };
1099
1100 +               // TODO: how to integrate ASRC? same or separate node?
1101                 i2s2: i2s@2034000 {
1102                         compatible = "allwinner,sun20i-d1-i2s",
1103                                      "allwinner,sun50i-r329-i2s";
1104 @@ -253,6 +411,22 @@
1105                         #sound-dai-cells = <0>;
1106                 };
1107
1108 +               // TODO: add receive functionality
1109 +               spdif: spdif@2036000 {
1110 +                       compatible = "allwinner,sun20i-d1-spdif";
1111 +                       reg = <0x2036000 0x400>;
1112 +                       interrupts = <39 IRQ_TYPE_LEVEL_HIGH>;
1113 +                       clocks = <&ccu CLK_BUS_SPDIF>,
1114 +                                <&ccu CLK_SPDIF_RX>,
1115 +                                <&ccu CLK_SPDIF_TX>;
1116 +                       clock-names = "apb", "rx", "tx";
1117 +                       resets = <&ccu RST_BUS_SPDIF>;
1118 +                       dmas = <&dma 2>, <&dma 2>;
1119 +                       dma-names = "rx", "tx";
1120 +                       status = "disabled";
1121 +                       #sound-dai-cells = <0>;
1122 +               };
1123 +
1124                 timer: timer@2050000 {
1125                         compatible = "allwinner,sun20i-d1-timer",
1126                                      "allwinner,sun8i-a23-timer";
1127 @@ -457,6 +631,18 @@
1128                         };
1129                 };
1130
1131 +               crypto: crypto@3040000 {
1132 +                       compatible = "allwinner,sun20i-d1-crypto";
1133 +                       reg = <0x3040000 0x800>;
1134 +                       interrupts = <68 IRQ_TYPE_LEVEL_HIGH>;
1135 +                       clocks = <&ccu CLK_BUS_CE>,
1136 +                                <&ccu CLK_CE>,
1137 +                                <&ccu CLK_MBUS_CE>,
1138 +                                <&rtc CLK_IOSC>;
1139 +                       clock-names = "bus", "mod", "ram", "trng";
1140 +                       resets = <&ccu RST_BUS_CE>;
1141 +               };
1142 +
1143                 mbus: dram-controller@3102000 {
1144                         compatible = "allwinner,sun20i-d1-mbus";
1145                         reg = <0x3102000 0x1000>,
1146 @@ -525,6 +711,39 @@
1147                         #size-cells = <0>;
1148                 };
1149
1150 +               spi0: spi@4025000 {
1151 +                       compatible = "allwinner,sun20i-d1-spi",
1152 +                                    "allwinner,sun50i-r329-spi";
1153 +                       reg = <0x4025000 0x1000>;
1154 +                       interrupts = <31 IRQ_TYPE_LEVEL_HIGH>;
1155 +                       clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
1156 +                       clock-names = "ahb", "mod";
1157 +                       resets = <&ccu RST_BUS_SPI0>;
1158 +                       dmas = <&dma 22>, <&dma 22>;
1159 +                       dma-names = "rx", "tx";
1160 +                       num-cs = <1>;
1161 +                       status = "disabled";
1162 +                       #address-cells = <1>;
1163 +                       #size-cells = <0>;
1164 +               };
1165 +
1166 +               spi1: spi@4026000 {
1167 +                       compatible = "allwinner,sun20i-d1-spi-dbi",
1168 +                                    "allwinner,sun50i-r329-spi-dbi",
1169 +                                    "allwinner,sun50i-r329-spi";
1170 +                       reg = <0x4026000 0x1000>;
1171 +                       interrupts = <32 IRQ_TYPE_LEVEL_HIGH>;
1172 +                       clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>;
1173 +                       clock-names = "ahb", "mod";
1174 +                       resets = <&ccu RST_BUS_SPI1>;
1175 +                       dmas = <&dma 23>, <&dma 23>;
1176 +                       dma-names = "rx", "tx";
1177 +                       num-cs = <1>;
1178 +                       status = "disabled";
1179 +                       #address-cells = <1>;
1180 +                       #size-cells = <0>;
1181 +               };
1182 +
1183                 usb_otg: usb@4100000 {
1184                         compatible = "allwinner,sun20i-d1-musb",
1185                                      "allwinner,sun8i-a33-musb";
1186 @@ -653,6 +872,7 @@
1187                                  <&display_clocks CLK_MIXER0>;
1188                         clock-names = "bus", "mod";
1189                         resets = <&display_clocks RST_MIXER0>;
1190 +                       iommus = <&iommu 2>;
1191
1192                         ports {
1193                                 #address-cells = <1>;
1194 @@ -675,6 +895,7 @@
1195                                  <&display_clocks CLK_MIXER1>;
1196                         clock-names = "bus", "mod";
1197                         resets = <&display_clocks RST_MIXER1>;
1198 +                       iommus = <&iommu 2>;
1199
1200                         ports {
1201                                 #address-cells = <1>;
1202 @@ -690,6 +911,40 @@
1203                         };
1204                 };
1205
1206 +               dsi: dsi@5450000 {
1207 +                       compatible = "allwinner,sun20i-d1-mipi-dsi",
1208 +                                    "allwinner,sun50i-a100-mipi-dsi";
1209 +                       reg = <0x5450000 0x1000>;
1210 +                       interrupts = <108 IRQ_TYPE_LEVEL_HIGH>;
1211 +                       clocks = <&ccu CLK_BUS_MIPI_DSI>,
1212 +                                <&tcon_top CLK_TCON_TOP_DSI>;
1213 +                       clock-names = "bus", "mod";
1214 +                       resets = <&ccu RST_BUS_MIPI_DSI>;
1215 +                       phys = <&dphy>;
1216 +                       phy-names = "dphy";
1217 +                       status = "disabled";
1218 +                       #address-cells = <1>;
1219 +                       #size-cells = <0>;
1220 +
1221 +                       port {
1222 +                               dsi_in_tcon_lcd0: endpoint {
1223 +                                       remote-endpoint = <&tcon_lcd0_out_dsi>;
1224 +                               };
1225 +                       };
1226 +               };
1227 +
1228 +               dphy: phy@5451000 {
1229 +                       compatible = "allwinner,sun20i-d1-mipi-dphy",
1230 +                                    "allwinner,sun50i-a100-mipi-dphy";
1231 +                       reg = <0x5451000 0x1000>;
1232 +                       interrupts = <108 IRQ_TYPE_LEVEL_HIGH>;
1233 +                       clocks = <&ccu CLK_BUS_MIPI_DSI>,
1234 +                                <&ccu CLK_MIPI_DSI>;
1235 +                       clock-names = "bus", "mod";
1236 +                       resets = <&ccu RST_BUS_MIPI_DSI>;
1237 +                       #phy-cells = <0>;
1238 +               };
1239 +
1240                 tcon_top: tcon-top@5460000 {
1241                         compatible = "allwinner,sun20i-d1-tcon-top";
1242                         reg = <0x5460000 0x1000>;
1243 @@ -770,6 +1025,10 @@
1244
1245                                 tcon_top_hdmi_out: port@5 {
1246                                         reg = <5>;
1247 +
1248 +                                       tcon_top_hdmi_out_hdmi: endpoint {
1249 +                                               remote-endpoint = <&hdmi_in_tcon_top>;
1250 +                                       };
1251                                 };
1252                         };
1253                 };
1254 @@ -785,6 +1044,8 @@
1255                         resets = <&ccu RST_BUS_TCON_LCD0>,
1256                                  <&ccu RST_BUS_LVDS0>;
1257                         reset-names = "lcd", "lvds";
1258 +                       phys = <&dphy>;
1259 +                       phy-names = "lvds0";
1260                         #clock-cells = <0>;
1261
1262                         ports {
1263 @@ -809,6 +1070,13 @@
1264
1265                                 tcon_lcd0_out: port@1 {
1266                                         reg = <1>;
1267 +                                       #address-cells = <1>;
1268 +                                       #size-cells = <0>;
1269 +
1270 +                                       tcon_lcd0_out_dsi: endpoint@1 {
1271 +                                               reg = <1>;
1272 +                                               remote-endpoint = <&dsi_in_tcon_lcd0>;
1273 +                                       };
1274                                 };
1275                         };
1276                 };
1277 @@ -853,6 +1121,50 @@
1278                         };
1279                 };
1280
1281 +               hdmi: hdmi@5500000 {
1282 +                       compatible = "allwinner,sun20i-d1-dw-hdmi";
1283 +                       reg = <0x5500000 0x10000>;
1284 +                       reg-io-width = <1>;
1285 +                       interrupts = <109 IRQ_TYPE_LEVEL_HIGH>;
1286 +                       clocks = <&ccu CLK_BUS_HDMI>,
1287 +                                <&ccu CLK_HDMI_24M>,
1288 +                                <&ccu CLK_HDMI_CEC>;
1289 +                       clock-names = "iahb", "isfr", "cec";
1290 +                       resets = <&ccu RST_BUS_HDMI_SUB>;
1291 +                       reset-names = "ctrl";
1292 +                       phys = <&hdmi_phy>;
1293 +                       phy-names = "phy";
1294 +                       status = "disabled";
1295 +
1296 +                       ports {
1297 +                               #address-cells = <1>;
1298 +                               #size-cells = <0>;
1299 +
1300 +                               port@0 {
1301 +                                       reg = <0>;
1302 +
1303 +                                       hdmi_in_tcon_top: endpoint {
1304 +                                               remote-endpoint = <&tcon_top_hdmi_out_hdmi>;
1305 +                                       };
1306 +                               };
1307 +
1308 +                               hdmi_out: port@1 {
1309 +                                       reg = <1>;
1310 +                               };
1311 +                       };
1312 +               };
1313 +
1314 +               hdmi_phy: phy@5510000 {
1315 +                       compatible = "allwinner,sun20i-d1-hdmi-phy";
1316 +                       reg = <0x5510000 0x10000>;
1317 +                       clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_24M>;
1318 +                       clock-names = "bus", "mod";
1319 +                       resets = <&ccu RST_BUS_HDMI_MAIN>;
1320 +                       reset-names = "phy";
1321 +                       status = "disabled";
1322 +                       #phy-cells = <0>;
1323 +               };
1324 +
1325                 riscv_wdt: watchdog@6011000 {
1326                         compatible = "allwinner,sun20i-d1-wdt";
1327                         reg = <0x6011000 0x20>;