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bcm27xx: update 6.1 patches to latest version
[openwrt/staging/svanheule.git] / target / linux / bcm27xx / patches-6.1 / 950-0972-drm-vc4-txp-Add-a-new-TXP-encoder-type.patch
1 From 68a00ca7b1d7809ac7be736c02238c142e629127 Mon Sep 17 00:00:00 2001
2 From: Maxime Ripard <maxime@cerno.tech>
3 Date: Thu, 27 Apr 2023 11:49:28 +0200
4 Subject: [PATCH] drm/vc4: txp: Add a new TXP encoder type
5
6 Starting with BCM2712, we'll have a two TXP. Let's follow the HDMI
7 example and add two encoder types for TXP: TXP0 and TXP1.
8
9 Signed-off-by: Maxime Ripard <maxime@cerno.tech>
10 ---
11 drivers/gpu/drm/vc4/tests/vc4_mock.c | 4 +-
12 .../gpu/drm/vc4/tests/vc4_test_pv_muxing.c | 106 +++++++++---------
13 drivers/gpu/drm/vc4/vc4_drv.h | 3 +-
14 drivers/gpu/drm/vc4/vc4_kms.c | 2 +-
15 drivers/gpu/drm/vc4/vc4_txp.c | 2 +-
16 5 files changed, 59 insertions(+), 58 deletions(-)
17
18 --- a/drivers/gpu/drm/vc4/tests/vc4_mock.c
19 +++ b/drivers/gpu/drm/vc4/tests/vc4_mock.c
20 @@ -52,7 +52,7 @@ struct vc4_mock_desc {
21 static const struct vc4_mock_desc vc4_mock =
22 VC4_MOCK_DESC(
23 VC4_MOCK_CRTC_DESC(&bcm2835_txp_data.base,
24 - VC4_MOCK_OUTPUT_DESC(VC4_ENCODER_TYPE_TXP,
25 + VC4_MOCK_OUTPUT_DESC(VC4_ENCODER_TYPE_TXP0,
26 DRM_MODE_ENCODER_VIRTUAL,
27 DRM_MODE_CONNECTOR_WRITEBACK)),
28 VC4_MOCK_PIXELVALVE_DESC(&bcm2835_pv0_data,
29 @@ -78,7 +78,7 @@ static const struct vc4_mock_desc vc4_mo
30 static const struct vc4_mock_desc vc5_mock =
31 VC4_MOCK_DESC(
32 VC4_MOCK_CRTC_DESC(&bcm2835_txp_data.base,
33 - VC4_MOCK_OUTPUT_DESC(VC4_ENCODER_TYPE_TXP,
34 + VC4_MOCK_OUTPUT_DESC(VC4_ENCODER_TYPE_TXP0,
35 DRM_MODE_ENCODER_VIRTUAL,
36 DRM_MODE_CONNECTOR_WRITEBACK)),
37 VC4_MOCK_PIXELVALVE_DESC(&bcm2711_pv0_data,
38 --- a/drivers/gpu/drm/vc4/tests/vc4_test_pv_muxing.c
39 +++ b/drivers/gpu/drm/vc4/tests/vc4_test_pv_muxing.c
40 @@ -91,7 +91,7 @@ static const struct encoder_constraint v
41 ENCODER_CONSTRAINT(VC4_ENCODER_TYPE_DSI0, 0),
42 ENCODER_CONSTRAINT(VC4_ENCODER_TYPE_HDMI0, 1),
43 ENCODER_CONSTRAINT(VC4_ENCODER_TYPE_VEC, 1),
44 - ENCODER_CONSTRAINT(VC4_ENCODER_TYPE_TXP, 2),
45 + ENCODER_CONSTRAINT(VC4_ENCODER_TYPE_TXP0, 2),
46 ENCODER_CONSTRAINT(VC4_ENCODER_TYPE_DSI1, 2),
47 };
48
49 @@ -99,7 +99,7 @@ static const struct encoder_constraint v
50 ENCODER_CONSTRAINT(VC4_ENCODER_TYPE_DPI, 0),
51 ENCODER_CONSTRAINT(VC4_ENCODER_TYPE_DSI0, 0),
52 ENCODER_CONSTRAINT(VC4_ENCODER_TYPE_VEC, 1),
53 - ENCODER_CONSTRAINT(VC4_ENCODER_TYPE_TXP, 0, 2),
54 + ENCODER_CONSTRAINT(VC4_ENCODER_TYPE_TXP0, 0, 2),
55 ENCODER_CONSTRAINT(VC4_ENCODER_TYPE_DSI1, 0, 1, 2),
56 ENCODER_CONSTRAINT(VC4_ENCODER_TYPE_HDMI0, 0, 1, 2),
57 ENCODER_CONSTRAINT(VC4_ENCODER_TYPE_HDMI1, 0, 1, 2),
58 @@ -208,7 +208,7 @@ static const struct pv_muxing_param vc4_
59 VC4_PV_MUXING_TEST("1 output: DSI1",
60 VC4_ENCODER_TYPE_DSI1),
61 VC4_PV_MUXING_TEST("1 output: TXP",
62 - VC4_ENCODER_TYPE_TXP),
63 + VC4_ENCODER_TYPE_TXP0),
64 VC4_PV_MUXING_TEST("2 outputs: DSI0, HDMI0",
65 VC4_ENCODER_TYPE_DSI0,
66 VC4_ENCODER_TYPE_HDMI0),
67 @@ -220,7 +220,7 @@ static const struct pv_muxing_param vc4_
68 VC4_ENCODER_TYPE_DSI1),
69 VC4_PV_MUXING_TEST("2 outputs: DSI0, TXP",
70 VC4_ENCODER_TYPE_DSI0,
71 - VC4_ENCODER_TYPE_TXP),
72 + VC4_ENCODER_TYPE_TXP0),
73 VC4_PV_MUXING_TEST("2 outputs: DPI, HDMI0",
74 VC4_ENCODER_TYPE_DPI,
75 VC4_ENCODER_TYPE_HDMI0),
76 @@ -232,19 +232,19 @@ static const struct pv_muxing_param vc4_
77 VC4_ENCODER_TYPE_DSI1),
78 VC4_PV_MUXING_TEST("2 outputs: DPI, TXP",
79 VC4_ENCODER_TYPE_DPI,
80 - VC4_ENCODER_TYPE_TXP),
81 + VC4_ENCODER_TYPE_TXP0),
82 VC4_PV_MUXING_TEST("2 outputs: HDMI0, DSI1",
83 VC4_ENCODER_TYPE_HDMI0,
84 VC4_ENCODER_TYPE_DSI1),
85 VC4_PV_MUXING_TEST("2 outputs: HDMI0, TXP",
86 VC4_ENCODER_TYPE_HDMI0,
87 - VC4_ENCODER_TYPE_TXP),
88 + VC4_ENCODER_TYPE_TXP0),
89 VC4_PV_MUXING_TEST("2 outputs: VEC, DSI1",
90 VC4_ENCODER_TYPE_VEC,
91 VC4_ENCODER_TYPE_DSI1),
92 VC4_PV_MUXING_TEST("2 outputs: VEC, TXP",
93 VC4_ENCODER_TYPE_VEC,
94 - VC4_ENCODER_TYPE_TXP),
95 + VC4_ENCODER_TYPE_TXP0),
96 VC4_PV_MUXING_TEST("3 outputs: DSI0, HDMI0, DSI1",
97 VC4_ENCODER_TYPE_DSI0,
98 VC4_ENCODER_TYPE_HDMI0,
99 @@ -252,7 +252,7 @@ static const struct pv_muxing_param vc4_
100 VC4_PV_MUXING_TEST("3 outputs: DSI0, HDMI0, TXP",
101 VC4_ENCODER_TYPE_DSI0,
102 VC4_ENCODER_TYPE_HDMI0,
103 - VC4_ENCODER_TYPE_TXP),
104 + VC4_ENCODER_TYPE_TXP0),
105 VC4_PV_MUXING_TEST("3 outputs: DSI0, VEC, DSI1",
106 VC4_ENCODER_TYPE_DSI0,
107 VC4_ENCODER_TYPE_VEC,
108 @@ -260,7 +260,7 @@ static const struct pv_muxing_param vc4_
109 VC4_PV_MUXING_TEST("3 outputs: DSI0, VEC, TXP",
110 VC4_ENCODER_TYPE_DSI0,
111 VC4_ENCODER_TYPE_VEC,
112 - VC4_ENCODER_TYPE_TXP),
113 + VC4_ENCODER_TYPE_TXP0),
114 VC4_PV_MUXING_TEST("3 outputs: DPI, HDMI0, DSI1",
115 VC4_ENCODER_TYPE_DPI,
116 VC4_ENCODER_TYPE_HDMI0,
117 @@ -268,7 +268,7 @@ static const struct pv_muxing_param vc4_
118 VC4_PV_MUXING_TEST("3 outputs: DPI, HDMI0, TXP",
119 VC4_ENCODER_TYPE_DPI,
120 VC4_ENCODER_TYPE_HDMI0,
121 - VC4_ENCODER_TYPE_TXP),
122 + VC4_ENCODER_TYPE_TXP0),
123 VC4_PV_MUXING_TEST("3 outputs: DPI, VEC, DSI1",
124 VC4_ENCODER_TYPE_DPI,
125 VC4_ENCODER_TYPE_VEC,
126 @@ -276,7 +276,7 @@ static const struct pv_muxing_param vc4_
127 VC4_PV_MUXING_TEST("3 outputs: DPI, VEC, TXP",
128 VC4_ENCODER_TYPE_DPI,
129 VC4_ENCODER_TYPE_VEC,
130 - VC4_ENCODER_TYPE_TXP),
131 + VC4_ENCODER_TYPE_TXP0),
132 };
133
134 KUNIT_ARRAY_PARAM(vc4_test_pv_muxing,
135 @@ -288,7 +288,7 @@ static const struct pv_muxing_param vc4_
136 VC4_ENCODER_TYPE_DPI,
137 VC4_ENCODER_TYPE_DSI0),
138 VC4_PV_MUXING_TEST("TXP/DSI1 Conflict",
139 - VC4_ENCODER_TYPE_TXP,
140 + VC4_ENCODER_TYPE_TXP0,
141 VC4_ENCODER_TYPE_DSI1),
142 VC4_PV_MUXING_TEST("HDMI0/VEC Conflict",
143 VC4_ENCODER_TYPE_HDMI0,
144 @@ -297,22 +297,22 @@ static const struct pv_muxing_param vc4_
145 VC4_ENCODER_TYPE_DSI0,
146 VC4_ENCODER_TYPE_HDMI0,
147 VC4_ENCODER_TYPE_DSI1,
148 - VC4_ENCODER_TYPE_TXP),
149 + VC4_ENCODER_TYPE_TXP0),
150 VC4_PV_MUXING_TEST("More than 3 outputs: DSI0, VEC, DSI1, TXP",
151 VC4_ENCODER_TYPE_DSI0,
152 VC4_ENCODER_TYPE_VEC,
153 VC4_ENCODER_TYPE_DSI1,
154 - VC4_ENCODER_TYPE_TXP),
155 + VC4_ENCODER_TYPE_TXP0),
156 VC4_PV_MUXING_TEST("More than 3 outputs: DPI, HDMI0, DSI1, TXP",
157 VC4_ENCODER_TYPE_DPI,
158 VC4_ENCODER_TYPE_HDMI0,
159 VC4_ENCODER_TYPE_DSI1,
160 - VC4_ENCODER_TYPE_TXP),
161 + VC4_ENCODER_TYPE_TXP0),
162 VC4_PV_MUXING_TEST("More than 3 outputs: DPI, VEC, DSI1, TXP",
163 VC4_ENCODER_TYPE_DPI,
164 VC4_ENCODER_TYPE_VEC,
165 VC4_ENCODER_TYPE_DSI1,
166 - VC4_ENCODER_TYPE_TXP),
167 + VC4_ENCODER_TYPE_TXP0),
168 };
169
170 KUNIT_ARRAY_PARAM(vc4_test_pv_muxing_invalid,
171 @@ -343,7 +343,7 @@ static const struct pv_muxing_param vc5_
172 VC4_ENCODER_TYPE_HDMI1),
173 VC5_PV_MUXING_TEST("2 outputs: DPI, TXP",
174 VC4_ENCODER_TYPE_DPI,
175 - VC4_ENCODER_TYPE_TXP),
176 + VC4_ENCODER_TYPE_TXP0),
177 VC5_PV_MUXING_TEST("2 outputs: DPI, VEC",
178 VC4_ENCODER_TYPE_DPI,
179 VC4_ENCODER_TYPE_VEC),
180 @@ -361,7 +361,7 @@ static const struct pv_muxing_param vc5_
181 VC4_ENCODER_TYPE_HDMI1),
182 VC5_PV_MUXING_TEST("2 outputs: DSI0, TXP",
183 VC4_ENCODER_TYPE_DSI0,
184 - VC4_ENCODER_TYPE_TXP),
185 + VC4_ENCODER_TYPE_TXP0),
186 VC5_PV_MUXING_TEST("2 outputs: DSI0, VEC",
187 VC4_ENCODER_TYPE_DSI0,
188 VC4_ENCODER_TYPE_VEC),
189 @@ -373,7 +373,7 @@ static const struct pv_muxing_param vc5_
190 VC4_ENCODER_TYPE_VEC),
191 VC5_PV_MUXING_TEST("2 outputs: DSI1, TXP",
192 VC4_ENCODER_TYPE_DSI1,
193 - VC4_ENCODER_TYPE_TXP),
194 + VC4_ENCODER_TYPE_TXP0),
195 VC5_PV_MUXING_TEST("2 outputs: DSI1, HDMI0",
196 VC4_ENCODER_TYPE_DSI1,
197 VC4_ENCODER_TYPE_HDMI0),
198 @@ -385,7 +385,7 @@ static const struct pv_muxing_param vc5_
199 VC4_ENCODER_TYPE_VEC),
200 VC5_PV_MUXING_TEST("2 outputs: HDMI0, TXP",
201 VC4_ENCODER_TYPE_HDMI0,
202 - VC4_ENCODER_TYPE_TXP),
203 + VC4_ENCODER_TYPE_TXP0),
204 VC5_PV_MUXING_TEST("2 outputs: HDMI0, HDMI1",
205 VC4_ENCODER_TYPE_HDMI0,
206 VC4_ENCODER_TYPE_HDMI1),
207 @@ -394,14 +394,14 @@ static const struct pv_muxing_param vc5_
208 VC4_ENCODER_TYPE_VEC),
209 VC5_PV_MUXING_TEST("2 outputs: HDMI1, TXP",
210 VC4_ENCODER_TYPE_HDMI1,
211 - VC4_ENCODER_TYPE_TXP),
212 + VC4_ENCODER_TYPE_TXP0),
213 VC5_PV_MUXING_TEST("2 outputs: TXP, VEC",
214 - VC4_ENCODER_TYPE_TXP,
215 + VC4_ENCODER_TYPE_TXP0,
216 VC4_ENCODER_TYPE_VEC),
217 VC5_PV_MUXING_TEST("3 outputs: DPI, VEC, TXP",
218 VC4_ENCODER_TYPE_DPI,
219 VC4_ENCODER_TYPE_VEC,
220 - VC4_ENCODER_TYPE_TXP),
221 + VC4_ENCODER_TYPE_TXP0),
222 VC5_PV_MUXING_TEST("3 outputs: DPI, VEC, DSI1",
223 VC4_ENCODER_TYPE_DPI,
224 VC4_ENCODER_TYPE_VEC,
225 @@ -416,15 +416,15 @@ static const struct pv_muxing_param vc5_
226 VC4_ENCODER_TYPE_HDMI1),
227 VC5_PV_MUXING_TEST("3 outputs: DPI, TXP, DSI1",
228 VC4_ENCODER_TYPE_DPI,
229 - VC4_ENCODER_TYPE_TXP,
230 + VC4_ENCODER_TYPE_TXP0,
231 VC4_ENCODER_TYPE_DSI1),
232 VC5_PV_MUXING_TEST("3 outputs: DPI, TXP, HDMI0",
233 VC4_ENCODER_TYPE_DPI,
234 - VC4_ENCODER_TYPE_TXP,
235 + VC4_ENCODER_TYPE_TXP0,
236 VC4_ENCODER_TYPE_HDMI0),
237 VC5_PV_MUXING_TEST("3 outputs: DPI, TXP, HDMI1",
238 VC4_ENCODER_TYPE_DPI,
239 - VC4_ENCODER_TYPE_TXP,
240 + VC4_ENCODER_TYPE_TXP0,
241 VC4_ENCODER_TYPE_HDMI1),
242 VC5_PV_MUXING_TEST("3 outputs: DPI, DSI1, HDMI0",
243 VC4_ENCODER_TYPE_DPI,
244 @@ -441,7 +441,7 @@ static const struct pv_muxing_param vc5_
245 VC5_PV_MUXING_TEST("3 outputs: DSI0, VEC, TXP",
246 VC4_ENCODER_TYPE_DSI0,
247 VC4_ENCODER_TYPE_VEC,
248 - VC4_ENCODER_TYPE_TXP),
249 + VC4_ENCODER_TYPE_TXP0),
250 VC5_PV_MUXING_TEST("3 outputs: DSI0, VEC, DSI1",
251 VC4_ENCODER_TYPE_DSI0,
252 VC4_ENCODER_TYPE_VEC,
253 @@ -456,15 +456,15 @@ static const struct pv_muxing_param vc5_
254 VC4_ENCODER_TYPE_HDMI1),
255 VC5_PV_MUXING_TEST("3 outputs: DSI0, TXP, DSI1",
256 VC4_ENCODER_TYPE_DSI0,
257 - VC4_ENCODER_TYPE_TXP,
258 + VC4_ENCODER_TYPE_TXP0,
259 VC4_ENCODER_TYPE_DSI1),
260 VC5_PV_MUXING_TEST("3 outputs: DSI0, TXP, HDMI0",
261 VC4_ENCODER_TYPE_DSI0,
262 - VC4_ENCODER_TYPE_TXP,
263 + VC4_ENCODER_TYPE_TXP0,
264 VC4_ENCODER_TYPE_HDMI0),
265 VC5_PV_MUXING_TEST("3 outputs: DSI0, TXP, HDMI1",
266 VC4_ENCODER_TYPE_DSI0,
267 - VC4_ENCODER_TYPE_TXP,
268 + VC4_ENCODER_TYPE_TXP0,
269 VC4_ENCODER_TYPE_HDMI1),
270 VC5_PV_MUXING_TEST("3 outputs: DSI0, DSI1, HDMI0",
271 VC4_ENCODER_TYPE_DSI0,
272 @@ -491,17 +491,17 @@ static const struct pv_muxing_param vc5_
273 VC5_PV_MUXING_TEST("More than 3 outputs: DPI, VEC, TXP, DSI1",
274 VC4_ENCODER_TYPE_DPI,
275 VC4_ENCODER_TYPE_VEC,
276 - VC4_ENCODER_TYPE_TXP,
277 + VC4_ENCODER_TYPE_TXP0,
278 VC4_ENCODER_TYPE_DSI1),
279 VC5_PV_MUXING_TEST("More than 3 outputs: DPI, VEC, TXP, HDMI0",
280 VC4_ENCODER_TYPE_DPI,
281 VC4_ENCODER_TYPE_VEC,
282 - VC4_ENCODER_TYPE_TXP,
283 + VC4_ENCODER_TYPE_TXP0,
284 VC4_ENCODER_TYPE_HDMI0),
285 VC5_PV_MUXING_TEST("More than 3 outputs: DPI, VEC, TXP, HDMI1",
286 VC4_ENCODER_TYPE_DPI,
287 VC4_ENCODER_TYPE_VEC,
288 - VC4_ENCODER_TYPE_TXP,
289 + VC4_ENCODER_TYPE_TXP0,
290 VC4_ENCODER_TYPE_HDMI1),
291 VC5_PV_MUXING_TEST("More than 3 outputs: DPI, VEC, DSI1, HDMI0",
292 VC4_ENCODER_TYPE_DPI,
293 @@ -520,17 +520,17 @@ static const struct pv_muxing_param vc5_
294 VC4_ENCODER_TYPE_HDMI1),
295 VC5_PV_MUXING_TEST("More than 3 outputs: DPI, TXP, DSI1, HDMI0",
296 VC4_ENCODER_TYPE_DPI,
297 - VC4_ENCODER_TYPE_TXP,
298 + VC4_ENCODER_TYPE_TXP0,
299 VC4_ENCODER_TYPE_DSI1,
300 VC4_ENCODER_TYPE_HDMI0),
301 VC5_PV_MUXING_TEST("More than 3 outputs: DPI, TXP, DSI1, HDMI1",
302 VC4_ENCODER_TYPE_DPI,
303 - VC4_ENCODER_TYPE_TXP,
304 + VC4_ENCODER_TYPE_TXP0,
305 VC4_ENCODER_TYPE_DSI1,
306 VC4_ENCODER_TYPE_HDMI1),
307 VC5_PV_MUXING_TEST("More than 3 outputs: DPI, TXP, HDMI0, HDMI1",
308 VC4_ENCODER_TYPE_DPI,
309 - VC4_ENCODER_TYPE_TXP,
310 + VC4_ENCODER_TYPE_TXP0,
311 VC4_ENCODER_TYPE_HDMI0,
312 VC4_ENCODER_TYPE_HDMI1),
313 VC5_PV_MUXING_TEST("More than 3 outputs: DPI, DSI1, HDMI0, HDMI1",
314 @@ -541,19 +541,19 @@ static const struct pv_muxing_param vc5_
315 VC5_PV_MUXING_TEST("More than 3 outputs: DPI, VEC, TXP, DSI1, HDMI0",
316 VC4_ENCODER_TYPE_DPI,
317 VC4_ENCODER_TYPE_VEC,
318 - VC4_ENCODER_TYPE_TXP,
319 + VC4_ENCODER_TYPE_TXP0,
320 VC4_ENCODER_TYPE_DSI1,
321 VC4_ENCODER_TYPE_HDMI0),
322 VC5_PV_MUXING_TEST("More than 3 outputs: DPI, VEC, TXP, DSI1, HDMI1",
323 VC4_ENCODER_TYPE_DPI,
324 VC4_ENCODER_TYPE_VEC,
325 - VC4_ENCODER_TYPE_TXP,
326 + VC4_ENCODER_TYPE_TXP0,
327 VC4_ENCODER_TYPE_DSI1,
328 VC4_ENCODER_TYPE_HDMI1),
329 VC5_PV_MUXING_TEST("More than 3 outputs: DPI, VEC, TXP, HDMI0, HDMI1",
330 VC4_ENCODER_TYPE_DPI,
331 VC4_ENCODER_TYPE_VEC,
332 - VC4_ENCODER_TYPE_TXP,
333 + VC4_ENCODER_TYPE_TXP0,
334 VC4_ENCODER_TYPE_HDMI0,
335 VC4_ENCODER_TYPE_HDMI1),
336 VC5_PV_MUXING_TEST("More than 3 outputs: DPI, VEC, DSI1, HDMI0, HDMI1",
337 @@ -564,24 +564,24 @@ static const struct pv_muxing_param vc5_
338 VC4_ENCODER_TYPE_HDMI1),
339 VC5_PV_MUXING_TEST("More than 3 outputs: DPI, TXP, DSI1, HDMI0, HDMI1",
340 VC4_ENCODER_TYPE_DPI,
341 - VC4_ENCODER_TYPE_TXP,
342 + VC4_ENCODER_TYPE_TXP0,
343 VC4_ENCODER_TYPE_DSI1,
344 VC4_ENCODER_TYPE_HDMI0,
345 VC4_ENCODER_TYPE_HDMI1),
346 VC5_PV_MUXING_TEST("More than 3 outputs: DSI0, VEC, TXP, DSI1",
347 VC4_ENCODER_TYPE_DSI0,
348 VC4_ENCODER_TYPE_VEC,
349 - VC4_ENCODER_TYPE_TXP,
350 + VC4_ENCODER_TYPE_TXP0,
351 VC4_ENCODER_TYPE_DSI1),
352 VC5_PV_MUXING_TEST("More than 3 outputs: DSI0, VEC, TXP, HDMI0",
353 VC4_ENCODER_TYPE_DSI0,
354 VC4_ENCODER_TYPE_VEC,
355 - VC4_ENCODER_TYPE_TXP,
356 + VC4_ENCODER_TYPE_TXP0,
357 VC4_ENCODER_TYPE_HDMI0),
358 VC5_PV_MUXING_TEST("More than 3 outputs: DSI0, VEC, TXP, HDMI1",
359 VC4_ENCODER_TYPE_DSI0,
360 VC4_ENCODER_TYPE_VEC,
361 - VC4_ENCODER_TYPE_TXP,
362 + VC4_ENCODER_TYPE_TXP0,
363 VC4_ENCODER_TYPE_HDMI1),
364 VC5_PV_MUXING_TEST("More than 3 outputs: DSI0, VEC, DSI1, HDMI0",
365 VC4_ENCODER_TYPE_DSI0,
366 @@ -600,17 +600,17 @@ static const struct pv_muxing_param vc5_
367 VC4_ENCODER_TYPE_HDMI1),
368 VC5_PV_MUXING_TEST("More than 3 outputs: DSI0, TXP, DSI1, HDMI0",
369 VC4_ENCODER_TYPE_DSI0,
370 - VC4_ENCODER_TYPE_TXP,
371 + VC4_ENCODER_TYPE_TXP0,
372 VC4_ENCODER_TYPE_DSI1,
373 VC4_ENCODER_TYPE_HDMI0),
374 VC5_PV_MUXING_TEST("More than 3 outputs: DSI0, TXP, DSI1, HDMI1",
375 VC4_ENCODER_TYPE_DSI0,
376 - VC4_ENCODER_TYPE_TXP,
377 + VC4_ENCODER_TYPE_TXP0,
378 VC4_ENCODER_TYPE_DSI1,
379 VC4_ENCODER_TYPE_HDMI1),
380 VC5_PV_MUXING_TEST("More than 3 outputs: DSI0, TXP, HDMI0, HDMI1",
381 VC4_ENCODER_TYPE_DSI0,
382 - VC4_ENCODER_TYPE_TXP,
383 + VC4_ENCODER_TYPE_TXP0,
384 VC4_ENCODER_TYPE_HDMI0,
385 VC4_ENCODER_TYPE_HDMI1),
386 VC5_PV_MUXING_TEST("More than 3 outputs: DSI0, DSI1, HDMI0, HDMI1",
387 @@ -621,19 +621,19 @@ static const struct pv_muxing_param vc5_
388 VC5_PV_MUXING_TEST("More than 3 outputs: DSI0, VEC, TXP, DSI1, HDMI0",
389 VC4_ENCODER_TYPE_DSI0,
390 VC4_ENCODER_TYPE_VEC,
391 - VC4_ENCODER_TYPE_TXP,
392 + VC4_ENCODER_TYPE_TXP0,
393 VC4_ENCODER_TYPE_DSI1,
394 VC4_ENCODER_TYPE_HDMI0),
395 VC5_PV_MUXING_TEST("More than 3 outputs: DSI0, VEC, TXP, DSI1, HDMI1",
396 VC4_ENCODER_TYPE_DSI0,
397 VC4_ENCODER_TYPE_VEC,
398 - VC4_ENCODER_TYPE_TXP,
399 + VC4_ENCODER_TYPE_TXP0,
400 VC4_ENCODER_TYPE_DSI1,
401 VC4_ENCODER_TYPE_HDMI1),
402 VC5_PV_MUXING_TEST("More than 3 outputs: DSI0, VEC, TXP, HDMI0, HDMI1",
403 VC4_ENCODER_TYPE_DSI0,
404 VC4_ENCODER_TYPE_VEC,
405 - VC4_ENCODER_TYPE_TXP,
406 + VC4_ENCODER_TYPE_TXP0,
407 VC4_ENCODER_TYPE_HDMI0,
408 VC4_ENCODER_TYPE_HDMI1),
409 VC5_PV_MUXING_TEST("More than 3 outputs: DSI0, VEC, DSI1, HDMI0, HDMI1",
410 @@ -644,27 +644,27 @@ static const struct pv_muxing_param vc5_
411 VC4_ENCODER_TYPE_HDMI1),
412 VC5_PV_MUXING_TEST("More than 3 outputs: DSI0, TXP, DSI1, HDMI0, HDMI1",
413 VC4_ENCODER_TYPE_DSI0,
414 - VC4_ENCODER_TYPE_TXP,
415 + VC4_ENCODER_TYPE_TXP0,
416 VC4_ENCODER_TYPE_DSI1,
417 VC4_ENCODER_TYPE_HDMI0,
418 VC4_ENCODER_TYPE_HDMI1),
419 VC5_PV_MUXING_TEST("More than 3 outputs: VEC, TXP, DSI1, HDMI0, HDMI1",
420 VC4_ENCODER_TYPE_VEC,
421 - VC4_ENCODER_TYPE_TXP,
422 + VC4_ENCODER_TYPE_TXP0,
423 VC4_ENCODER_TYPE_DSI1,
424 VC4_ENCODER_TYPE_HDMI0,
425 VC4_ENCODER_TYPE_HDMI1),
426 VC5_PV_MUXING_TEST("More than 3 outputs: DPI, VEC, TXP, DSI1, HDMI0, HDMI1",
427 VC4_ENCODER_TYPE_DPI,
428 VC4_ENCODER_TYPE_VEC,
429 - VC4_ENCODER_TYPE_TXP,
430 + VC4_ENCODER_TYPE_TXP0,
431 VC4_ENCODER_TYPE_DSI1,
432 VC4_ENCODER_TYPE_HDMI0,
433 VC4_ENCODER_TYPE_HDMI1),
434 VC5_PV_MUXING_TEST("More than 3 outputs: DSI0, VEC, TXP, DSI1, HDMI0, HDMI1",
435 VC4_ENCODER_TYPE_DSI0,
436 VC4_ENCODER_TYPE_VEC,
437 - VC4_ENCODER_TYPE_TXP,
438 + VC4_ENCODER_TYPE_TXP0,
439 VC4_ENCODER_TYPE_DSI1,
440 VC4_ENCODER_TYPE_HDMI0,
441 VC4_ENCODER_TYPE_HDMI1),
442 --- a/drivers/gpu/drm/vc4/vc4_drv.h
443 +++ b/drivers/gpu/drm/vc4/vc4_drv.h
444 @@ -511,7 +511,8 @@ enum vc4_encoder_type {
445 VC4_ENCODER_TYPE_DSI1,
446 VC4_ENCODER_TYPE_SMI,
447 VC4_ENCODER_TYPE_DPI,
448 - VC4_ENCODER_TYPE_TXP,
449 + VC4_ENCODER_TYPE_TXP0,
450 + VC4_ENCODER_TYPE_TXP1,
451 };
452
453 struct vc4_encoder {
454 --- a/drivers/gpu/drm/vc4/vc4_kms.c
455 +++ b/drivers/gpu/drm/vc4/vc4_kms.c
456 @@ -359,7 +359,7 @@ static void vc6_hvs_pv_muxing_commit(str
457 mux = 0;
458 break;
459
460 - case VC4_ENCODER_TYPE_TXP:
461 + case VC4_ENCODER_TYPE_TXP0:
462 mux = 2;
463 break;
464
465 --- a/drivers/gpu/drm/vc4/vc4_txp.c
466 +++ b/drivers/gpu/drm/vc4/vc4_txp.c
467 @@ -517,7 +517,7 @@ const struct vc4_txp_data bcm2835_txp_da
468 .hvs_available_channels = BIT(2),
469 .hvs_output = 2,
470 },
471 - .encoder_type = VC4_ENCODER_TYPE_TXP,
472 + .encoder_type = VC4_ENCODER_TYPE_TXP0,
473 .has_byte_enable = true,
474 };
475
Staging tree of Sander Vanheule