mediatek: bpi-r4: store random MAC addresses for the BPi-R4
[openwrt/openwrt.git] / target / linux / mediatek / files-6.1 / arch / arm64 / boot / dts / mediatek / mt7988a-bananapi-bpi-r4.dts
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /*
3 * Copyright (C) 2022 MediaTek Inc.
4 * Author: Sam.Shih <sam.shih@mediatek.com>
5 */
6
7 /dts-v1/;
8 #include "mt7988a.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/regulator/richtek,rt5190a-regulator.h>
13
14 / {
15 model = "Bananapi BPI-R4";
16 compatible = "bananapi,bpi-r4",
17 "mediatek,mt7988a";
18
19 aliases {
20 ethernet0 = &gmac0;
21 ethernet1 = &gmac1;
22 serial0 = &uart0;
23 led-boot = &led_green;
24 led-failsafe = &led_green;
25 led-running = &led_green;
26 led-upgrade = &led_green;
27 };
28
29 chosen {
30 stdout-path = &uart0;
31 bootargs = "console=ttyS0,115200n1 loglevel=8 pci=pcie_bus_perf ubi.block=0,fit root=/dev/fit0 rootwait";
32 rootdisk-spim-nand = <&ubi_rootfs>;
33 };
34
35 memory {
36 reg = <0x00 0x40000000 0x00 0x10000000>;
37 };
38
39 /* SFP1 cage (WAN) */
40 sfp1: sfp1 {
41 compatible = "sff,sfp";
42 i2c-bus = <&i2c_sfp1>;
43 los-gpios = <&pio 54 GPIO_ACTIVE_HIGH>;
44 mod-def0-gpios = <&pio 82 GPIO_ACTIVE_LOW>;
45 tx-disable-gpios = <&pio 70 GPIO_ACTIVE_HIGH>;
46 tx-fault-gpios = <&pio 69 GPIO_ACTIVE_HIGH>;
47 rate-select0-gpios = <&pio 21 GPIO_ACTIVE_LOW>;
48 maximum-power-milliwatt = <3000>;
49 };
50
51 /* SFP2 cage (LAN) */
52 sfp2: sfp2 {
53 compatible = "sff,sfp";
54 i2c-bus = <&i2c_sfp2>;
55 los-gpios = <&pio 2 GPIO_ACTIVE_HIGH>;
56 mod-def0-gpios = <&pio 83 GPIO_ACTIVE_LOW>;
57 tx-disable-gpios = <&pio 0 GPIO_ACTIVE_HIGH>;
58 tx-fault-gpios = <&pio 1 GPIO_ACTIVE_HIGH>;
59 rate-select0-gpios = <&pio 3 GPIO_ACTIVE_LOW>;
60 maximum-power-milliwatt = <3000>;
61 };
62
63 gpio-keys {
64 compatible = "gpio-keys";
65
66 wps {
67 label = "WPS";
68 linux,code = <KEY_RESTART>;
69 gpios = <&pio 14 GPIO_ACTIVE_LOW>;
70 };
71 };
72
73 gpio-leds {
74 compatible = "gpio-leds";
75
76 led_green: led-green {
77 function = LED_FUNCTION_STATUS;
78 color = <LED_COLOR_ID_GREEN>;
79 gpios = <&pio 79 GPIO_ACTIVE_HIGH>;
80 default-state = "on";
81 };
82
83 led_blue: led-blue {
84 function = LED_FUNCTION_WPS;
85 color = <LED_COLOR_ID_BLUE>;
86 gpios = <&pio 63 GPIO_ACTIVE_HIGH>;
87 default-state = "off";
88 };
89 };
90 };
91
92 &eth {
93 status = "okay";
94 };
95
96 &gmac0 {
97 status = "okay";
98 };
99
100 &gmac1 {
101 sfp = <&sfp2>;
102 managed = "in-band-status";
103 phy-mode = "usxgmii";
104 status = "okay";
105 };
106
107 &gmac2 {
108 sfp = <&sfp1>;
109 managed = "in-band-status";
110 phy-mode = "usxgmii";
111 status = "okay";
112 };
113
114 &switch {
115 status = "okay";
116 };
117
118 &gsw_phy0 {
119 pinctrl-names = "gbe-led";
120 pinctrl-0 = <&gbe0_led0_pins>;
121 };
122
123 &gsw_port0 {
124 label = "wan";
125 };
126
127 &gsw_phy0_led0 {
128 status = "okay";
129 color = <LED_COLOR_ID_GREEN>;
130 };
131
132 &gsw_phy1 {
133 pinctrl-names = "gbe-led";
134 pinctrl-0 = <&gbe1_led0_pins>;
135 };
136
137 &gsw_phy1_led0 {
138 status = "okay";
139 color = <LED_COLOR_ID_GREEN>;
140 };
141
142 &gsw_phy2 {
143 pinctrl-names = "gbe-led";
144 pinctrl-0 = <&gbe2_led0_pins>;
145 };
146
147 &gsw_phy2_led0 {
148 status = "okay";
149 color = <LED_COLOR_ID_GREEN>;
150 };
151
152 &gsw_phy3 {
153 pinctrl-names = "gbe-led";
154 pinctrl-0 = <&gbe3_led0_pins>;
155 };
156
157 &gsw_phy3_led0 {
158 status = "okay";
159 color = <LED_COLOR_ID_GREEN>;
160 };
161
162 &cpu0 {
163 proc-supply = <&rt5190_buck3>;
164 };
165
166 &cpu1 {
167 proc-supply = <&rt5190_buck3>;
168 };
169
170 &cpu2 {
171 proc-supply = <&rt5190_buck3>;
172 };
173
174 &cpu3 {
175 proc-supply = <&rt5190_buck3>;
176 };
177
178 &cci {
179 proc-supply = <&rt5190_buck3>;
180 };
181
182 &i2c0 {
183 pinctrl-names = "default";
184 pinctrl-0 = <&i2c0_pins>;
185 status = "okay";
186
187 rt5190a_64: rt5190a@64 {
188 compatible = "richtek,rt5190a";
189 reg = <0x64>;
190 vin2-supply = <&rt5190_buck1>;
191 vin3-supply = <&rt5190_buck1>;
192 vin4-supply = <&rt5190_buck1>;
193
194 regulators {
195 rt5190_buck1: buck1 {
196 regulator-name = "rt5190a-buck1";
197 regulator-min-microvolt = <5090000>;
198 regulator-max-microvolt = <5090000>;
199 regulator-allowed-modes =
200 <RT5190A_OPMODE_AUTO RT5190A_OPMODE_FPWM>;
201 regulator-boot-on;
202 regulator-always-on;
203 };
204 buck2 {
205 regulator-name = "vcore";
206 regulator-min-microvolt = <600000>;
207 regulator-max-microvolt = <1400000>;
208 regulator-boot-on;
209 regulator-always-on;
210 };
211 rt5190_buck3: buck3 {
212 regulator-name = "vproc";
213 regulator-min-microvolt = <600000>;
214 regulator-max-microvolt = <1400000>;
215 regulator-boot-on;
216 };
217 buck4 {
218 regulator-name = "rt5190a-buck4";
219 regulator-min-microvolt = <850000>;
220 regulator-max-microvolt = <850000>;
221 regulator-allowed-modes =
222 <RT5190A_OPMODE_AUTO RT5190A_OPMODE_FPWM>;
223 regulator-boot-on;
224 regulator-always-on;
225 };
226 ldo {
227 regulator-name = "rt5190a-ldo";
228 regulator-min-microvolt = <1200000>;
229 regulator-max-microvolt = <1200000>;
230 regulator-boot-on;
231 regulator-always-on;
232 };
233 };
234 };
235 };
236
237 &i2c2 {
238 pinctrl-names = "default";
239 pinctrl-0 = <&i2c2_1_pins>;
240 status = "okay";
241
242 pca9545: i2c-switch@70 {
243 reg = <0x70>;
244 compatible = "nxp,pca9545";
245 reset-gpios = <&pio 5 GPIO_ACTIVE_LOW>;
246 #address-cells = <1>;
247 #size-cells = <0>;
248
249 i2c_rtc: i2c@0 { //eeprom,rtc,ngff
250 #address-cells = <1>;
251 #size-cells = <0>;
252 reg = <0>;
253
254 eeprom@50 {
255 compatible = "atmel,24c02";
256 reg = <0x50>;
257 address-bits = <8>;
258 page-size = <8>;
259 size = <256>;
260 };
261
262 eeprom@57 {
263 compatible = "atmel,24c02";
264 reg = <0x57>;
265 address-bits = <8>;
266 page-size = <8>;
267 size = <256>;
268 };
269
270 pcf8563: rtc@51 {
271 compatible = "nxp,pcf8563";
272 reg = <0x51>;
273 status = "disabled";
274 };
275 };
276
277 i2c_sfp1: i2c@1 {
278 #address-cells = <1>;
279 #size-cells = <0>;
280 reg = <1>;
281 };
282
283 i2c_sfp2: i2c@2 {
284 #address-cells = <1>;
285 #size-cells = <0>;
286 reg = <2>;
287 };
288
289 i2c_wifi: i2c@3 {
290 #address-cells = <1>;
291 #size-cells = <0>;
292 reg = <3>;
293 };
294 };
295 };
296
297 /* mPCIe SIM2 */
298 &pcie0 {
299 pinctrl-names = "default";
300 pinctrl-0 = <&pcie0_pins>;
301 status = "okay";
302 };
303
304 /* mPCIe SIM3 */
305 &pcie1 {
306 pinctrl-names = "default";
307 pinctrl-0 = <&pcie1_pins>;
308 status = "okay";
309 };
310
311 /* M.2 key-B SIM1 */
312 &pcie2 {
313 pinctrl-names = "default";
314 pinctrl-0 = <&pcie2_pins>;
315 status = "okay";
316 };
317
318 /* M.2 key-M SSD */
319 &pcie3 {
320 pinctrl-names = "default";
321 pinctrl-0 = <&pcie3_pins>;
322 status = "okay";
323 };
324
325 &ssusb1 {
326 status = "okay";
327 };
328
329 &tphy {
330 status = "okay";
331 };
332
333 &spi0 {
334 pinctrl-names = "default";
335 pinctrl-0 = <&spi0_flash_pins>;
336 status = "okay";
337
338 spi_nand: spi_nand@0 {
339 compatible = "spi-nand";
340 reg = <0>;
341 spi-max-frequency = <52000000>;
342 spi-tx-buswidth = <4>;
343 spi-rx-buswidth = <4>;
344 };
345 };
346
347 &spi_nand {
348 partitions {
349 compatible = "fixed-partitions";
350 #address-cells = <1>;
351 #size-cells = <1>;
352
353 partition@0 {
354 label = "bl2";
355 reg = <0x0 0x200000>;
356 read-only;
357 };
358
359 partition@200000 {
360 label = "ubi";
361 reg = <0x200000 0x7e00000>;
362 compatible = "linux,ubi";
363
364 volumes {
365 ubi-volume-ubootenv {
366 volname = "ubootenv";
367 nvmem-layout {
368 compatible = "u-boot,env-redundant-bool-layout";
369 };
370 };
371
372 ubi-volume-ubootenv2 {
373 volname = "ubootenv2";
374 nvmem-layout {
375 compatible = "u-boot,env-redundant-bool-layout";
376 };
377 };
378
379 ubi_rootfs: ubi-volume-fit {
380 volname = "fit";
381 };
382 };
383 };
384 };
385 };
386
387 &uart0 {
388 status = "okay";
389 };
390
391 &uart1 {
392 status = "okay";
393 pinctrl-names = "default";
394 pinctrl-0 = <&uart1_2_lite_pins>;
395 };
396
397 &uart2 {
398 status = "okay";
399 pinctrl-names = "default";
400 pinctrl-0 = <&uart2_3_pins>;
401 };
402
403 &watchdog {
404 status = "okay";
405 };
406
407 &xphy {
408 status = "okay";
409 };