target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-gl-b1300.dts

   1 /* Copyright (c) 2015, The Linux Foundation. All rights reserved.
   2  *
   3  * Permission to use, copy, modify, and/or distribute this software for any
   4  * purpose with or without fee is hereby granted, provided that the above
   5  * copyright notice and this permission notice appear in all copies.
   6  *
   7  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   8  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
   9  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  10  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  11  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  12  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  13  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  14  *
  15  */
  16
  17 #include "qcom-ipq4019.dtsi"
  18 #include <dt-bindings/gpio/gpio.h>
  19 #include <dt-bindings/input/input.h>
  20 #include <dt-bindings/soc/qcom,tcsr.h>
  21
  22 / {
  23         model = "GL.iNet GL-B1300";
  24         compatible = "glinet,gl-b1300";
  25
  26         aliases {
  27                 led-boot = &power;
  28                 led-failsafe = &power;
  29                 led-running = &power;
  30                 led-upgrade = &power;
  31                 label-mac-device = &swport4;
  32         };
  33
  34         memory {
  35                 device_type = "memory";
  36                 reg = <0x80000000 0x10000000>;
  37         };
  38
  39         soc {
  40                 rng@22000 {
  41                         status = "okay";
  42                 };
  43
  44                 mdio@90000 {
  45                         status = "okay";
  46                 };
  47
  48                 tcsr@1949000 {
  49                         compatible = "qcom,tcsr";
  50                         reg = <0x1949000 0x100>;
  51                         qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  52                 };
  53
  54                 tcsr@194b000 {
  55                         /* select hostmode */
  56                         compatible = "qcom,tcsr";
  57                         reg = <0x194b000 0x100>;
  58                         qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
  59                         status = "okay";
  60                 };
  61
  62                 ess_tcsr@1953000 {
  63                         compatible = "qcom,tcsr";
  64                         reg = <0x1953000 0x1000>;
  65                         qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
  66                 };
  67
  68                 tcsr@1957000 {
  69                         compatible = "qcom,tcsr";
  70                         reg = <0x1957000 0x100>;
  71                         qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  72                 };
  73
  74                 usb2@60f8800 {
  75                         status = "okay";
  76                 };
  77
  78                 usb3@8af8800 {
  79                         status = "okay";
  80                 };
  81
  82                 crypto@8e3a000 {
  83                         status = "okay";
  84                 };
  85
  86                 watchdog@b017000 {
  87                         status = "okay";
  88                 };
  89         };
  90
  91         keys {
  92                 compatible = "gpio-keys";
  93
  94                 wps {
  95                         label = "wps";
  96                         gpios = <&tlmm 5 GPIO_ACTIVE_LOW>;
  97                         linux,code = <KEY_WPS_BUTTON>;
  98                 };
  99
 100                 reset {
 101                         label = "reset";
 102                         gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
 103                         linux,code = <KEY_RESTART>;
 104                 };
 105         };
 106
 107         leds {
 108                 compatible = "gpio-leds";
 109
 110                 power: power {
 111                         label = "green:power";
 112                         gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>;
 113                         default-state = "on";
 114                 };
 115
 116                 mesh {
 117                         label = "green:mesh";
 118                         gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
 119                 };
 120
 121                 wlan {
 122                         label = "green:wlan";
 123                         gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
 124                 };
 125         };
 126 };
 127
 128 &blsp_dma {
 129         status = "okay";
 130 };
 131
 132 &cryptobam {
 133         status = "okay";
 134 };
 135
 136 &blsp1_spi1 {
 137         pinctrl-0 = <&spi_0_pins>;
 138         pinctrl-names = "default";
 139         status = "okay";
 140         cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
 141
 142         mx25l25635f@0 {
 143                 compatible = "jedec,spi-nor";
 144                 reg = <0>;
 145                 spi-max-frequency = <24000000>;
 146
 147                 partitions {
 148                         compatible = "fixed-partitions";
 149                         #address-cells = <1>;
 150                         #size-cells = <1>;
 151
 152                         SBL1@0 {
 153                                 label = "SBL1";
 154                                 reg = <0x0 0x40000>;
 155                                 read-only;
 156                         };
 157
 158                         MIBIB@40000 {
 159                                 label = "MIBIB";
 160                                 reg = <0x40000 0x20000>;
 161                                 read-only;
 162                         };
 163
 164                         QSEE@60000 {
 165                                 label = "QSEE";
 166                                 reg = <0x60000 0x60000>;
 167                                 read-only;
 168                         };
 169
 170                         CDT@c0000 {
 171                                 label = "CDT";
 172                                 reg = <0xc0000 0x10000>;
 173                                 read-only;
 174                         };
 175
 176                         DDRPARAMS@d0000 {
 177                                 label = "DDRPARAMS";
 178                                 reg = <0xd0000 0x10000>;
 179                                 read-only;
 180                         };
 181
 182                         APPSBLENV@e0000 {
 183                                 label = "APPSBLENV";
 184                                 reg = <0xe0000 0x10000>;
 185                                 read-only;
 186                         };
 187
 188                         APPSBL@f0000 {
 189                                 label = "APPSBL";
 190                                 reg = <0xf0000 0x80000>;
 191                                 read-only;
 192                         };
 193
 194                         ART@170000 {
 195                                 label = "ART";
 196                                 reg = <0x170000 0x10000>;
 197                                 read-only;
 198
 199                                 nvmem-layout {
 200                                         compatible = "fixed-layout";
 201                                         #address-cells = <1>;
 202                                         #size-cells = <1>;
 203
 204                                         macaddr_gmac0: macaddr@0 {
 205                                                 compatible = "mac-base";
 206                                                 reg = <0x0 0x6>;
 207                                                 #nvmem-cell-cells = <1>;
 208                                         };
 209
 210                                         macaddr_gmac1: macaddr@6 {
 211                                                 reg = <0x6 0x6>;
 212                                         };
 213
 214                                         precal_art_1000: precal@1000 {
 215                                                 reg = <0x1000 0x2f20>;
 216                                         };
 217
 218                                         precal_art_5000: precal@5000 {
 219                                                 reg = <0x5000 0x2f20>;
 220                                         };
 221                                 };
 222                         };
 223
 224                         firmware@180000 {
 225                                 compatible = "denx,fit";
 226                                 label = "firmware";
 227                                 reg = <0x180000 0x1e80000>;
 228                         };
 229                 };
 230         };
 231 };
 232
 233 &blsp1_uart1 {
 234         pinctrl-0 = <&serial_pins>;
 235         pinctrl-names = "default";
 236         status = "okay";
 237 };
 238
 239 &tlmm {
 240         serial_pins: serial_pinmux {
 241                 mux {
 242                         pins = "gpio60", "gpio61";
 243                         function = "blsp_uart0";
 244                         bias-disable;
 245                 };
 246         };
 247
 248         spi_0_pins: spi_0_pinmux {
 249                 pinmux {
 250                         function = "blsp_spi0";
 251                         pins = "gpio55", "gpio56", "gpio57";
 252                 };
 253                 pinmux_cs {
 254                         function = "gpio";
 255                         pins = "gpio54";
 256                 };
 257                 pinconf {
 258                         pins = "gpio55", "gpio56", "gpio57";
 259                         drive-strength = <12>;
 260                         bias-disable;
 261                 };
 262                 pinconf_cs {
 263                         pins = "gpio54";
 264                         drive-strength = <2>;
 265                         bias-disable;
 266                         output-high;
 267                 };
 268         };
 269 };
 270
 271 &usb2_hs_phy {
 272         status = "okay";
 273 };
 274
 275 &usb3_hs_phy {
 276         status = "okay";
 277 };
 278
 279 &usb3_ss_phy {
 280         status = "okay";
 281 };
 282
 283 &gmac {
 284         status = "okay";
 285 };
 286
 287 &switch {
 288         status = "okay";
 289 };
 290
 291 &swport3 {
 292         status = "okay";
 293
 294         label = "lan2";
 295         nvmem-cell-names = "mac-address";
 296         nvmem-cells = <&macaddr_gmac0 2>;
 297 };
 298
 299 &swport4 {
 300         status = "okay";
 301
 302         label = "lan1";
 303         nvmem-cell-names = "mac-address";
 304         nvmem-cells = <&macaddr_gmac0 0>;
 305 };
 306
 307 &swport5 {
 308         status = "okay";
 309
 310         nvmem-cell-names = "mac-address";
 311         nvmem-cells = <&macaddr_gmac1>;
 312 };
 313
 314 &wifi0 {
 315         status = "okay";
 316         nvmem-cell-names = "pre-calibration";
 317         nvmem-cells = <&precal_art_1000>;
 318         qcom,ath10k-calibration-variant = "GL-B1300";
 319 };
 320
 321 &wifi1 {
 322         status = "okay";
 323         nvmem-cell-names = "pre-calibration";
 324         nvmem-cells = <&precal_art_5000>;
 325         qcom,ath10k-calibration-variant = "GL-B1300";
 326 };