target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-gl-s1300.dts

   1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
   2
   3 #include "qcom-ipq4019.dtsi"
   4 #include <dt-bindings/gpio/gpio.h>
   5 #include <dt-bindings/input/input.h>
   6 #include <dt-bindings/soc/qcom,tcsr.h>
   7
   8 / {
   9         model = "GL.iNet GL-S1300";
  10         compatible = "glinet,gl-s1300";
  11
  12         aliases {
  13                 led-boot = &led_power;
  14                 led-failsafe = &led_power;
  15                 led-running = &led_power;
  16                 led-upgrade = &led_power;
  17         };
  18
  19         memory {
  20                 device_type = "memory";
  21                 reg = <0x80000000 0x10000000>;
  22         };
  23
  24         soc {
  25                 rng@22000 {
  26                         status = "okay";
  27                 };
  28
  29                 mdio@90000 {
  30                         status = "okay";
  31                 };
  32
  33                 ess-psgmii@98000 {
  34                         status = "okay";
  35                 };
  36
  37                 tcsr@1949000 {
  38                         compatible = "qcom,tcsr";
  39                         reg = <0x1949000 0x100>;
  40                         qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  41                 };
  42
  43                 tcsr@194b000 {
  44                         /* select hostmode */
  45                         compatible = "qcom,tcsr";
  46                         reg = <0x194b000 0x100>;
  47                         qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
  48                         status = "okay";
  49                 };
  50
  51                 ess_tcsr@1953000 {
  52                         compatible = "qcom,tcsr";
  53                         reg = <0x1953000 0x1000>;
  54                         qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
  55                 };
  56
  57                 tcsr@1957000 {
  58                         compatible = "qcom,tcsr";
  59                         reg = <0x1957000 0x100>;
  60                         qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  61                 };
  62
  63                 usb2@60f8800 {
  64                         status = "okay";
  65                 };
  66
  67                 usb3@8af8800 {
  68                         status = "okay";
  69                 };
  70
  71                 crypto@8e3a000 {
  72                         status = "okay";
  73                 };
  74
  75                 watchdog@b017000 {
  76                         status = "okay";
  77                 };
  78
  79                 ess-switch@c000000 {
  80                         status = "okay";
  81                         switch_lan_bmp = <0x18>;
  82                         switch_wan_bmp = <0x20>;
  83                 };
  84
  85                 edma@c080000 {
  86                         status = "okay";
  87                 };
  88         };
  89
  90         keys {
  91                 compatible = "gpio-keys";
  92
  93                 wps {
  94                         label = "wps";
  95                         gpios = <&tlmm 53 GPIO_ACTIVE_LOW>;
  96                         linux,code = <KEY_WPS_BUTTON>;
  97                 };
  98
  99                 reset {
 100                         label = "reset";
 101                         gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
 102                         linux,code = <KEY_RESTART>;
 103                 };
 104         };
 105
 106         leds {
 107                 compatible = "gpio-leds";
 108
 109                 led_power: power {
 110                         label = "green:power";
 111                         gpios = <&tlmm 57 GPIO_ACTIVE_HIGH>;
 112                         default-state = "on";
 113                 };
 114
 115                 mesh {
 116                         label = "green:mesh";
 117                         gpios = <&tlmm 59 GPIO_ACTIVE_HIGH>;
 118                 };
 119
 120                 wlan {
 121                         label = "green:wlan";
 122                         gpios = <&tlmm 60 GPIO_ACTIVE_HIGH>;
 123                         linux,default-trigger = "phy0tpt";
 124                 };
 125         };
 126 };
 127
 128 &vqmmc {
 129         status = "okay";
 130 };
 131
 132 &sdhci {
 133         status = "okay";
 134         pinctrl-0 = <&sd_pins>;
 135         pinctrl-names = "default";
 136         cd-gpios = <&tlmm 22 GPIO_ACTIVE_LOW>;
 137         vqmmc-supply = <&vqmmc>;
 138 };
 139
 140 &blsp_dma {
 141         status = "okay";
 142 };
 143
 144 &cryptobam {
 145         status = "okay";
 146 };
 147
 148 &blsp1_spi1 {
 149         pinctrl-0 = <&spi_0_pins>;
 150         pinctrl-names = "default";
 151         status = "okay";
 152         cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
 153
 154         flash@0 {
 155                 compatible = "jedec,spi-nor";
 156                 reg = <0>;
 157                 spi-max-frequency = <24000000>;
 158
 159                 partitions {
 160                         compatible = "fixed-partitions";
 161                         #address-cells = <1>;
 162                         #size-cells = <1>;
 163
 164                         SBL1@0 {
 165                                 label = "SBL1";
 166                                 reg = <0x0 0x40000>;
 167                                 read-only;
 168                         };
 169
 170                         MIBIB@40000 {
 171                                 label = "MIBIB";
 172                                 reg = <0x40000 0x20000>;
 173                                 read-only;
 174                         };
 175
 176                         QSEE@60000 {
 177                                 label = "QSEE";
 178                                 reg = <0x60000 0x60000>;
 179                                 read-only;
 180                         };
 181
 182                         CDT@c0000 {
 183                                 label = "CDT";
 184                                 reg = <0xc0000 0x10000>;
 185                                 read-only;
 186                         };
 187
 188                         DDRPARAMS@d0000 {
 189                                 label = "DDRPARAMS";
 190                                 reg = <0xd0000 0x10000>;
 191                                 read-only;
 192                         };
 193
 194                         APPSBLENV@e0000 {
 195                                 label = "APPSBLENV";
 196                                 reg = <0xe0000 0x10000>;
 197                                 read-only;
 198                         };
 199
 200                         APPSBL@f0000 {
 201                                 label = "APPSBL";
 202                                 reg = <0xf0000 0x80000>;
 203                                 read-only;
 204                         };
 205
 206                         ART@170000 {
 207                                 label = "ART";
 208                                 reg = <0x170000 0x10000>;
 209                                 read-only;
 210                                 compatible = "nvmem-cells";
 211                                 #address-cells = <1>;
 212                                 #size-cells = <1>;
 213
 214                                 precal_art_1000: precal@1000 {
 215                                         reg = <0x1000 0x2f20>;
 216                                 };
 217
 218                                 precal_art_5000: precal@5000 {
 219                                         reg = <0x5000 0x2f20>;
 220                                 };
 221                         };
 222
 223                         firmware@180000 {
 224                                 compatible = "denx,fit";
 225                                 label = "firmware";
 226                                 reg = <0x180000 0xe80000>;
 227                         };
 228                 };
 229         };
 230 };
 231
 232 &blsp1_spi2 {
 233         pinctrl-0 = <&spi_1_pins>;
 234         pinctrl-names = "default";
 235         status = "okay";
 236
 237         spidev1: spi@0 {
 238                 compatible = "siliconlabs,si3210";
 239                 reg = <0>;
 240                 spi-max-frequency = <24000000>;
 241         };
 242 };
 243
 244 &blsp1_uart1 {
 245         pinctrl-0 = <&serial_pins>;
 246         pinctrl-names = "default";
 247         status = "okay";
 248 };
 249
 250 &blsp1_uart2 {
 251         pinctrl-0 = <&serial_1_pins>;
 252         pinctrl-names = "default";
 253         status = "okay";
 254 };
 255
 256 &tlmm {
 257         serial_pins: serial_pinmux {
 258                 mux {
 259                         pins = "gpio16", "gpio17";
 260                         function = "blsp_uart0";
 261                         bias-disable;
 262                 };
 263         };
 264
 265         serial_1_pins: serial1_pinmux {
 266                 mux {
 267                         pins = "gpio8", "gpio9",
 268                                 "gpio10", "gpio11";
 269                         function = "blsp_uart1";
 270                         bias-disable;
 271                 };
 272         };
 273
 274         spi_0_pins: spi_0_pinmux {
 275                 pinmux {
 276                         function = "blsp_spi0";
 277                         pins = "gpio13", "gpio14", "gpio15";
 278                 };
 279                 pinmux_cs {
 280                         function = "gpio";
 281                         pins = "gpio12";
 282                 };
 283                 pinconf {
 284                         pins = "gpio13", "gpio14", "gpio15";
 285                         drive-strength = <12>;
 286                         bias-disable;
 287                 };
 288                 pinconf_cs {
 289                         pins = "gpio12";
 290                         drive-strength = <2>;
 291                         bias-disable;
 292                         output-high;
 293                 };
 294         };
 295
 296         spi_1_pins: spi_1_pinmux {
 297                 mux {
 298                         pins = "gpio44", "gpio46", "gpio47";
 299                         function = "blsp_spi1";
 300                         bias-disable;
 301                 };
 302                 host_int {
 303                         pins = "gpio42";
 304                         function = "gpio";
 305                         input;
 306                 };
 307                 cs {
 308                         pins = "gpio45";
 309                         function = "gpio";
 310                         bias-pull-up;
 311                 };
 312                 wake {
 313                         pins = "gpio40";
 314                         function = "gpio";
 315                         output-high;
 316                 };
 317                 reset {
 318                         pins = "gpio49";
 319                         function = "gpio";
 320                         output-high;
 321                 };
 322         };
 323
 324         sd_pins: sd_pins {
 325                 pinmux {
 326                         function = "sdio";
 327                         pins = "gpio23", "gpio24", "gpio25", "gpio26",
 328                                 "gpio28", "gpio29", "gpio30", "gpio31";
 329                         drive-strength = <10>;
 330                 };
 331
 332                 pinmux_sd_clk {
 333                         function = "sdio";
 334                         pins = "gpio27";
 335                         drive-strength = <16>;
 336                 };
 337
 338                 pinmux_sd7 {
 339                         function = "sdio";
 340                         pins = "gpio32";
 341                         drive-strength = <10>;
 342                         bias-disable;
 343                 };
 344         };
 345 };
 346
 347 &usb2_hs_phy {
 348         status = "okay";
 349 };
 350
 351 &usb3_hs_phy {
 352         status = "okay";
 353 };
 354
 355 &usb3_ss_phy {
 356         status = "okay";
 357 };
 358
 359 &wifi0 {
 360         status = "okay";
 361         nvmem-cell-names = "pre-calibration";
 362         nvmem-cells = <&precal_art_1000>;
 363         qcom,ath10k-calibration-variant = "GL-S1300";
 364 };
 365
 366 &wifi1 {
 367         status = "okay";
 368         nvmem-cell-names = "pre-calibration";
 369         nvmem-cells = <&precal_art_5000>;
 370         qcom,ath10k-calibration-variant = "GL-S1300";
 371 };