target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ap120c-ac.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "qcom-ipq4019.dtsi"
   4 #include <dt-bindings/gpio/gpio.h>
   5 #include <dt-bindings/input/input.h>
   6 #include <dt-bindings/soc/qcom,tcsr.h>
   7
   8 / {
   9         model = "ALFA Network AP120C-AC";
  10         compatible = "alfa-network,ap120c-ac";
  11
  12         aliases {
  13                 led-boot = &status;
  14                 led-failsafe = &status;
  15                 led-running = &status;
  16                 led-upgrade = &status;
  17         };
  18
  19         keys {
  20                 compatible = "gpio-keys";
  21
  22                 reset {
  23                         label = "reset";
  24                         gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
  25                         linux,code = <KEY_RESTART>;
  26                 };
  27         };
  28
  29         leds {
  30                 compatible = "gpio-leds";
  31
  32                 status: status {
  33                         label = "blue:status";
  34                         gpios = <&tlmm 5 GPIO_ACTIVE_LOW>;
  35                         default-state = "keep";
  36                 };
  37
  38                 wan {
  39                         label = "amber:wan";
  40                         gpios = <&ethphy4 1 GPIO_ACTIVE_HIGH>;
  41                 };
  42
  43                 wlan2g {
  44                         label = "green:wlan2g";
  45                         gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
  46                         linux,default-trigger = "phy0tpt";
  47                 };
  48
  49                 wlan5g {
  50                         label = "red:wlan5g";
  51                         gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
  52                         linux,default-trigger = "phy1tpt";
  53                 };
  54         };
  55
  56         soc {
  57                 rng@22000 {
  58                         status = "okay";
  59                 };
  60
  61                 mdio@90000 {
  62                         status = "okay";
  63
  64                         pinctrl-0 = <&mdio_pins>;
  65                         pinctrl-names = "default";
  66                 };
  67
  68                 ess-psgmii@98000 {
  69                         status = "okay";
  70                 };
  71
  72                 counter@4a1000 {
  73                         compatible = "qcom,qca-gcnt";
  74                         reg = <0x4a1000 0x4>;
  75                 };
  76
  77                 tcsr@1949000 {
  78                         compatible = "qcom,tcsr";
  79                         reg = <0x1949000 0x100>;
  80                         qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  81                 };
  82
  83                 tcsr@194b000 {
  84                         compatible = "qcom,tcsr";
  85                         reg = <0x194b000 0x100>;
  86                         qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
  87                 };
  88
  89                 ess_tcsr@1953000 {
  90                         compatible = "qcom,tcsr";
  91                         reg = <0x1953000 0x1000>;
  92                         qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
  93                 };
  94
  95                 tcsr@1957000 {
  96                         compatible = "qcom,tcsr";
  97                         reg = <0x1957000 0x100>;
  98                         qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  99                 };
 100
 101                 usb2@60f8800 {
 102                         status = "okay";
 103                 };
 104
 105                 usb3@8af8800 {
 106                         status = "okay";
 107
 108                         dwc3@8a00000 {
 109                                 phys = <&usb3_hs_phy>;
 110                                 phy-names = "usb2-phy";
 111                         };
 112                 };
 113
 114                 crypto@8e3a000 {
 115                         status = "okay";
 116                 };
 117
 118                 watchdog@b017000 {
 119                         status = "okay";
 120                 };
 121
 122                 ess-switch@c000000 {
 123                         status = "okay";
 124
 125                         switch_lan_bmp = <0x10>;
 126                         switch_wan_bmp = <0x20>;
 127                 };
 128
 129                 edma@c080000 {
 130                         status = "okay";
 131                 };
 132         };
 133 };
 134
 135 &blsp_dma {
 136         status = "okay";
 137 };
 138
 139 &blsp1_i2c3 {
 140         status = "okay";
 141
 142         pinctrl-0 = <&i2c0_pins>;
 143         pinctrl-names = "default";
 144
 145         tpm@29 {
 146                 compatible = "atmel,at97sc3204t";
 147                 reg = <0x29>;
 148         };
 149 };
 150
 151 &blsp1_spi1 {
 152         status = "okay";
 153
 154         pinctrl-0 = <&spi0_pins>;
 155         pinctrl-names = "default";
 156         cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>,
 157                    <&tlmm  4 GPIO_ACTIVE_HIGH>;
 158
 159         flash@0 {
 160                 compatible = "jedec,spi-nor";
 161                 reg = <0>;
 162                 spi-max-frequency = <24000000>;
 163
 164                 partitions {
 165                         compatible = "fixed-partitions";
 166                         #address-cells = <1>;
 167                         #size-cells = <1>;
 168
 169                         partition@0 {
 170                                 label = "SBL1";
 171                                 reg = <0x00000000 0x00040000>;
 172                                 read-only;
 173                         };
 174
 175                         partition@40000 {
 176                                 label = "MIBIB";
 177                                 reg = <0x00040000 0x00020000>;
 178                                 read-only;
 179                         };
 180
 181                         partition@60000 {
 182                                 label = "QSEE";
 183                                 reg = <0x00060000 0x00060000>;
 184                                 read-only;
 185                         };
 186
 187                         partition@c0000 {
 188                                 label = "CDT";
 189                                 reg = <0x000c0000 0x00010000>;
 190                                 read-only;
 191                         };
 192
 193                         partition@d0000 {
 194                                 label = "DDRPARAMS";
 195                                 reg = <0x000d0000 0x00010000>;
 196                                 read-only;
 197                         };
 198
 199                         partition@e0000 {
 200                                 label = "APPSBLENV";
 201                                 reg = <0x000e0000 0x00010000>;
 202                         };
 203
 204                         partition@f0000 {
 205                                 label = "APPSBL";
 206                                 reg = <0x000f0000 0x00080000>;
 207                                 read-only;
 208                         };
 209
 210                         partition@170000 {
 211                                 label = "ART";
 212                                 reg = <0x00170000 0x00010000>;
 213                                 read-only;
 214                                 compatible = "nvmem-cells";
 215                                 #address-cells = <1>;
 216                                 #size-cells = <1>;
 217
 218                                 precal_art_1000: precal@1000 {
 219                                         reg = <0x1000 0x2f20>;
 220                                 };
 221
 222                                 precal_art_5000: precal@5000 {
 223                                         reg = <0x5000 0x2f20>;
 224                                 };
 225                         };
 226
 227                         partition@180000 {
 228                                 label = "priv_data1";
 229                                 reg = <0x00180000 0x00010000>;
 230                                 read-only;
 231                         };
 232
 233                         partition@190000 {
 234                                 label = "priv_data2";
 235                                 reg = <0x00190000 0x00010000>;
 236                                 read-only;
 237                         };
 238                 };
 239         };
 240
 241         nand@1 {
 242                 compatible = "spi-nand";
 243                 reg = <1>;
 244                 spi-max-frequency = <24000000>;
 245
 246                 partitions {
 247                         compatible = "fixed-partitions";
 248                         #address-cells = <1>;
 249                         #size-cells = <1>;
 250
 251                         partition@0 {
 252                                 label = "rootfs1";
 253                                 reg = <0x00000000 0x04000000>;
 254                         };
 255
 256                         partition@4000000 {
 257                                 label = "rootfs2";
 258                                 reg = <0x04000000 0x04000000>;
 259                         };
 260                 };
 261         };
 262 };
 263
 264 &blsp1_uart1 {
 265         status = "okay";
 266
 267         pinctrl-0 = <&serial0_pins>;
 268         pinctrl-names = "default";
 269 };
 270
 271 &cryptobam {
 272         status = "okay";
 273 };
 274
 275 &ethphy4 {
 276         gpio-controller;
 277         #gpio-cells = <2>;
 278 };
 279
 280 &gmac0 {
 281         qcom,forced_duplex = <1>;
 282         qcom,forced_speed = <1000>;
 283         qcom,phy_mdio_addr = <3>;
 284         qcom,poll_required = <1>;
 285         vlan_tag = <1 0x10>;
 286 };
 287
 288 &gmac1 {
 289         qcom,forced_duplex = <1>;
 290         qcom,forced_speed = <1000>;
 291         qcom,phy_mdio_addr = <4>;
 292         qcom,poll_required = <1>;
 293         vlan_tag = <2 0x20>;
 294 };
 295
 296 &tlmm {
 297         i2c0_pins: i2c0_pinmux {
 298                 mux_i2c {
 299                         function = "blsp_i2c0";
 300                         pins = "gpio58", "gpio59";
 301                         drive-strength = <16>;
 302                         bias-disable;
 303                 };
 304         };
 305
 306         mdio_pins: mdio_pinmux {
 307                 mux_mdio {
 308                         pins = "gpio53";
 309                         function = "mdio";
 310                         bias-pull-up;
 311                 };
 312
 313                 mux_mdc {
 314                         pins = "gpio52";
 315                         function = "mdc";
 316                         bias-pull-up;
 317                 };
 318         };
 319
 320         serial0_pins: serial0_pinmux {
 321                 mux_uart {
 322                         pins = "gpio60", "gpio61";
 323                         function = "blsp_uart0";
 324                         bias-disable;
 325                 };
 326         };
 327
 328         spi0_pins: spi0_pinmux {
 329                 mux_spi {
 330                         function = "blsp_spi0";
 331                         pins = "gpio55", "gpio56", "gpio57";
 332                         drive-strength = <12>;
 333                         bias-disable;
 334                 };
 335
 336                 mux_cs {
 337                         function = "gpio";
 338                         pins = "gpio54", "gpio4";
 339                         drive-strength = <2>;
 340                         bias-disable;
 341                         output-high;
 342                 };
 343         };
 344 };
 345
 346 &usb2_hs_phy {
 347         status = "okay";
 348 };
 349
 350 &usb3_hs_phy {
 351         status = "okay";
 352 };
 353
 354 &wifi0 {
 355         status = "okay";
 356         nvmem-cell-names = "pre-calibration";
 357         nvmem-cells = <&precal_art_1000>;
 358 };
 359
 360 &wifi1 {
 361         status = "okay";
 362         qcom,ath10k-calibration-variant = "ALFA-Network-AP120C-AC";
 363         nvmem-cell-names = "pre-calibration";
 364         nvmem-cells = <&precal_art_5000>;
 365 };