1 From f73116f62647c74eb0f06f0d8c29e5993d961d82 Mon Sep 17 00:00:00 2001
2 From: Samuel Holland <samuel@sholland.org>
3 Date: Sat, 9 Oct 2021 22:43:26 -0500
4 Subject: [PATCH 41/90] arm: psci: Add definitions for PSCI v1.1
6 Add the new option, function IDs, and prototypes for PSCI v1.1
7 implementations. In the process, fix some issues with the existing
9 - Fix the incorrectly-named ARM_PSCI_0_2_FN64_SYSTEM_RESET2.
10 - Replace the deprecated "affinity_level" naming with "power_level".
12 Signed-off-by: Samuel Holland <samuel@sholland.org>
14 arch/arm/cpu/armv7/Kconfig | 3 +++
15 arch/arm/cpu/armv8/fwcall.c | 2 +-
16 arch/arm/include/asm/psci.h | 9 +++++++--
17 arch/arm/include/asm/system.h | 14 +++++++++-----
18 arch/arm/lib/psci-dt.c | 2 ++
19 5 files changed, 22 insertions(+), 8 deletions(-)
21 --- a/arch/arm/cpu/armv7/Kconfig
22 +++ b/arch/arm/cpu/armv7/Kconfig
23 @@ -80,6 +80,9 @@ choice
25 Select the supported PSCI version.
27 +config ARMV7_PSCI_1_1
33 --- a/arch/arm/cpu/armv8/fwcall.c
34 +++ b/arch/arm/cpu/armv8/fwcall.c
35 @@ -103,7 +103,7 @@ void __noreturn psci_system_reset2(u32 r
39 - regs.regs[0] = ARM_PSCI_0_2_FN64_SYSTEM_RESET2;
40 + regs.regs[0] = ARM_PSCI_1_1_FN64_SYSTEM_RESET2;
41 regs.regs[1] = PSCI_RESET2_TYPE_VENDOR | reset_level;
42 regs.regs[2] = cookie;
44 --- a/arch/arm/include/asm/psci.h
45 +++ b/arch/arm/include/asm/psci.h
47 #include <linux/bitops.h>
50 -#define ARM_PSCI_VER_1_0 (0x00010000)
51 #define ARM_PSCI_VER_0_2 (0x00000002)
52 +#define ARM_PSCI_VER_1_0 (0x00010000)
53 +#define ARM_PSCI_VER_1_1 (0x00010001)
55 /* PSCI 0.1 interface */
56 #define ARM_PSCI_FN_BASE 0x95c1ba5e
58 #define ARM_PSCI_0_2_FN64_AFFINITY_INFO ARM_PSCI_0_2_FN64(4)
59 #define ARM_PSCI_0_2_FN64_MIGRATE ARM_PSCI_0_2_FN64(5)
60 #define ARM_PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU ARM_PSCI_0_2_FN64(7)
61 -#define ARM_PSCI_0_2_FN64_SYSTEM_RESET2 ARM_PSCI_0_2_FN64(18)
63 /* PSCI 1.0 interface */
64 #define ARM_PSCI_1_0_FN_PSCI_FEATURES ARM_PSCI_0_2_FN(10)
66 #define ARM_PSCI_1_0_FN64_STAT_RESIDENCY ARM_PSCI_0_2_FN64(16)
67 #define ARM_PSCI_1_0_FN64_STAT_COUNT ARM_PSCI_0_2_FN64(17)
69 +/* PSCI 1.1 interface */
70 +#define ARM_PSCI_1_1_FN_SYSTEM_RESET2 ARM_PSCI_0_2_FN(18)
72 +#define ARM_PSCI_1_1_FN64_SYSTEM_RESET2 ARM_PSCI_0_2_FN64(18)
74 /* 1KB stack per core */
75 #define ARM_PSCI_STACK_SHIFT 10
76 #define ARM_PSCI_STACK_SIZE (1 << ARM_PSCI_STACK_SHIFT)
77 --- a/arch/arm/include/asm/system.h
78 +++ b/arch/arm/include/asm/system.h
79 @@ -557,16 +557,20 @@ void mmu_page_table_flush(unsigned long
80 #ifdef CONFIG_ARMV7_PSCI
81 void psci_arch_cpu_entry(void);
82 void psci_arch_init(void);
84 u32 psci_version(void);
85 -s32 psci_features(u32 function_id, u32 psci_fid);
86 +s32 psci_cpu_suspend(u32 function_id, u32 power_state, u32 pc, u32 context_id);
87 s32 psci_cpu_off(void);
88 -s32 psci_cpu_on(u32 function_id, u32 target_cpu, u32 pc,
90 -s32 psci_affinity_info(u32 function_id, u32 target_affinity,
91 - u32 lowest_affinity_level);
92 +s32 psci_cpu_on(u32 function_id, u32 target_cpu, u32 pc, u32 context_id);
93 +s32 psci_affinity_info(u32 function_id, u32 target_affinity, u32 power_level);
94 u32 psci_migrate_info_type(void);
95 void psci_system_off(void);
96 void psci_system_reset(void);
97 +s32 psci_features(u32 function_id, u32 psci_fid);
98 +s32 psci_cpu_default_suspend(u32 function_id, u32 pc, u32 context_id);
99 +s32 psci_node_hw_state(u32 function_id, u32 target_cpu, u32 power_level);
100 +s32 psci_system_suspend(u32 function_id, u32 pc, u32 context_id);
101 +s32 psci_system_reset2(u32 function_id, u32 reset_type, u32 cookie);
104 #endif /* __ASSEMBLY__ */
105 --- a/arch/arm/lib/psci-dt.c
106 +++ b/arch/arm/lib/psci-dt.c
107 @@ -66,6 +66,8 @@ int fdt_psci(void *fdt)
109 #if CONFIG_IS_ENABLED(ARMV8_SEC_FIRMWARE_SUPPORT)
110 psci_ver = sec_firmware_support_psci_version();
111 +#elif defined(CONFIG_ARMV7_PSCI_1_1)
112 + psci_ver = ARM_PSCI_VER_1_1;
113 #elif defined(CONFIG_ARMV7_PSCI_1_0) || defined(CONFIG_ARMV8_PSCI)
114 psci_ver = ARM_PSCI_VER_1_0;
115 #elif defined(CONFIG_ARMV7_PSCI_0_2)